
directory. These passes are already defined in the IR library, and it doesn't make any sense to have the headers in Analysis. Long term, I think there is going to be a much better way to divide these matters. The dominators code should be fully separated into the abstract graph algorithm and have that put in Support where it becomes obvious that evn Clang's CFGBlock's can use it. Then the verifier can manually construct dominance information from the Support-driven interface while the Analysis library can provide a pass which both caches, reconstructs, and supports a nice update API. But those are very long term, and so I don't want to leave the really confusing structure until that day arrives. llvm-svn: 199082
91 lines
2.8 KiB
C++
91 lines
2.8 KiB
C++
//===- Mem2Reg.cpp - The -mem2reg pass, a wrapper around the Utils lib ----===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass is a simple pass wrapper around the PromoteMemToReg function call
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// exposed by the Utils library.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "mem2reg"
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#include "llvm/Transforms/Scalar.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/IR/Dominators.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/Transforms/Utils/PromoteMemToReg.h"
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#include "llvm/Transforms/Utils/UnifyFunctionExitNodes.h"
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using namespace llvm;
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STATISTIC(NumPromoted, "Number of alloca's promoted");
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namespace {
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struct PromotePass : public FunctionPass {
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static char ID; // Pass identification, replacement for typeid
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PromotePass() : FunctionPass(ID) {
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initializePromotePassPass(*PassRegistry::getPassRegistry());
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}
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// runOnFunction - To run this pass, first we calculate the alloca
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// instructions that are safe for promotion, then we promote each one.
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//
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virtual bool runOnFunction(Function &F);
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addRequired<DominatorTree>();
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AU.setPreservesCFG();
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// This is a cluster of orthogonal Transforms
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AU.addPreserved<UnifyFunctionExitNodes>();
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AU.addPreservedID(LowerSwitchID);
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AU.addPreservedID(LowerInvokePassID);
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}
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};
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} // end of anonymous namespace
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char PromotePass::ID = 0;
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INITIALIZE_PASS_BEGIN(PromotePass, "mem2reg", "Promote Memory to Register",
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false, false)
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INITIALIZE_PASS_DEPENDENCY(DominatorTree)
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INITIALIZE_PASS_END(PromotePass, "mem2reg", "Promote Memory to Register",
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false, false)
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bool PromotePass::runOnFunction(Function &F) {
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std::vector<AllocaInst*> Allocas;
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BasicBlock &BB = F.getEntryBlock(); // Get the entry node for the function
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bool Changed = false;
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DominatorTree &DT = getAnalysis<DominatorTree>();
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while (1) {
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Allocas.clear();
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// Find allocas that are safe to promote, by looking at all instructions in
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// the entry node
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for (BasicBlock::iterator I = BB.begin(), E = --BB.end(); I != E; ++I)
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if (AllocaInst *AI = dyn_cast<AllocaInst>(I)) // Is it an alloca?
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if (isAllocaPromotable(AI))
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Allocas.push_back(AI);
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if (Allocas.empty()) break;
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PromoteMemToReg(Allocas, DT);
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NumPromoted += Allocas.size();
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Changed = true;
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}
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return Changed;
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}
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// createPromoteMemoryToRegister - Provide an entry point to create this pass.
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//
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FunctionPass *llvm::createPromoteMemoryToRegisterPass() {
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return new PromotePass();
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}
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