llvm-project

History

[TargetLowering] Emit SIGN_EXTEND_INREG instead of shift pair from optimizeSetCCOfSignedTruncationCheck. (#81785 )

sext_inreg is our canonical form of shift pair before op legalization so
DAG combiner will probably create it anyway. If it isn't legal
LegalizeDAG will expand to shifts later.

2024-02-15 09:24:02 -08:00

CMakeLists.txt

Split out CodeGenTypes from CodeGen for LLT/MVT

2023-05-03 00:13:20 +09:00

DAGCombiner.cpp

[DAG] visitCTPOP - CTPOP(SHIFT(X)) -> CTPOP(X) iff the shift doesn't affect any non-zero bits

2024-02-15 10:41:08 +00:00

FastISel.cpp

[DebugInfo] Handle dbg.assigns in FastISel (#80734 )

2024-02-08 10:44:43 +00:00

FunctionLoweringInfo.cpp

[WebAssembly] Demote PHIs in catchswitch BB only (#81570 )

2024-02-13 13:43:21 -08:00

InstrEmitter.cpp

[RFC][SelectionDAG] Add and use SDNode::getAsZExtVal() helper (#76710 )

2024-01-09 12:25:17 +00:00

InstrEmitter.h

…

LegalizeDAG.cpp

[LLVM] Add __builtin_readsteadycounter intrinsic and builtin for realtime clocks (#81331 )

2024-02-13 10:06:25 -06:00

LegalizeFloatTypes.cpp

DAG: Fix chain mismanagement in SoftenFloatRes_FP_EXTEND (#74558 )

2024-01-18 14:32:44 +07:00

LegalizeIntegerTypes.cpp

[LLVM] Add __builtin_readsteadycounter intrinsic and builtin for realtime clocks (#81331 )

2024-02-13 10:06:25 -06:00

LegalizeTypes.cpp

[SelectionDAG] Adjust placement of blank lines in debug output. NFC (#70969 )

2023-11-02 09:35:04 -07:00

LegalizeTypes.h

[LLVM] Add __builtin_readsteadycounter intrinsic and builtin for realtime clocks (#81331 )

2024-02-13 10:06:25 -06:00

LegalizeTypesGeneric.cpp

[llvm][TypeSize] Fix addition/subtraction in TypeSize. (#72979 )

2023-11-22 08:52:53 +00:00

LegalizeVectorOps.cpp

[llvm] Move CodeGenTypes library to its own directory (#79444 )

2024-01-25 12:01:31 -05:00

LegalizeVectorTypes.cpp

[VP][RISCV] Introduce llvm.vp.minimum/maximum intrinsics (#74840 )

2024-01-22 16:46:39 -08:00

ResourcePriorityQueue.cpp

…

ScheduleDAGFast.cpp

[llvm][NFC] Use SDValue::getConstantOperandVal(i) where possible (#76708 )

2024-01-02 13:14:28 +00:00

ScheduleDAGRRList.cpp

[llvm] Move CodeGenTypes library to its own directory (#79444 )

2024-01-25 12:01:31 -05:00

ScheduleDAGSDNodes.cpp

Fix MSVC signed/unsigned mismatch warning. NFC.

2023-12-01 18:34:01 +00:00

ScheduleDAGSDNodes.h

[llvm] Move CodeGenTypes library to its own directory (#79444 )

2024-01-25 12:01:31 -05:00

ScheduleDAGVLIW.cpp

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295 )

2023-09-14 14:10:14 -07:00

SDNodeDbgValue.h

…

SelectionDAG.cpp

[DAG] Add SelectionDAG::getShiftAmountConstant APInt variant (#81484 )

2024-02-13 08:06:16 +00:00

SelectionDAGAddressAnalysis.cpp

[DAG] BaseIndexOffset::equalBaseIndex - early out on failed matches. NFCI.

2024-01-04 10:50:43 +00:00

SelectionDAGBuilder.cpp

[LLVM] Add __builtin_readsteadycounter intrinsic and builtin for realtime clocks (#81331 )

2024-02-13 10:06:25 -06:00

SelectionDAGBuilder.h

[llvm] Move CodeGenTypes library to its own directory (#79444 )

2024-01-25 12:01:31 -05:00

SelectionDAGDumper.cpp

[LLVM] Add __builtin_readsteadycounter intrinsic and builtin for realtime clocks (#81331 )

2024-02-13 10:06:25 -06:00

SelectionDAGISel.cpp

[llvm] Move CodeGenTypes library to its own directory (#79444 )

2024-01-25 12:01:31 -05:00

SelectionDAGPrinter.cpp

…

SelectionDAGTargetInfo.cpp

…

StatepointLowering.cpp

[StatepointLowering] Use Constant instead of TargetConstant for undef value (#81635 )

2024-02-13 21:58:01 +03:00

StatepointLowering.h

…

TargetLowering.cpp

[TargetLowering] Emit SIGN_EXTEND_INREG instead of shift pair from optimizeSetCCOfSignedTruncationCheck. (#81785 )

2024-02-15 09:24:02 -08:00