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llvm-project/llvm/test/CodeGen
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Kai Luo 5eaebd5d64 [PowerPC] Implement quadword atomic load/store 
Add support to load/store i128 atomically.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D105612
2021-09-01 06:55:40 +00:00
..
AArch64
[GlobalISel] Don't use G_FPTOSI in G_ISNAN legalization
2021-08-31 10:26:42 -07:00
AMDGPU
[AMDGPU] Split entry basic block after alloca instructions.
2021-09-01 10:18:44 +05:30
ARC
[ARC] Add codegen for the readcyclecounter intrinsic along with disassembly for associated instructions
2021-08-24 11:53:20 -07:00
ARM
[ARMISelLowering] avoid emitting libcalls to __mulodi4()
2021-08-27 15:14:47 -07:00
AVR
[AVR] emit 'MCSA_Global' references to '__do_global_ctors' and '__do_global_dtors'
2021-08-05 10:37:36 +08:00
BPF
[BPF] support btf_tag attribute in .BTF section
2021-08-28 21:02:27 -07:00
Generic
Moved the test to X86 as it's x86 specific.
2021-08-31 14:48:29 -04:00
Hexagon
[Hexagon] Fix resetting dead registers in DBG_VALUE_LISTs
2021-07-27 18:36:28 -05:00
Inputs
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Lanai
[Lanai] fix lowering wide returns
2021-08-05 21:08:09 -07:00
M68k
[M68k][test] Migrate MC tests related to MOVEM instruciton
2021-08-24 13:09:53 -07:00
Mips
[MipsISelLowering] avoid emitting libcalls to __mulodi4()
2021-08-27 15:15:36 -07:00
MIR
The maximal representable alignment in LLVM IR is 1GiB, not 512MiB
2021-08-26 12:53:39 +03:00
MSP430
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NVPTX
[NVPTX] Add NVPTX intrinsics for CUDA PTX 6.5 ldmatrix instructions
2021-08-06 16:13:35 -07:00
PowerPC
[PowerPC] Implement quadword atomic load/store
2021-09-01 06:55:40 +00:00
RISCV
[RISCVISelLowering] avoid emitting libcalls to __mulodi4() and __multi3()
2021-08-31 11:23:56 -07:00
SPARC
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SystemZ
SystemZ: Tidy up a mir test
2021-08-10 13:56:54 -04:00
Thumb
Allow rematerialization of virtual reg uses
2021-08-24 11:09:02 -07:00
Thumb2
[ARM] Add missing validForTailPredication for VMINNM/VMAXNM
2021-08-31 18:19:03 +01:00
VE
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WebAssembly
[WebAssembly] Free setjmpTable before exiting calls in EmSjLj
2021-08-30 21:46:25 -07:00
WinCFGuard
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WinEH
Fix SEH table addresses for Windows
2021-08-20 22:32:12 +03:00
X86
[X86] Enable half type support in inline assembly constraints
2021-09-01 09:29:31 +08:00
XCore
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