0dd21ad1c6
This just added unnecessary work to the IR, since they are only used for load and store, which just causes some IR noise. Tests updated by UTC script to remove the extra lines.
44 lines
1.9 KiB
Common Lisp
44 lines
1.9 KiB
Common Lisp
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5
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// RUN: %clang_cc1 -O0 -cl-std=CL2.0 -triple amdgcn-amd-amdhsa -target-cpu gfx942 \
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// RUN: %s -emit-llvm -o - -disable-llvm-passes | FileCheck %s
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// REQUIRES: amdgpu-registered-target
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// `Ptr.getElementType()` in `CheckAtomicAlignment` returns
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// %struct.__half2 = type { %union.anon }
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// Check we do not crash when handling that.
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typedef half __attribute__((ext_vector_type(2))) half2;
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typedef short __attribute__((ext_vector_type(2))) short2;
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struct __half2 {
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union {
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struct {
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half x;
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half y;
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};
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half2 data;
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};
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};
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// CHECK-LABEL: define dso_local <2 x half> @test_flat_add_2f16(
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// CHECK-SAME: ptr noundef [[ADDR:%.*]], <2 x half> noundef [[VAL:%.*]]) #[[ATTR0:[0-9]+]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[ADDR_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
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// CHECK-NEXT: [[VAL_ADDR:%.*]] = alloca <2 x half>, align 4, addrspace(5)
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// CHECK-NEXT: [[ADDR_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[ADDR_ADDR]] to ptr
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// CHECK-NEXT: [[VAL_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[VAL_ADDR]] to ptr
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// CHECK-NEXT: store ptr [[ADDR]], ptr [[ADDR_ADDR_ASCAST]], align 8
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// CHECK-NEXT: store <2 x half> [[VAL]], ptr [[VAL_ADDR_ASCAST]], align 4
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// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ADDR_ADDR_ASCAST]], align 8
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// CHECK-NEXT: [[TMP1:%.*]] = load <2 x half>, ptr [[VAL_ADDR_ASCAST]], align 4
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// CHECK-NEXT: [[TMP2:%.*]] = atomicrmw fadd ptr [[TMP0]], <2 x half> [[TMP1]] syncscope("agent") monotonic, align 4, !amdgpu.no.fine.grained.memory [[META4:![0-9]+]]
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// CHECK-NEXT: ret <2 x half> [[TMP2]]
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//
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half2 test_flat_add_2f16(short2 *addr, half2 val) {
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return __builtin_amdgcn_flat_atomic_fadd_v2f16((struct __half2*)addr, val);
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}
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//.
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// CHECK: [[META4]] = !{}
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//.
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