Previous commit message: >Previous commit message: > >> Original commit message: >> >>>When users explicitly specify a PTX version via -mattr=+ptxNN that's insufficient for their target SM, we now emit a fatal error. Previously, we silently upgraded the PTX version to the minimum required for the target SM. >>> >>>When no SM or PTX version is specified, we now use PTX 3.2 (the minimum for the default SM 3.0) instead of PTX 6.0. >> >>The following commits should fix the failures that arose when I previously tried to land this commit: >> >> >>9fc5fd0ad6should address the llvm-nvptx*-nvidia-* build failures: https://github.com/llvm/llvm-project/pull/174834#issuecomment-3742242651 >> >> >>600514a637should address the MLIR failures > >The previous commit was reverted withd23cb79ba4because the [mlir-nvidia](https://lab.llvm.org/buildbot/#/builders/138/builds/24797) and [mlir-nvidia-gcc7](https://lab.llvm.org/buildbot/#/builders/116/builds/23929) Buildbots were failing. > >Those tests failed because MLIR's default SM was 5.0, which caused NVPTX to target PTX ISA v4.0, which did not support the intrinsics used in the failing tests. > >243f011577should address this by bumping MLIR's default SM to 7.5. Now, using MLIR's new default SM, NVPTX targets the PTX ISA v6.3, which supports the intrinsics used in the failing tests. --- The previous commit was reverted with e9b578a4d77025e18318efedd0f3f3764338d859 [because](https://github.com/llvm/llvm-project/pull/179304#issuecomment-3856301333) the clang driver set the default PTX ISA version to v4.2 when no CUDA installation is found. However, given our patch, we should not set a default; instead, let the LLVM backend select the appropriate PTX ISA version for the target SM.
190 lines
13 KiB
C++
190 lines
13 KiB
C++
// RUN: %clang_cc1 -fsycl-is-host -emit-llvm -triple x86_64-unknown-linux-gnu -std=c++17 %s -o - | FileCheck --check-prefixes=CHECK-HOST,CHECK-HOST-LINUX %s
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// RUN: %clang_cc1 -fsycl-is-device -emit-llvm -aux-triple x86_64-unknown-linux-gnu -triple amdgcn-amd-amdhsa -std=c++17 %s -o - | FileCheck --check-prefixes=CHECK-DEVICE,CHECK-AMDGCN %s
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// RUN: %clang_cc1 -fsycl-is-device -emit-llvm -aux-triple x86_64-unknown-linux-gnu -triple nvptx-nvidia-cuda -std=c++17 %s -o - | FileCheck --check-prefixes=CHECK-DEVICE,CHECK-NVPTX %s
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// RUN: %clang_cc1 -fsycl-is-device -emit-llvm -aux-triple x86_64-unknown-linux-gnu -triple nvptx64-nvidia-cuda -std=c++17 %s -o - | FileCheck --check-prefixes=CHECK-DEVICE,CHECK-NVPTX %s
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// RUN: %clang_cc1 -fsycl-is-device -emit-llvm -aux-triple x86_64-unknown-linux-gnu -triple spir-unknown-unknown -std=c++17 %s -o - | FileCheck --check-prefixes=CHECK-DEVICE,CHECK-SPIR %s
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// RUN: %clang_cc1 -fsycl-is-device -emit-llvm -aux-triple x86_64-unknown-linux-gnu -triple spir64-unknown-unknown -std=c++17 %s -o - | FileCheck --check-prefixes=CHECK-DEVICE,CHECK-SPIR %s
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// RUN: %clang_cc1 -fsycl-is-device -emit-llvm -aux-triple x86_64-unknown-linux-gnu -triple spirv32-unknown-unknown -std=c++17 %s -o - | FileCheck --check-prefixes=CHECK-DEVICE,CHECK-SPIR %s
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// RUN: %clang_cc1 -fsycl-is-device -emit-llvm -aux-triple x86_64-unknown-linux-gnu -triple spirv64-unknown-unknown -std=c++17 %s -o - | FileCheck --check-prefixes=CHECK-DEVICE,CHECK-SPIR %s
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// RUN: %clang_cc1 -fsycl-is-host -emit-llvm -triple x86_64-pc-windows-msvc -std=c++17 %s -o - | FileCheck --check-prefixes=CHECK-HOST,CHECK-HOST-WINDOWS %s
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// RUN: %clang_cc1 -fsycl-is-device -emit-llvm -aux-triple x86_64-pc-windows-msvc -triple amdgcn-amd-amdhsa -std=c++17 %s -o - | FileCheck --check-prefixes=CHECK-DEVICE,CHECK-AMDGCN %s
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// RUN: %clang_cc1 -fsycl-is-device -emit-llvm -aux-triple x86_64-pc-windows-msvc -triple nvptx-nvidia-cuda -std=c++17 %s -o - | FileCheck --check-prefixes=CHECK-DEVICE,CHECK-NVPTX %s
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// RUN: %clang_cc1 -fsycl-is-device -emit-llvm -aux-triple x86_64-pc-windows-msvc -triple nvptx64-nvidia-cuda -std=c++17 %s -o - | FileCheck --check-prefixes=CHECK-DEVICE,CHECK-NVPTX %s
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// RUN: %clang_cc1 -fsycl-is-device -emit-llvm -aux-triple x86_64-pc-windows-msvc -triple spir-unknown-unknown -std=c++17 %s -o - | FileCheck --check-prefixes=CHECK-DEVICE,CHECK-SPIR %s
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// RUN: %clang_cc1 -fsycl-is-device -emit-llvm -aux-triple x86_64-pc-windows-msvc -triple spir64-unknown-unknown -std=c++17 %s -o - | FileCheck --check-prefixes=CHECK-DEVICE,CHECK-SPIR %s
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// RUN: %clang_cc1 -fsycl-is-device -emit-llvm -aux-triple x86_64-pc-windows-msvc -triple spirv32-unknown-unknown -std=c++17 %s -o - | FileCheck --check-prefixes=CHECK-DEVICE,CHECK-SPIR %s
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// RUN: %clang_cc1 -fsycl-is-device -emit-llvm -aux-triple x86_64-pc-windows-msvc -triple spirv64-unknown-unknown -std=c++17 %s -o - | FileCheck --check-prefixes=CHECK-DEVICE,CHECK-SPIR %s
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// RUN: %clang_cc1 -fsycl-is-host -emit-llvm -triple x86_64-uefi -std=c++17 %s -o - | FileCheck --check-prefixes=CHECK-HOST,CHECK-HOST-WINDOWS %s
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// RUN: %clang_cc1 -fsycl-is-device -emit-llvm -aux-triple x86_64-uefi -triple amdgcn-amd-amdhsa -std=c++17 %s -o - | FileCheck --check-prefixes=CHECK-DEVICE,CHECK-AMDGCN %s
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// RUN: %clang_cc1 -fsycl-is-device -emit-llvm -aux-triple x86_64-uefi -triple nvptx-nvidia-cuda -std=c++17 %s -o - | FileCheck --check-prefixes=CHECK-DEVICE,CHECK-NVPTX %s
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// RUN: %clang_cc1 -fsycl-is-device -emit-llvm -aux-triple x86_64-uefi -triple nvptx64-nvidia-cuda -std=c++17 %s -o - | FileCheck --check-prefixes=CHECK-DEVICE,CHECK-NVPTX %s
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// RUN: %clang_cc1 -fsycl-is-device -emit-llvm -aux-triple x86_64-uefi -triple spir-unknown-unknown -std=c++17 %s -o - | FileCheck --check-prefixes=CHECK-DEVICE,CHECK-SPIR %s
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// RUN: %clang_cc1 -fsycl-is-device -emit-llvm -aux-triple x86_64-uefi -triple spir64-unknown-unknown -std=c++17 %s -o - | FileCheck --check-prefixes=CHECK-DEVICE,CHECK-SPIR %s
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// RUN: %clang_cc1 -fsycl-is-device -emit-llvm -aux-triple x86_64-uefi -triple spirv32-unknown-unknown -std=c++17 %s -o - | FileCheck --check-prefixes=CHECK-DEVICE,CHECK-SPIR %s
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// RUN: %clang_cc1 -fsycl-is-device -emit-llvm -aux-triple x86_64-uefi -triple spirv64-unknown-unknown -std=c++17 %s -o - | FileCheck --check-prefixes=CHECK-DEVICE,CHECK-SPIR %s
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// Test the generation of SYCL kernel caller functions. These functions are
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// generated from functions declared with the sycl_kernel_entry_point attribute
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// and emited during device compilation. They are not emitted during device
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// compilation.
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struct single_purpose_kernel_name;
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struct single_purpose_kernel {
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void operator()() const {}
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};
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[[clang::sycl_kernel_entry_point(single_purpose_kernel_name)]]
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void single_purpose_kernel_task(single_purpose_kernel kernelFunc) {
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kernelFunc();
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}
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template <typename KernelName, typename KernelType>
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[[clang::sycl_kernel_entry_point(KernelName)]]
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void kernel_single_task(KernelType kernelFunc) {
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kernelFunc(42);
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}
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int main() {
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single_purpose_kernel obj;
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single_purpose_kernel_task(obj);
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int capture;
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auto lambda = [=](auto) { (void) capture; };
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kernel_single_task<decltype(lambda)>(lambda);
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}
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// Verify that SYCL kernel caller functions are not emitted during host
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// compilation.
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//
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// CHECK-HOST-NOT: _ZTS26single_purpose_kernel_name
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// CHECK-HOST-NOT: _ZTSZ4mainE18lambda_kernel_name
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// Verify that sycl_kernel_entry_point attributed functions are not emitted
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// during device compilation.
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//
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// CHECK-DEVICE-NOT: single_purpose_kernel_task
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// CHECK-DEVICE-NOT: kernel_single_task
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// Verify that no code is generated for the bodies of sycl_kernel_entry_point
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// attributed functions during host compilation. ODR-use of these functions may
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// require them to be emitted, but they have no effect if called.
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//
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// CHECK-HOST-LINUX: define dso_local void @_Z26single_purpose_kernel_task21single_purpose_kernel() #{{[0-9]+}} {
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// CHECK-HOST-LINUX-NEXT: entry:
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// CHECK-HOST-LINUX-NEXT: %kernelFunc = alloca %struct.single_purpose_kernel, align 1
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// CHECK-HOST-LINUX-NEXT: ret void
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// CHECK-HOST-LINUX-NEXT: }
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//
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// CHECK-HOST-LINUX: define internal void @_Z18kernel_single_taskIZ4mainEUlT_E_S1_EvT0_(i32 %kernelFunc.coerce) #{{[0-9]+}} {
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// CHECK-HOST-LINUX-NEXT: entry:
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// CHECK-HOST-LINUX-NEXT: %kernelFunc = alloca %class.anon, align 4
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// CHECK-HOST-LINUX-NEXT: %coerce.dive = getelementptr inbounds nuw %class.anon, ptr %kernelFunc, i32 0, i32 0
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// CHECK-HOST-LINUX-NEXT: store i32 %kernelFunc.coerce, ptr %coerce.dive, align 4
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// CHECK-HOST-LINUX-NEXT: ret void
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// CHECK-HOST-LINUX-NEXT: }
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//
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// CHECK-HOST-WINDOWS: define dso_local void @"?single_purpose_kernel_task@@YAXUsingle_purpose_kernel@@@Z"(i8 %kernelFunc.coerce) #{{[0-9]+}} {
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// CHECK-HOST-WINDOWS-NEXT: entry:
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// CHECK-HOST-WINDOWS-NEXT: %kernelFunc = alloca %struct.single_purpose_kernel, align 1
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// CHECK-HOST-WINDOWS-NEXT: %coerce.dive = getelementptr inbounds nuw %struct.single_purpose_kernel, ptr %kernelFunc, i32 0, i32 0
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// CHECK-HOST-WINDOWS-NEXT: store i8 %kernelFunc.coerce, ptr %coerce.dive, align 1
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// CHECK-HOST-WINDOWS-NEXT: ret void
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// CHECK-HOST-WINDOWS-NEXT: }
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//
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// CHECK-HOST-WINDOWS: define internal void @"??$kernel_single_task@V<lambda_1>@?0??main@@9@V1?0??2@9@@@YAXV<lambda_1>@?0??main@@9@@Z"(i32 %kernelFunc.coerce) #{{[0-9]+}} {
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// CHECK-HOST-WINDOWS-NEXT: entry:
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// CHECK-HOST-WINDOWS-NEXT: %kernelFunc = alloca %class.anon, align 4
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// CHECK-HOST-WINDOWS-NEXT: %coerce.dive = getelementptr inbounds nuw %class.anon, ptr %kernelFunc, i32 0, i32 0
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// CHECK-HOST-WINDOWS-NEXT: store i32 %kernelFunc.coerce, ptr %coerce.dive, align 4
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// CHECK-HOST-WINDOWS-NEXT: ret void
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// CHECK-HOST-WINDOWS-NEXT: }
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// Verify that SYCL kernel caller functions are emitted for each device target.
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//
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// main() shouldn't be emitted in device code.
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// CHECK-NOT: @main()
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// IR for the SYCL kernel caller function generated for
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// single_purpose_kernel_task with single_purpose_kernel_name as the SYCL kernel
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// name type.
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//
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// CHECK-AMDGCN: Function Attrs: convergent mustprogress noinline norecurse nounwind optnone
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// CHECK-AMDGCN-NEXT: define dso_local amdgpu_kernel void @_ZTS26single_purpose_kernel_name
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// CHECK-AMDGCN-SAME: (ptr addrspace(4) noundef byref(%struct.single_purpose_kernel) align 1 %0) #[[AMDGCN_ATTR0:[0-9]+]] {
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// CHECK-AMDGCN-NEXT: entry:
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// CHECK-AMDGCN-NEXT: %coerce = alloca %struct.single_purpose_kernel, align 1, addrspace(5)
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// CHECK-AMDGCN-NEXT: %kernelFunc = addrspacecast ptr addrspace(5) %coerce to ptr
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// CHECK-AMDGCN-NEXT: call void @llvm.memcpy.p0.p4.i64(ptr align 1 %kernelFunc, ptr addrspace(4) align 1 %0, i64 1, i1 false)
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// CHECK-AMDGCN-NEXT: call void @_ZNK21single_purpose_kernelclEv
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// CHECK-AMDGCN-SAME: (ptr noundef nonnull align 1 dereferenceable(1) %kernelFunc) #[[AMDGCN_ATTR1:[0-9]+]]
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// CHECK-AMDGCN-NEXT: ret void
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// CHECK-AMDGCN-NEXT: }
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// CHECK-AMDGCN: define linkonce_odr void @_ZNK21single_purpose_kernelclEv
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//
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// CHECK-NVPTX: Function Attrs: convergent mustprogress noinline norecurse nounwind optnone
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// CHECK-NVPTX-NEXT: define dso_local ptx_kernel void @_ZTS26single_purpose_kernel_name
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// CHECK-NVPTX-SAME: (ptr noundef byval(%struct.single_purpose_kernel) align 1 %kernelFunc) #[[NVPTX_ATTR0:[0-9]+]] {
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// CHECK-NVPTX-NEXT: entry:
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// CHECK-NVPTX-NEXT: call void @_ZNK21single_purpose_kernelclEv
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// CHECK-NVPTX-SAME: (ptr noundef nonnull align 1 dereferenceable(1) %kernelFunc) #[[NVPTX_ATTR1:[0-9]+]]
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// CHECK-NVPTX-NEXT: ret void
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// CHECK-NVPTX-NEXT: }
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// CHECK-NVPTX: define linkonce_odr void @_ZNK21single_purpose_kernelclEv
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//
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// CHECK-SPIR: Function Attrs: convergent mustprogress noinline norecurse nounwind optnone
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// CHECK-SPIR-NEXT: define {{[a-z_ ]*}}spir_kernel void @_ZTS26single_purpose_kernel_name
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// CHECK-SPIR-SAME: (ptr noundef byval(%struct.single_purpose_kernel) align 1 %kernelFunc) #[[SPIR_ATTR0:[0-9]+]] {
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// CHECK-SPIR-NEXT: entry:
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// CHECK-SPIR-NEXT: %kernelFunc.ascast = addrspacecast ptr %kernelFunc to ptr addrspace(4)
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// CHECK-SPIR-NEXT: call spir_func void @_ZNK21single_purpose_kernelclEv
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// CHECK-SPIR-SAME: (ptr addrspace(4) noundef align 1 dereferenceable_or_null(1) %kernelFunc.ascast) #[[SPIR_ATTR1:[0-9]+]]
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// CHECK-SPIR-NEXT: ret void
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// CHECK-SPIR-NEXT: }
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// CHECK-SPIR: define linkonce_odr spir_func void @_ZNK21single_purpose_kernelclEv
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// IR for the SYCL kernel caller function generated for kernel_single_task with
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// lambda_kernel_name as the SYCL kernel name type.
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//
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// CHECK-AMDGCN: Function Attrs: convergent mustprogress noinline norecurse nounwind optnone
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// CHECK-AMDGCN-NEXT: define dso_local amdgpu_kernel void @_ZTSZ4mainEUlT_E_
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// CHECK-AMDGCN-SAME: (i32 %kernelFunc.coerce) #[[AMDGCN_ATTR0]] {
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// CHECK-AMDGCN-NEXT: entry:
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// CHECK-AMDGCN-NEXT: %kernelFunc = alloca %class.anon, align 4, addrspace(5)
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// CHECK-AMDGCN-NEXT: %kernelFunc1 = addrspacecast ptr addrspace(5) %kernelFunc to ptr
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// CHECK-AMDGCN-NEXT: %coerce.dive = getelementptr inbounds nuw %class.anon, ptr %kernelFunc1, i32 0, i32 0
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// CHECK-AMDGCN-NEXT: store i32 %kernelFunc.coerce, ptr %coerce.dive, align 4
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// CHECK-AMDGCN-NEXT: call void @_ZZ4mainENKUlT_E_clIiEEDaS_
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// CHECK-AMDGCN-SAME: (ptr noundef nonnull align 4 dereferenceable(4) %kernelFunc1, i32 noundef 42) #[[AMDGCN_ATTR1]]
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// CHECK-AMDGCN-NEXT: ret void
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// CHECK-AMDGCN-NEXT: }
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// CHECK-AMDGCN: define internal void @_ZZ4mainENKUlT_E_clIiEEDaS_
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//
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// CHECK-NVPTX: Function Attrs: convergent mustprogress noinline norecurse nounwind optnone
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// CHECK-NVPTX-NEXT: define dso_local ptx_kernel void @_ZTSZ4mainEUlT_E_
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// CHECK-NVPTX-SAME: (ptr noundef byval(%class.anon) align 4 %kernelFunc) #[[NVPTX_ATTR0]] {
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// CHECK-NVPTX-NEXT: entry:
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// CHECK-NVPTX-NEXT: call void @_ZZ4mainENKUlT_E_clIiEEDaS_
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// CHECK-NVPTX-SAME: (ptr noundef nonnull align 4 dereferenceable(4) %kernelFunc, i32 noundef 42) #[[NVPTX_ATTR1]]
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// CHECK-NVPTX-NEXT: ret void
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// CHECK-NVPTX-NEXT: }
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// CHECK-NVPTX: define internal void @_ZZ4mainENKUlT_E_clIiEEDaS_
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//
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// CHECK-SPIR: Function Attrs: convergent mustprogress noinline norecurse nounwind optnone
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// CHECK-SPIR-NEXT: define {{[a-z_ ]*}}spir_kernel void @_ZTSZ4mainEUlT_E_
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// CHECK-SPIR-SAME: (ptr noundef byval(%class.anon) align 4 %kernelFunc) #[[SPIR_ATTR0]] {
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// CHECK-SPIR-NEXT: entry:
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// CHECK-SPIR-NEXT: %kernelFunc.ascast = addrspacecast ptr %kernelFunc to ptr addrspace(4)
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// CHECK-SPIR-NEXT: call spir_func void @_ZZ4mainENKUlT_E_clIiEEDaS_
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// CHECK-SPIR-SAME: (ptr addrspace(4) noundef align 4 dereferenceable_or_null(4) %kernelFunc.ascast, i32 noundef 42) #[[SPIR_ATTR1]]
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// CHECK-SPIR-NEXT: ret void
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// CHECK-SPIR-NEXT: }
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// CHECK-SPIR: define internal spir_func void @_ZZ4mainENKUlT_E_clIiEEDaS_
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// CHECK-AMDGCN: #[[AMDGCN_ATTR0]] = { convergent mustprogress noinline norecurse nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
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// CHECK-AMDGCN: #[[AMDGCN_ATTR1]] = { convergent nounwind }
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//
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// CHECK-NVPTX: #[[NVPTX_ATTR0]] = { convergent mustprogress noinline norecurse nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
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// CHECK-NVPTX: #[[NVPTX_ATTR1]] = { convergent nounwind }
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//
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// CHECK-SPIR: #[[SPIR_ATTR0]] = { convergent mustprogress noinline norecurse nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
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// CHECK-SPIR: #[[SPIR_ATTR1]] = { convergent nounwind }
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