This adds support for using `ATTACH` map-type for proper pointer-attachment when mapping list-items that have base-pointers. For example, for the following: ```c int *p; #pragma omp target enter data map(p[1:10]) ``` The following maps are now emitted by clang: ``` (A) &p[0], &p[1], 10 * sizeof(p[1]), TO | FROM &p, &p[1], sizeof(p), ATTACH ``` Previously, the two possible maps emitted by clang were: ``` (B) &p[0], &p[1], 10 * sizeof(p[1]), TO | FROM (C) &p, &p[1], 10 * sizeof(p[1]), TO | FROM | PTR_AND_OBJ ```` (B) does not perform any pointer attachment, while (C) also maps the pointer p, both of which are incorrect. ----- With this change, we are using ATTACH-style maps, like `(A)`, for cases where the expression has a base-pointer. For example: ```cpp int *p, **pp; S *ps, **pps; ... map(p[0]) ... map(p[10:20]) ... map(*p) ... map(([20])p) ... map(ps->a) ... map(pps->p->a) ... map(pp[0][0]) ... map(*(pp + 10)[0]) ``` #### Grouping of maps based on attach base-pointers We also group mapping of clauses with the same base decl in the order of the increasing complexity of their base-pointers, e.g. for something like: ``` S **spp; map(spp[0][0], spp[0][0].a), // attach-ptr: spp[0] map(spp[0]), // attach-ptr: spp map(spp), // attach-ptr: N/A ``` We first map `spp`, then `spp[0]` then `spp[0][0]` and `spp[0][0].a`. This allows us to also group "struct" allocation based on their attach pointers. This resolves the issues of us always mapping everything from the beginning of the symbol `spp`. Each group is mapped independently, and at the same level, like `spp[0][0]` and its member `spp[0][0].a`, we still get map them together as part of the same contiguous struct `spp[0][0]`. This resolves issue #141042. #### use_device_ptr/addr fixes The handling of `use_device_ptr/addr` was updated to use the attach-ptr information, and works for many cases that were failing before. It has to be done as part of this series because otherwise, the switch from ptr_to_obj to attach-style mapping would have caused regressions in existing use_device_ptr/addr tests. #### Handling of attach-pointers that are members of implicitly mapped structs: * When a struct member-pointer, like `p` below, is a base-pointer in a `map` clause on a target construct (like `map(p[0:1])`, and the base of that struct is either the `this` pointer (implicitly or explicitly), or a struct that is implicitly mapped on that construct, we add an implicit `map(p)` so that we don't implicitly map the full struct. ```c struct S { int *p; void f1() { #pragma omp target map(p[0:1]) // Implicitly map this->p, to ensure // that the implicit map of `this[:]` does // not map the full struct printf("%p %p\n", &p, p); } ``` #### Scope for improvement: * We may be able to compute attach-ptr expr while collecting component-lists in Sema. * But we cache the computation results already, and `findAttachPtrExpr` is fairly simple, and fast. * There may be a better way to implement semantic expr comparison. #### Needs future work: * Attach-style maps not yet emitted for declare mappers. * Mapping of class member references: We are still using PTR_AND_OBJ maps for them. We will likely need to change that to handle `ref_ptr/ref_ptee`, and `attach` map-type-modifier on them. * Implicit capturing of "this" needs to map the full `this[0:1]` unless there is an explicit map on one of the members, or a map with a member as its base-pointer. * Implicit map added for capturing a class member pointer needs to also add a zero-length-array-section map. * `use_device_addr` on array-sections-on-pointers need further improvements (documented using FIXMEs) #### Why a large PR While it's unfortunate that this PR has gotten large and difficult to review, the issue is that all the functional changes have to be made together, to prevent regressions from partially implemented changes. For example, the changes to capturing were previously done separately (#145454), but they would still cause stability issues in absence of full attach-mapping. And attach-mapping needs those changes to be able to launch kernels. We extracted the utilities and functions, like those for finding attach-ptrs, or comparing exprs, out as a separate NFC PR that doesn't call those functions, just adds them (#155625). Maybe the change that adds a new error message for use_device_addr on array-sections with non-var base-pointers could have been extracted out too (but that would have had to be a follow-up change in that case, and we would get comp-fails with this PR when the erroneous case was not caught/diagnosed). --------- Co-authored-by: Alex Duran <alejandro.duran@intel.com>
994 lines
74 KiB
C++
994 lines
74 KiB
C++
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --check-globals all --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ --global-value-regex "\.offload_.*" --global-hex-value-regex ".offload_maptypes.*" --version 5
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// RUN: %clang_cc1 -verify -Wno-vla -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck %s
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// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s
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// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s
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// RUN: %clang_cc1 -DOMP60 -verify -Wno-vla -fopenmp -fopenmp-version=60 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck --check-prefix OMP60 %s
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// RUN: %clang_cc1 -DOMP60 -fopenmp -fopenmp-version=60 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s
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// RUN: %clang_cc1 -DOMP60 -fopenmp -fopenmp-version=60 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck --check-prefix OMP60 %s
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// RUN: %clang_cc1 -verify -Wno-vla -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s
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// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s
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// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s
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// RUN: %clang_cc1 -DOMP60 -verify -Wno-vla -fopenmp-simd -fopenmp-version=60 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0-OMP60 %s
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// RUN: %clang_cc1 -DOMP60 -fopenmp-simd -fopenmp-version=60 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s
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// RUN: %clang_cc1 -DOMP60 -fopenmp-simd -fopenmp-version=60 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0-OMP60 %s
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// expected-no-diagnostics
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#ifndef HEADER
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#define HEADER
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struct S {
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int a = 0;
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int *ptr = &a;
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int &ref = a;
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int arr[4];
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S() {}
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void foo() {
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// &this[0], &this->a, sizeof(this[0].(a-to-arr[a]), ALLOC
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// &this[0], &this->a, sizeof(a), TO | FROM | RETURN_PARAM | MEMBER_OF(1)
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// &this[0], &ref_ptee(this->ref), sizeof(this->ref[0]), TO | FROM | PTR_AND_OBJ | RETURN_PARAM | MEMBER_OF(1)
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// &this[0], &this->arr[0], 4 * sizeof(arr[0]), TO | FROM | RETURN_PARAM | MEMBER_OF(1)
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// &ptr[0], &ptr[3], 4 * sizeof(ptr[0]), TO | FROM | RETURN_PARAM
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// &ptr[0], &ptr[0], 1 * sizeof(ptr[0]), TO | FROM
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// [ &ptr[0], &ptr[0], 8, TO | FROM ] // ptr[:] (OMP60)
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// &ptr, &ptr[0], sizeof(void*), ATTACH
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// TODO: Check why the size for map(ptr[:]) is 8, instead of 0
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#ifdef OMP60
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#pragma omp target data map(tofrom: a, ptr [3:4], ref, ptr[0], arr[:a], ptr[:]) use_device_addr(a, ptr [3:4], ref, ptr[0], arr[:a], ptr[:])
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#else
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#pragma omp target data map(tofrom: a, ptr [3:4], ref, ptr[0], arr[:a]) use_device_addr(a, ptr [3:4], ref, ptr[0], arr[:a])
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#endif // OMP60
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++a, ++*ptr, ++ref, ++arr[0];
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}
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};
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#ifdef OMP60
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int main(int argc, char *argv[]) {
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#else
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int main() {
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#endif // OMP60
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float a = 0;
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float *ptr = &a;
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float &ref = a;
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float arr[4];
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float vla[(int)a];
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S s;
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s.foo();
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#ifdef OMP60
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// &a, &a, sizeof(a), TO | FROM | RETURN_PARAM
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// &ptr[0], &ptr[3], 4 * sizeof(ptr[3]), TO | FROM | RETURN_PARAM
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// &ptr[0], &ptr[0], sizeof(ptr[0]), TO | FROM
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// [ &ptr[0], &ptr[0], 8, TO | FROM ] // ptr[:] (OMP60)
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// &ptr, &ptr[0], sizeof(void*), ATTACH
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// &ref_ptee(ref), &ref_ptee(ref), sizeof(ref_ptee(ref)), TO | FROM | RETURN_PARAM
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// &arr, &arr[0], a * sizeof(arr[0]), TO | FROM | RETURN_PARAM
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// &vla, &vla[0], sizeof(vla[0]), TO | FROM | RETURN_PARAM
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// [ &argv[0][0], &argv[0][0], 8, TO | FROM ] // argv[0][:] (OPM60)
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// [ &argv[0], &argv[0][0], 8, ATTACH ] // argv[0][:] (OMP60)
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// NOTE: use_device_addr(argv[0][:]) is illegal, because the base-pointer,
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// argv[0], is not a named variable.
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#pragma omp target data map(tofrom: a, ptr [3:4], ref, ptr[0], arr[:(int)a], vla[0], ptr[:], argv[0][:]) use_device_addr(a, ptr [3:4], ref, ptr[0], arr[:(int)a], vla[0], ptr[:])
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#else
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#pragma omp target data map(tofrom: a, ptr [3:4], ref, ptr[0], arr[:(int)a], vla[0]) use_device_addr(a, ptr [3:4], ref, ptr[0], arr[:(int)a], vla[0])
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#endif // OMP60
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++a, ++*ptr, ++ref, ++arr[0], ++vla[0];
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return a;
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}
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#endif
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//.
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// CHECK: @.offload_sizes = private unnamed_addr constant [7 x i64] [i64 4, i64 16, i64 4, i64 8, i64 4, i64 0, i64 4]
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// CHECK: @.offload_maptypes = private unnamed_addr constant [7 x i64] [i64 [[#0x43]], i64 [[#0x43]], i64 [[#0x3]], i64 [[#0x4000]], i64 [[#0x43]], i64 [[#0x43]], i64 [[#0x43]]]
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// CHECK: @.offload_sizes.1 = private unnamed_addr constant [7 x i64] [i64 0, i64 4, i64 4, i64 0, i64 16, i64 4, i64 8]
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// CHECK: @.offload_maptypes.2 = private unnamed_addr constant [7 x i64] [i64 [[#0x0]], i64 [[#0x1000000000043]], i64 [[#0x1000000000053]], i64 [[#0x1000000000043]], i64 [[#0x43]], i64 [[#0x3]], i64 [[#0x4000]]]
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//.
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// OMP60: @.offload_sizes = private unnamed_addr constant [10 x i64] [i64 4, i64 16, i64 4, i64 8, i64 8, i64 4, i64 0, i64 4, i64 8, i64 8]
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// OMP60: @.offload_maptypes = private unnamed_addr constant [10 x i64] [i64 [[#0x43]], i64 [[#0x43]], i64 [[#0x3]], i64 [[#0x3]], i64 [[#0x4000]], i64 [[#0x43]], i64 [[#0x43]], i64 [[#0x43]], i64 [[#0x3]], i64 [[#0x4000]]]
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// OMP60: @.offload_sizes.1 = private unnamed_addr constant [8 x i64] [i64 0, i64 4, i64 4, i64 0, i64 16, i64 4, i64 8, i64 8]
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// OMP60: @.offload_maptypes.2 = private unnamed_addr constant [8 x i64] [i64 [[#0x0]], i64 [[#0x1000000000043]], i64 [[#0x1000000000053]], i64 [[#0x1000000000043]], i64 [[#0x43]], i64 [[#0x3]], i64 [[#0x3]], i64 [[#0x4000]]]
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//.
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// CHECK-LABEL: define dso_local noundef signext i32 @main(
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// CHECK-SAME: ) #[[ATTR0:[0-9]+]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
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// CHECK-NEXT: [[A:%.*]] = alloca float, align 4
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// CHECK-NEXT: [[PTR:%.*]] = alloca ptr, align 8
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// CHECK-NEXT: [[REF:%.*]] = alloca ptr, align 8
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// CHECK-NEXT: [[ARR:%.*]] = alloca [4 x float], align 4
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// CHECK-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 8
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// CHECK-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
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// CHECK-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
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// CHECK-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [7 x ptr], align 8
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// CHECK-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [7 x ptr], align 8
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// CHECK-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [7 x ptr], align 8
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// CHECK-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [7 x i64], align 8
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// CHECK-NEXT: [[TMP:%.*]] = alloca ptr, align 8
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// CHECK-NEXT: store i32 0, ptr [[RETVAL]], align 4
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// CHECK-NEXT: store float 0.000000e+00, ptr [[A]], align 4
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// CHECK-NEXT: store ptr [[A]], ptr [[PTR]], align 8
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// CHECK-NEXT: store ptr [[A]], ptr [[REF]], align 8
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// CHECK-NEXT: [[TMP0:%.*]] = load float, ptr [[A]], align 4
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// CHECK-NEXT: [[CONV:%.*]] = fptosi float [[TMP0]] to i32
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// CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[CONV]] to i64
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// CHECK-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0()
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// CHECK-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 8
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// CHECK-NEXT: [[VLA:%.*]] = alloca float, i64 [[TMP1]], align 4
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// CHECK-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8
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// CHECK-NEXT: call void @_ZN1SC1Ev(ptr noundef nonnull align 8 dereferenceable(40) [[S]])
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// CHECK-NEXT: call void @_ZN1S3fooEv(ptr noundef nonnull align 8 dereferenceable(40) [[S]])
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// CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[PTR]], align 8
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// CHECK-NEXT: [[TMP4:%.*]] = load ptr, ptr [[PTR]], align 8
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// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw float, ptr [[TMP4]], i64 3
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// CHECK-NEXT: [[TMP5:%.*]] = load ptr, ptr [[PTR]], align 8
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// CHECK-NEXT: [[TMP6:%.*]] = load ptr, ptr [[PTR]], align 8
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// CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds float, ptr [[TMP6]], i64 0
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// CHECK-NEXT: [[TMP7:%.*]] = load ptr, ptr [[REF]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
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// CHECK-NEXT: [[TMP8:%.*]] = load ptr, ptr [[REF]], align 8, !nonnull [[META3]], !align [[META4]]
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// CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds nuw [4 x float], ptr [[ARR]], i64 0, i64 0
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// CHECK-NEXT: [[TMP9:%.*]] = load float, ptr [[A]], align 4
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// CHECK-NEXT: [[CONV3:%.*]] = fptosi float [[TMP9]] to i32
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// CHECK-NEXT: [[CONV4:%.*]] = sext i32 [[CONV3]] to i64
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// CHECK-NEXT: [[TMP10:%.*]] = mul nuw i64 [[CONV4]], 4
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// CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds float, ptr [[VLA]], i64 0
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes, i64 56, i1 false)
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// CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
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// CHECK-NEXT: store ptr [[A]], ptr [[TMP11]], align 8
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// CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
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// CHECK-NEXT: store ptr [[A]], ptr [[TMP12]], align 8
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// CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
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// CHECK-NEXT: store ptr null, ptr [[TMP13]], align 8
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// CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
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// CHECK-NEXT: store ptr [[TMP3]], ptr [[TMP14]], align 8
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// CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
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// CHECK-NEXT: store ptr [[ARRAYIDX]], ptr [[TMP15]], align 8
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// CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
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// CHECK-NEXT: store ptr null, ptr [[TMP16]], align 8
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// CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
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// CHECK-NEXT: store ptr [[TMP5]], ptr [[TMP17]], align 8
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// CHECK-NEXT: [[TMP18:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
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// CHECK-NEXT: store ptr [[ARRAYIDX1]], ptr [[TMP18]], align 8
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// CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
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// CHECK-NEXT: store ptr null, ptr [[TMP19]], align 8
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// CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
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// CHECK-NEXT: store ptr [[PTR]], ptr [[TMP20]], align 8
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// CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
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// CHECK-NEXT: store ptr [[ARRAYIDX1]], ptr [[TMP21]], align 8
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// CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
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// CHECK-NEXT: store ptr null, ptr [[TMP22]], align 8
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// CHECK-NEXT: [[TMP23:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
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// CHECK-NEXT: store ptr [[TMP7]], ptr [[TMP23]], align 8
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// CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4
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// CHECK-NEXT: store ptr [[TMP8]], ptr [[TMP24]], align 8
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// CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
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// CHECK-NEXT: store ptr null, ptr [[TMP25]], align 8
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// CHECK-NEXT: [[TMP26:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 5
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// CHECK-NEXT: store ptr [[ARR]], ptr [[TMP26]], align 8
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// CHECK-NEXT: [[TMP27:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 5
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// CHECK-NEXT: store ptr [[ARRAYIDX2]], ptr [[TMP27]], align 8
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// CHECK-NEXT: [[TMP28:%.*]] = getelementptr inbounds [7 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 5
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// CHECK-NEXT: store i64 [[TMP10]], ptr [[TMP28]], align 8
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// CHECK-NEXT: [[TMP29:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 5
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// CHECK-NEXT: store ptr null, ptr [[TMP29]], align 8
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// CHECK-NEXT: [[TMP30:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 6
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// CHECK-NEXT: store ptr [[VLA]], ptr [[TMP30]], align 8
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// CHECK-NEXT: [[TMP31:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 6
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// CHECK-NEXT: store ptr [[ARRAYIDX5]], ptr [[TMP31]], align 8
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// CHECK-NEXT: [[TMP32:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 6
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// CHECK-NEXT: store ptr null, ptr [[TMP32]], align 8
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// CHECK-NEXT: [[TMP33:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
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// CHECK-NEXT: [[TMP34:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
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// CHECK-NEXT: [[TMP35:%.*]] = getelementptr inbounds [7 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0
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// CHECK-NEXT: call void @__tgt_target_data_begin_mapper(ptr @[[GLOB1:[0-9]+]], i64 -1, i32 7, ptr [[TMP33]], ptr [[TMP34]], ptr [[TMP35]], ptr @.offload_maptypes, ptr null, ptr null)
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// CHECK-NEXT: [[TMP36:%.*]] = load ptr, ptr [[TMP11]], align 8
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// CHECK-NEXT: [[TMP37:%.*]] = load ptr, ptr [[TMP23]], align 8
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|
// CHECK-NEXT: store ptr [[TMP37]], ptr [[TMP]], align 8
|
|
// CHECK-NEXT: [[TMP38:%.*]] = load ptr, ptr [[TMP26]], align 8
|
|
// CHECK-NEXT: [[TMP39:%.*]] = load ptr, ptr [[TMP30]], align 8
|
|
// CHECK-NEXT: [[TMP40:%.*]] = load float, ptr [[TMP36]], align 4
|
|
// CHECK-NEXT: [[INC:%.*]] = fadd float [[TMP40]], 1.000000e+00
|
|
// CHECK-NEXT: store float [[INC]], ptr [[TMP36]], align 4
|
|
// CHECK-NEXT: [[TMP41:%.*]] = load ptr, ptr [[TMP14]], align 8
|
|
// CHECK-NEXT: [[TMP42:%.*]] = load float, ptr [[TMP41]], align 4
|
|
// CHECK-NEXT: [[INC6:%.*]] = fadd float [[TMP42]], 1.000000e+00
|
|
// CHECK-NEXT: store float [[INC6]], ptr [[TMP41]], align 4
|
|
// CHECK-NEXT: [[TMP43:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META3]], !align [[META4]]
|
|
// CHECK-NEXT: [[TMP44:%.*]] = load float, ptr [[TMP43]], align 4
|
|
// CHECK-NEXT: [[INC7:%.*]] = fadd float [[TMP44]], 1.000000e+00
|
|
// CHECK-NEXT: store float [[INC7]], ptr [[TMP43]], align 4
|
|
// CHECK-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [4 x float], ptr [[TMP38]], i64 0, i64 0
|
|
// CHECK-NEXT: [[TMP45:%.*]] = load float, ptr [[ARRAYIDX8]], align 4
|
|
// CHECK-NEXT: [[INC9:%.*]] = fadd float [[TMP45]], 1.000000e+00
|
|
// CHECK-NEXT: store float [[INC9]], ptr [[ARRAYIDX8]], align 4
|
|
// CHECK-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds float, ptr [[TMP39]], i64 0
|
|
// CHECK-NEXT: [[TMP46:%.*]] = load float, ptr [[ARRAYIDX10]], align 4
|
|
// CHECK-NEXT: [[INC11:%.*]] = fadd float [[TMP46]], 1.000000e+00
|
|
// CHECK-NEXT: store float [[INC11]], ptr [[ARRAYIDX10]], align 4
|
|
// CHECK-NEXT: [[TMP47:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
|
|
// CHECK-NEXT: [[TMP48:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
|
|
// CHECK-NEXT: [[TMP49:%.*]] = getelementptr inbounds [7 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0
|
|
// CHECK-NEXT: call void @__tgt_target_data_end_mapper(ptr @[[GLOB1]], i64 -1, i32 7, ptr [[TMP47]], ptr [[TMP48]], ptr [[TMP49]], ptr @.offload_maptypes, ptr null, ptr null)
|
|
// CHECK-NEXT: [[TMP50:%.*]] = load float, ptr [[A]], align 4
|
|
// CHECK-NEXT: [[CONV12:%.*]] = fptosi float [[TMP50]] to i32
|
|
// CHECK-NEXT: store i32 [[CONV12]], ptr [[RETVAL]], align 4
|
|
// CHECK-NEXT: [[TMP51:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8
|
|
// CHECK-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP51]])
|
|
// CHECK-NEXT: [[TMP52:%.*]] = load i32, ptr [[RETVAL]], align 4
|
|
// CHECK-NEXT: ret i32 [[TMP52]]
|
|
//
|
|
//
|
|
// CHECK-LABEL: define linkonce_odr void @_ZN1SC1Ev(
|
|
// CHECK-SAME: ptr noundef nonnull align 8 dereferenceable(40) [[THIS:%.*]]) unnamed_addr #[[ATTR2:[0-9]+]] comdat {
|
|
// CHECK-NEXT: [[ENTRY:.*:]]
|
|
// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
|
|
// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
|
|
// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
|
|
// CHECK-NEXT: call void @_ZN1SC2Ev(ptr noundef nonnull align 8 dereferenceable(40) [[THIS1]])
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK-LABEL: define linkonce_odr void @_ZN1S3fooEv(
|
|
// CHECK-SAME: ptr noundef nonnull align 8 dereferenceable(40) [[THIS:%.*]]) #[[ATTR2]] comdat {
|
|
// CHECK-NEXT: [[ENTRY:.*:]]
|
|
// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
|
|
// CHECK-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [7 x ptr], align 8
|
|
// CHECK-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [7 x ptr], align 8
|
|
// CHECK-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [7 x ptr], align 8
|
|
// CHECK-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [7 x i64], align 8
|
|
// CHECK-NEXT: [[TMP:%.*]] = alloca ptr, align 8
|
|
// CHECK-NEXT: [[_TMP11:%.*]] = alloca ptr, align 8
|
|
// CHECK-NEXT: [[_TMP12:%.*]] = alloca ptr, align 8
|
|
// CHECK-NEXT: [[_TMP13:%.*]] = alloca ptr, align 8
|
|
// CHECK-NEXT: [[_TMP14:%.*]] = alloca ptr, align 8
|
|
// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
|
|
// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
|
|
// CHECK-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
|
|
// CHECK-NEXT: [[REF:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 2
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[REF]], align 8, !nonnull [[META3]], !align [[META4]]
|
|
// CHECK-NEXT: [[ARR:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 3
|
|
// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [4 x i32], ptr [[ARR]], i64 0, i64 0
|
|
// CHECK-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 0
|
|
// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[A2]], align 8
|
|
// CHECK-NEXT: [[CONV:%.*]] = sext i32 [[TMP1]] to i64
|
|
// CHECK-NEXT: [[TMP2:%.*]] = mul nuw i64 [[CONV]], 4
|
|
// CHECK-NEXT: [[A3:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 0
|
|
// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[A3]], align 8
|
|
// CHECK-NEXT: [[TMP4:%.*]] = sext i32 [[TMP3]] to i64
|
|
// CHECK-NEXT: [[LB_ADD_LEN:%.*]] = add nsw i64 -1, [[TMP4]]
|
|
// CHECK-NEXT: [[ARR4:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 3
|
|
// CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds nuw [4 x i32], ptr [[ARR4]], i64 0, i64 [[LB_ADD_LEN]]
|
|
// CHECK-NEXT: [[TMP5:%.*]] = getelementptr i32, ptr [[ARRAYIDX5]], i32 1
|
|
// CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64
|
|
// CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[A]] to i64
|
|
// CHECK-NEXT: [[TMP8:%.*]] = sub i64 [[TMP6]], [[TMP7]]
|
|
// CHECK-NEXT: [[TMP9:%.*]] = sdiv exact i64 [[TMP8]], ptrtoint (ptr getelementptr (i8, ptr null, i32 1) to i64)
|
|
// CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 1
|
|
// CHECK-NEXT: [[TMP10:%.*]] = load ptr, ptr [[PTR]], align 8
|
|
// CHECK-NEXT: [[PTR6:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 1
|
|
// CHECK-NEXT: [[TMP11:%.*]] = load ptr, ptr [[PTR6]], align 8
|
|
// CHECK-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds nuw i32, ptr [[TMP11]], i64 3
|
|
// CHECK-NEXT: [[PTR8:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 1
|
|
// CHECK-NEXT: [[TMP12:%.*]] = load ptr, ptr [[PTR8]], align 8
|
|
// CHECK-NEXT: [[PTR9:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 1
|
|
// CHECK-NEXT: [[TMP13:%.*]] = load ptr, ptr [[PTR9]], align 8
|
|
// CHECK-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i64 0
|
|
// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes.1, i64 56, i1 false)
|
|
// CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
|
|
// CHECK-NEXT: store ptr [[THIS1]], ptr [[TMP14]], align 8
|
|
// CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
|
|
// CHECK-NEXT: store ptr [[A]], ptr [[TMP15]], align 8
|
|
// CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds [7 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0
|
|
// CHECK-NEXT: store i64 [[TMP9]], ptr [[TMP16]], align 8
|
|
// CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
|
|
// CHECK-NEXT: store ptr null, ptr [[TMP17]], align 8
|
|
// CHECK-NEXT: [[TMP18:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
|
|
// CHECK-NEXT: store ptr [[THIS1]], ptr [[TMP18]], align 8
|
|
// CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
|
|
// CHECK-NEXT: store ptr [[A]], ptr [[TMP19]], align 8
|
|
// CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
|
|
// CHECK-NEXT: store ptr null, ptr [[TMP20]], align 8
|
|
// CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
|
|
// CHECK-NEXT: store ptr [[THIS1]], ptr [[TMP21]], align 8
|
|
// CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
|
|
// CHECK-NEXT: store ptr [[TMP0]], ptr [[TMP22]], align 8
|
|
// CHECK-NEXT: [[TMP23:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
|
|
// CHECK-NEXT: store ptr null, ptr [[TMP23]], align 8
|
|
// CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
|
|
// CHECK-NEXT: store ptr [[THIS1]], ptr [[TMP24]], align 8
|
|
// CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
|
|
// CHECK-NEXT: store ptr [[ARRAYIDX]], ptr [[TMP25]], align 8
|
|
// CHECK-NEXT: [[TMP26:%.*]] = getelementptr inbounds [7 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 3
|
|
// CHECK-NEXT: store i64 [[TMP2]], ptr [[TMP26]], align 8
|
|
// CHECK-NEXT: [[TMP27:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
|
|
// CHECK-NEXT: store ptr null, ptr [[TMP27]], align 8
|
|
// CHECK-NEXT: [[TMP28:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
|
|
// CHECK-NEXT: store ptr [[TMP10]], ptr [[TMP28]], align 8
|
|
// CHECK-NEXT: [[TMP29:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4
|
|
// CHECK-NEXT: store ptr [[ARRAYIDX7]], ptr [[TMP29]], align 8
|
|
// CHECK-NEXT: [[TMP30:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
|
|
// CHECK-NEXT: store ptr null, ptr [[TMP30]], align 8
|
|
// CHECK-NEXT: [[TMP31:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 5
|
|
// CHECK-NEXT: store ptr [[TMP12]], ptr [[TMP31]], align 8
|
|
// CHECK-NEXT: [[TMP32:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 5
|
|
// CHECK-NEXT: store ptr [[ARRAYIDX10]], ptr [[TMP32]], align 8
|
|
// CHECK-NEXT: [[TMP33:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 5
|
|
// CHECK-NEXT: store ptr null, ptr [[TMP33]], align 8
|
|
// CHECK-NEXT: [[TMP34:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 6
|
|
// CHECK-NEXT: store ptr [[PTR8]], ptr [[TMP34]], align 8
|
|
// CHECK-NEXT: [[TMP35:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 6
|
|
// CHECK-NEXT: store ptr [[ARRAYIDX10]], ptr [[TMP35]], align 8
|
|
// CHECK-NEXT: [[TMP36:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 6
|
|
// CHECK-NEXT: store ptr null, ptr [[TMP36]], align 8
|
|
// CHECK-NEXT: [[TMP37:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
|
|
// CHECK-NEXT: [[TMP38:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
|
|
// CHECK-NEXT: [[TMP39:%.*]] = getelementptr inbounds [7 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0
|
|
// CHECK-NEXT: call void @__tgt_target_data_begin_mapper(ptr @[[GLOB1]], i64 -1, i32 7, ptr [[TMP37]], ptr [[TMP38]], ptr [[TMP39]], ptr @.offload_maptypes.2, ptr null, ptr null)
|
|
// CHECK-NEXT: [[TMP40:%.*]] = load ptr, ptr [[TMP18]], align 8
|
|
// CHECK-NEXT: store ptr [[TMP40]], ptr [[TMP]], align 8
|
|
// CHECK-NEXT: [[TMP41:%.*]] = load ptr, ptr [[TMP28]], align 8
|
|
// CHECK-NEXT: store ptr [[TMP41]], ptr [[_TMP11]], align 8
|
|
// CHECK-NEXT: [[TMP42:%.*]] = load ptr, ptr [[TMP21]], align 8
|
|
// CHECK-NEXT: store ptr [[TMP42]], ptr [[_TMP12]], align 8
|
|
// CHECK-NEXT: [[TMP43:%.*]] = load ptr, ptr [[TMP28]], align 8
|
|
// CHECK-NEXT: store ptr [[TMP43]], ptr [[_TMP13]], align 8
|
|
// CHECK-NEXT: [[TMP44:%.*]] = load ptr, ptr [[TMP24]], align 8
|
|
// CHECK-NEXT: store ptr [[TMP44]], ptr [[_TMP14]], align 8
|
|
// CHECK-NEXT: [[TMP45:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META3]], !align [[META4]]
|
|
// CHECK-NEXT: [[TMP46:%.*]] = load i32, ptr [[TMP45]], align 4
|
|
// CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP46]], 1
|
|
// CHECK-NEXT: store i32 [[INC]], ptr [[TMP45]], align 4
|
|
// CHECK-NEXT: [[TMP47:%.*]] = load ptr, ptr [[_TMP13]], align 8, !nonnull [[META3]], !align [[META5:![0-9]+]]
|
|
// CHECK-NEXT: [[TMP48:%.*]] = load ptr, ptr [[TMP47]], align 8
|
|
// CHECK-NEXT: [[TMP49:%.*]] = load i32, ptr [[TMP48]], align 4
|
|
// CHECK-NEXT: [[INC15:%.*]] = add nsw i32 [[TMP49]], 1
|
|
// CHECK-NEXT: store i32 [[INC15]], ptr [[TMP48]], align 4
|
|
// CHECK-NEXT: [[TMP50:%.*]] = load ptr, ptr [[_TMP12]], align 8, !nonnull [[META3]], !align [[META4]]
|
|
// CHECK-NEXT: [[TMP51:%.*]] = load i32, ptr [[TMP50]], align 4
|
|
// CHECK-NEXT: [[INC16:%.*]] = add nsw i32 [[TMP51]], 1
|
|
// CHECK-NEXT: store i32 [[INC16]], ptr [[TMP50]], align 4
|
|
// CHECK-NEXT: [[TMP52:%.*]] = load ptr, ptr [[_TMP14]], align 8, !nonnull [[META3]], !align [[META4]]
|
|
// CHECK-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds [4 x i32], ptr [[TMP52]], i64 0, i64 0
|
|
// CHECK-NEXT: [[TMP53:%.*]] = load i32, ptr [[ARRAYIDX17]], align 4
|
|
// CHECK-NEXT: [[INC18:%.*]] = add nsw i32 [[TMP53]], 1
|
|
// CHECK-NEXT: store i32 [[INC18]], ptr [[ARRAYIDX17]], align 4
|
|
// CHECK-NEXT: [[TMP54:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
|
|
// CHECK-NEXT: [[TMP55:%.*]] = getelementptr inbounds [7 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
|
|
// CHECK-NEXT: [[TMP56:%.*]] = getelementptr inbounds [7 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0
|
|
// CHECK-NEXT: call void @__tgt_target_data_end_mapper(ptr @[[GLOB1]], i64 -1, i32 7, ptr [[TMP54]], ptr [[TMP55]], ptr [[TMP56]], ptr @.offload_maptypes.2, ptr null, ptr null)
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
//
|
|
// CHECK-LABEL: define linkonce_odr void @_ZN1SC2Ev(
|
|
// CHECK-SAME: ptr noundef nonnull align 8 dereferenceable(40) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat {
|
|
// CHECK-NEXT: [[ENTRY:.*:]]
|
|
// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
|
|
// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
|
|
// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
|
|
// CHECK-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
|
|
// CHECK-NEXT: store i32 0, ptr [[A]], align 8
|
|
// CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 1
|
|
// CHECK-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 0
|
|
// CHECK-NEXT: store ptr [[A2]], ptr [[PTR]], align 8
|
|
// CHECK-NEXT: [[REF:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 2
|
|
// CHECK-NEXT: [[A3:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 0
|
|
// CHECK-NEXT: store ptr [[A3]], ptr [[REF]], align 8
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
//
|
|
// OMP60-LABEL: define dso_local noundef signext i32 @main(
|
|
// OMP60-SAME: i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
|
|
// OMP60-NEXT: [[ENTRY:.*:]]
|
|
// OMP60-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
|
|
// OMP60-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
|
|
// OMP60-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8
|
|
// OMP60-NEXT: [[A:%.*]] = alloca float, align 4
|
|
// OMP60-NEXT: [[PTR:%.*]] = alloca ptr, align 8
|
|
// OMP60-NEXT: [[REF:%.*]] = alloca ptr, align 8
|
|
// OMP60-NEXT: [[ARR:%.*]] = alloca [4 x float], align 4
|
|
// OMP60-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 8
|
|
// OMP60-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
|
|
// OMP60-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
|
|
// OMP60-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [10 x ptr], align 8
|
|
// OMP60-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [10 x ptr], align 8
|
|
// OMP60-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [10 x ptr], align 8
|
|
// OMP60-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [10 x i64], align 8
|
|
// OMP60-NEXT: [[TMP:%.*]] = alloca ptr, align 8
|
|
// OMP60-NEXT: store i32 0, ptr [[RETVAL]], align 4
|
|
// OMP60-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
|
|
// OMP60-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8
|
|
// OMP60-NEXT: store float 0.000000e+00, ptr [[A]], align 4
|
|
// OMP60-NEXT: store ptr [[A]], ptr [[PTR]], align 8
|
|
// OMP60-NEXT: store ptr [[A]], ptr [[REF]], align 8
|
|
// OMP60-NEXT: [[TMP0:%.*]] = load float, ptr [[A]], align 4
|
|
// OMP60-NEXT: [[CONV:%.*]] = fptosi float [[TMP0]] to i32
|
|
// OMP60-NEXT: [[TMP1:%.*]] = zext i32 [[CONV]] to i64
|
|
// OMP60-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0()
|
|
// OMP60-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 8
|
|
// OMP60-NEXT: [[VLA:%.*]] = alloca float, i64 [[TMP1]], align 4
|
|
// OMP60-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8
|
|
// OMP60-NEXT: call void @_ZN1SC1Ev(ptr noundef nonnull align 8 dereferenceable(40) [[S]])
|
|
// OMP60-NEXT: call void @_ZN1S3fooEv(ptr noundef nonnull align 8 dereferenceable(40) [[S]])
|
|
// OMP60-NEXT: [[TMP3:%.*]] = load ptr, ptr [[PTR]], align 8
|
|
// OMP60-NEXT: [[TMP4:%.*]] = load ptr, ptr [[PTR]], align 8
|
|
// OMP60-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw float, ptr [[TMP4]], i64 3
|
|
// OMP60-NEXT: [[TMP5:%.*]] = load ptr, ptr [[PTR]], align 8
|
|
// OMP60-NEXT: [[TMP6:%.*]] = load ptr, ptr [[PTR]], align 8
|
|
// OMP60-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds float, ptr [[TMP6]], i64 0
|
|
// OMP60-NEXT: [[TMP7:%.*]] = load ptr, ptr [[PTR]], align 8
|
|
// OMP60-NEXT: [[TMP8:%.*]] = load ptr, ptr [[PTR]], align 8
|
|
// OMP60-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds nuw float, ptr [[TMP8]], i64 0
|
|
// OMP60-NEXT: [[TMP9:%.*]] = load ptr, ptr [[REF]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
|
|
// OMP60-NEXT: [[TMP10:%.*]] = load ptr, ptr [[REF]], align 8, !nonnull [[META3]], !align [[META4]]
|
|
// OMP60-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds nuw [4 x float], ptr [[ARR]], i64 0, i64 0
|
|
// OMP60-NEXT: [[TMP11:%.*]] = load float, ptr [[A]], align 4
|
|
// OMP60-NEXT: [[CONV4:%.*]] = fptosi float [[TMP11]] to i32
|
|
// OMP60-NEXT: [[CONV5:%.*]] = sext i32 [[CONV4]] to i64
|
|
// OMP60-NEXT: [[TMP12:%.*]] = mul nuw i64 [[CONV5]], 4
|
|
// OMP60-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds float, ptr [[VLA]], i64 0
|
|
// OMP60-NEXT: [[TMP13:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8
|
|
// OMP60-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds ptr, ptr [[TMP13]], i64 0
|
|
// OMP60-NEXT: [[TMP14:%.*]] = load ptr, ptr [[ARRAYIDX7]], align 8
|
|
// OMP60-NEXT: [[TMP15:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8
|
|
// OMP60-NEXT: [[TMP16:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8
|
|
// OMP60-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds ptr, ptr [[TMP16]], i64 0
|
|
// OMP60-NEXT: [[TMP17:%.*]] = load ptr, ptr [[ARRAYIDX8]], align 8
|
|
// OMP60-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP17]], i64 0
|
|
// OMP60-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes, i64 80, i1 false)
|
|
// OMP60-NEXT: [[TMP18:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
|
|
// OMP60-NEXT: store ptr [[A]], ptr [[TMP18]], align 8
|
|
// OMP60-NEXT: [[TMP19:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
|
|
// OMP60-NEXT: store ptr [[A]], ptr [[TMP19]], align 8
|
|
// OMP60-NEXT: [[TMP20:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
|
|
// OMP60-NEXT: store ptr null, ptr [[TMP20]], align 8
|
|
// OMP60-NEXT: [[TMP21:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
|
|
// OMP60-NEXT: store ptr [[TMP3]], ptr [[TMP21]], align 8
|
|
// OMP60-NEXT: [[TMP22:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
|
|
// OMP60-NEXT: store ptr [[ARRAYIDX]], ptr [[TMP22]], align 8
|
|
// OMP60-NEXT: [[TMP23:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
|
|
// OMP60-NEXT: store ptr null, ptr [[TMP23]], align 8
|
|
// OMP60-NEXT: [[TMP24:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
|
|
// OMP60-NEXT: store ptr [[TMP5]], ptr [[TMP24]], align 8
|
|
// OMP60-NEXT: [[TMP25:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
|
|
// OMP60-NEXT: store ptr [[ARRAYIDX1]], ptr [[TMP25]], align 8
|
|
// OMP60-NEXT: [[TMP26:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
|
|
// OMP60-NEXT: store ptr null, ptr [[TMP26]], align 8
|
|
// OMP60-NEXT: [[TMP27:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
|
|
// OMP60-NEXT: store ptr [[TMP7]], ptr [[TMP27]], align 8
|
|
// OMP60-NEXT: [[TMP28:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
|
|
// OMP60-NEXT: store ptr [[ARRAYIDX2]], ptr [[TMP28]], align 8
|
|
// OMP60-NEXT: [[TMP29:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
|
|
// OMP60-NEXT: store ptr null, ptr [[TMP29]], align 8
|
|
// OMP60-NEXT: [[TMP30:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
|
|
// OMP60-NEXT: store ptr [[PTR]], ptr [[TMP30]], align 8
|
|
// OMP60-NEXT: [[TMP31:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4
|
|
// OMP60-NEXT: store ptr [[ARRAYIDX2]], ptr [[TMP31]], align 8
|
|
// OMP60-NEXT: [[TMP32:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
|
|
// OMP60-NEXT: store ptr null, ptr [[TMP32]], align 8
|
|
// OMP60-NEXT: [[TMP33:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 5
|
|
// OMP60-NEXT: store ptr [[TMP9]], ptr [[TMP33]], align 8
|
|
// OMP60-NEXT: [[TMP34:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 5
|
|
// OMP60-NEXT: store ptr [[TMP10]], ptr [[TMP34]], align 8
|
|
// OMP60-NEXT: [[TMP35:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 5
|
|
// OMP60-NEXT: store ptr null, ptr [[TMP35]], align 8
|
|
// OMP60-NEXT: [[TMP36:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 6
|
|
// OMP60-NEXT: store ptr [[ARR]], ptr [[TMP36]], align 8
|
|
// OMP60-NEXT: [[TMP37:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 6
|
|
// OMP60-NEXT: store ptr [[ARRAYIDX3]], ptr [[TMP37]], align 8
|
|
// OMP60-NEXT: [[TMP38:%.*]] = getelementptr inbounds [10 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 6
|
|
// OMP60-NEXT: store i64 [[TMP12]], ptr [[TMP38]], align 8
|
|
// OMP60-NEXT: [[TMP39:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 6
|
|
// OMP60-NEXT: store ptr null, ptr [[TMP39]], align 8
|
|
// OMP60-NEXT: [[TMP40:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 7
|
|
// OMP60-NEXT: store ptr [[VLA]], ptr [[TMP40]], align 8
|
|
// OMP60-NEXT: [[TMP41:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 7
|
|
// OMP60-NEXT: store ptr [[ARRAYIDX6]], ptr [[TMP41]], align 8
|
|
// OMP60-NEXT: [[TMP42:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 7
|
|
// OMP60-NEXT: store ptr null, ptr [[TMP42]], align 8
|
|
// OMP60-NEXT: [[TMP43:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 8
|
|
// OMP60-NEXT: store ptr [[TMP14]], ptr [[TMP43]], align 8
|
|
// OMP60-NEXT: [[TMP44:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 8
|
|
// OMP60-NEXT: store ptr [[ARRAYIDX9]], ptr [[TMP44]], align 8
|
|
// OMP60-NEXT: [[TMP45:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 8
|
|
// OMP60-NEXT: store ptr null, ptr [[TMP45]], align 8
|
|
// OMP60-NEXT: [[TMP46:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 9
|
|
// OMP60-NEXT: store ptr [[ARRAYIDX7]], ptr [[TMP46]], align 8
|
|
// OMP60-NEXT: [[TMP47:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 9
|
|
// OMP60-NEXT: store ptr [[ARRAYIDX9]], ptr [[TMP47]], align 8
|
|
// OMP60-NEXT: [[TMP48:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 9
|
|
// OMP60-NEXT: store ptr null, ptr [[TMP48]], align 8
|
|
// OMP60-NEXT: [[TMP49:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
|
|
// OMP60-NEXT: [[TMP50:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
|
|
// OMP60-NEXT: [[TMP51:%.*]] = getelementptr inbounds [10 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0
|
|
// OMP60-NEXT: call void @__tgt_target_data_begin_mapper(ptr @[[GLOB1:[0-9]+]], i64 -1, i32 10, ptr [[TMP49]], ptr [[TMP50]], ptr [[TMP51]], ptr @.offload_maptypes, ptr null, ptr null)
|
|
// OMP60-NEXT: [[TMP52:%.*]] = load ptr, ptr [[TMP18]], align 8
|
|
// OMP60-NEXT: [[TMP53:%.*]] = load ptr, ptr [[TMP33]], align 8
|
|
// OMP60-NEXT: store ptr [[TMP53]], ptr [[TMP]], align 8
|
|
// OMP60-NEXT: [[TMP54:%.*]] = load ptr, ptr [[TMP36]], align 8
|
|
// OMP60-NEXT: [[TMP55:%.*]] = load ptr, ptr [[TMP40]], align 8
|
|
// OMP60-NEXT: [[TMP56:%.*]] = load float, ptr [[TMP52]], align 4
|
|
// OMP60-NEXT: [[INC:%.*]] = fadd float [[TMP56]], 1.000000e+00
|
|
// OMP60-NEXT: store float [[INC]], ptr [[TMP52]], align 4
|
|
// OMP60-NEXT: [[TMP57:%.*]] = load ptr, ptr [[TMP21]], align 8
|
|
// OMP60-NEXT: [[TMP58:%.*]] = load float, ptr [[TMP57]], align 4
|
|
// OMP60-NEXT: [[INC10:%.*]] = fadd float [[TMP58]], 1.000000e+00
|
|
// OMP60-NEXT: store float [[INC10]], ptr [[TMP57]], align 4
|
|
// OMP60-NEXT: [[TMP59:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META3]], !align [[META4]]
|
|
// OMP60-NEXT: [[TMP60:%.*]] = load float, ptr [[TMP59]], align 4
|
|
// OMP60-NEXT: [[INC11:%.*]] = fadd float [[TMP60]], 1.000000e+00
|
|
// OMP60-NEXT: store float [[INC11]], ptr [[TMP59]], align 4
|
|
// OMP60-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [4 x float], ptr [[TMP54]], i64 0, i64 0
|
|
// OMP60-NEXT: [[TMP61:%.*]] = load float, ptr [[ARRAYIDX12]], align 4
|
|
// OMP60-NEXT: [[INC13:%.*]] = fadd float [[TMP61]], 1.000000e+00
|
|
// OMP60-NEXT: store float [[INC13]], ptr [[ARRAYIDX12]], align 4
|
|
// OMP60-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds float, ptr [[TMP55]], i64 0
|
|
// OMP60-NEXT: [[TMP62:%.*]] = load float, ptr [[ARRAYIDX14]], align 4
|
|
// OMP60-NEXT: [[INC15:%.*]] = fadd float [[TMP62]], 1.000000e+00
|
|
// OMP60-NEXT: store float [[INC15]], ptr [[ARRAYIDX14]], align 4
|
|
// OMP60-NEXT: [[TMP63:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
|
|
// OMP60-NEXT: [[TMP64:%.*]] = getelementptr inbounds [10 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
|
|
// OMP60-NEXT: [[TMP65:%.*]] = getelementptr inbounds [10 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0
|
|
// OMP60-NEXT: call void @__tgt_target_data_end_mapper(ptr @[[GLOB1]], i64 -1, i32 10, ptr [[TMP63]], ptr [[TMP64]], ptr [[TMP65]], ptr @.offload_maptypes, ptr null, ptr null)
|
|
// OMP60-NEXT: [[TMP66:%.*]] = load float, ptr [[A]], align 4
|
|
// OMP60-NEXT: [[CONV16:%.*]] = fptosi float [[TMP66]] to i32
|
|
// OMP60-NEXT: store i32 [[CONV16]], ptr [[RETVAL]], align 4
|
|
// OMP60-NEXT: [[TMP67:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8
|
|
// OMP60-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP67]])
|
|
// OMP60-NEXT: [[TMP68:%.*]] = load i32, ptr [[RETVAL]], align 4
|
|
// OMP60-NEXT: ret i32 [[TMP68]]
|
|
//
|
|
//
|
|
// OMP60-LABEL: define linkonce_odr void @_ZN1SC1Ev(
|
|
// OMP60-SAME: ptr noundef nonnull align 8 dereferenceable(40) [[THIS:%.*]]) unnamed_addr #[[ATTR2:[0-9]+]] comdat {
|
|
// OMP60-NEXT: [[ENTRY:.*:]]
|
|
// OMP60-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
|
|
// OMP60-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
|
|
// OMP60-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
|
|
// OMP60-NEXT: call void @_ZN1SC2Ev(ptr noundef nonnull align 8 dereferenceable(40) [[THIS1]])
|
|
// OMP60-NEXT: ret void
|
|
//
|
|
//
|
|
// OMP60-LABEL: define linkonce_odr void @_ZN1S3fooEv(
|
|
// OMP60-SAME: ptr noundef nonnull align 8 dereferenceable(40) [[THIS:%.*]]) #[[ATTR2]] comdat {
|
|
// OMP60-NEXT: [[ENTRY:.*:]]
|
|
// OMP60-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
|
|
// OMP60-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [8 x ptr], align 8
|
|
// OMP60-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [8 x ptr], align 8
|
|
// OMP60-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [8 x ptr], align 8
|
|
// OMP60-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [8 x i64], align 8
|
|
// OMP60-NEXT: [[TMP:%.*]] = alloca ptr, align 8
|
|
// OMP60-NEXT: [[_TMP14:%.*]] = alloca ptr, align 8
|
|
// OMP60-NEXT: [[_TMP15:%.*]] = alloca ptr, align 8
|
|
// OMP60-NEXT: [[_TMP16:%.*]] = alloca ptr, align 8
|
|
// OMP60-NEXT: [[_TMP17:%.*]] = alloca ptr, align 8
|
|
// OMP60-NEXT: [[_TMP18:%.*]] = alloca ptr, align 8
|
|
// OMP60-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
|
|
// OMP60-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
|
|
// OMP60-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
|
|
// OMP60-NEXT: [[REF:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 2
|
|
// OMP60-NEXT: [[TMP0:%.*]] = load ptr, ptr [[REF]], align 8, !nonnull [[META3]], !align [[META4]]
|
|
// OMP60-NEXT: [[ARR:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 3
|
|
// OMP60-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [4 x i32], ptr [[ARR]], i64 0, i64 0
|
|
// OMP60-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 0
|
|
// OMP60-NEXT: [[TMP1:%.*]] = load i32, ptr [[A2]], align 8
|
|
// OMP60-NEXT: [[CONV:%.*]] = sext i32 [[TMP1]] to i64
|
|
// OMP60-NEXT: [[TMP2:%.*]] = mul nuw i64 [[CONV]], 4
|
|
// OMP60-NEXT: [[A3:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 0
|
|
// OMP60-NEXT: [[TMP3:%.*]] = load i32, ptr [[A3]], align 8
|
|
// OMP60-NEXT: [[TMP4:%.*]] = sext i32 [[TMP3]] to i64
|
|
// OMP60-NEXT: [[LB_ADD_LEN:%.*]] = add nsw i64 -1, [[TMP4]]
|
|
// OMP60-NEXT: [[ARR4:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 3
|
|
// OMP60-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds nuw [4 x i32], ptr [[ARR4]], i64 0, i64 [[LB_ADD_LEN]]
|
|
// OMP60-NEXT: [[TMP5:%.*]] = getelementptr i32, ptr [[ARRAYIDX5]], i32 1
|
|
// OMP60-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64
|
|
// OMP60-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[A]] to i64
|
|
// OMP60-NEXT: [[TMP8:%.*]] = sub i64 [[TMP6]], [[TMP7]]
|
|
// OMP60-NEXT: [[TMP9:%.*]] = sdiv exact i64 [[TMP8]], ptrtoint (ptr getelementptr (i8, ptr null, i32 1) to i64)
|
|
// OMP60-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 1
|
|
// OMP60-NEXT: [[TMP10:%.*]] = load ptr, ptr [[PTR]], align 8
|
|
// OMP60-NEXT: [[PTR6:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 1
|
|
// OMP60-NEXT: [[TMP11:%.*]] = load ptr, ptr [[PTR6]], align 8
|
|
// OMP60-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds nuw i32, ptr [[TMP11]], i64 3
|
|
// OMP60-NEXT: [[PTR8:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 1
|
|
// OMP60-NEXT: [[TMP12:%.*]] = load ptr, ptr [[PTR8]], align 8
|
|
// OMP60-NEXT: [[PTR9:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 1
|
|
// OMP60-NEXT: [[TMP13:%.*]] = load ptr, ptr [[PTR9]], align 8
|
|
// OMP60-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i64 0
|
|
// OMP60-NEXT: [[PTR11:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 1
|
|
// OMP60-NEXT: [[TMP14:%.*]] = load ptr, ptr [[PTR11]], align 8
|
|
// OMP60-NEXT: [[PTR12:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 1
|
|
// OMP60-NEXT: [[TMP15:%.*]] = load ptr, ptr [[PTR12]], align 8
|
|
// OMP60-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds nuw i32, ptr [[TMP15]], i64 0
|
|
// OMP60-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes.1, i64 64, i1 false)
|
|
// OMP60-NEXT: [[TMP16:%.*]] = getelementptr inbounds [8 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
|
|
// OMP60-NEXT: store ptr [[THIS1]], ptr [[TMP16]], align 8
|
|
// OMP60-NEXT: [[TMP17:%.*]] = getelementptr inbounds [8 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
|
|
// OMP60-NEXT: store ptr [[A]], ptr [[TMP17]], align 8
|
|
// OMP60-NEXT: [[TMP18:%.*]] = getelementptr inbounds [8 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0
|
|
// OMP60-NEXT: store i64 [[TMP9]], ptr [[TMP18]], align 8
|
|
// OMP60-NEXT: [[TMP19:%.*]] = getelementptr inbounds [8 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
|
|
// OMP60-NEXT: store ptr null, ptr [[TMP19]], align 8
|
|
// OMP60-NEXT: [[TMP20:%.*]] = getelementptr inbounds [8 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
|
|
// OMP60-NEXT: store ptr [[THIS1]], ptr [[TMP20]], align 8
|
|
// OMP60-NEXT: [[TMP21:%.*]] = getelementptr inbounds [8 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
|
|
// OMP60-NEXT: store ptr [[A]], ptr [[TMP21]], align 8
|
|
// OMP60-NEXT: [[TMP22:%.*]] = getelementptr inbounds [8 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
|
|
// OMP60-NEXT: store ptr null, ptr [[TMP22]], align 8
|
|
// OMP60-NEXT: [[TMP23:%.*]] = getelementptr inbounds [8 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
|
|
// OMP60-NEXT: store ptr [[THIS1]], ptr [[TMP23]], align 8
|
|
// OMP60-NEXT: [[TMP24:%.*]] = getelementptr inbounds [8 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
|
|
// OMP60-NEXT: store ptr [[TMP0]], ptr [[TMP24]], align 8
|
|
// OMP60-NEXT: [[TMP25:%.*]] = getelementptr inbounds [8 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
|
|
// OMP60-NEXT: store ptr null, ptr [[TMP25]], align 8
|
|
// OMP60-NEXT: [[TMP26:%.*]] = getelementptr inbounds [8 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
|
|
// OMP60-NEXT: store ptr [[THIS1]], ptr [[TMP26]], align 8
|
|
// OMP60-NEXT: [[TMP27:%.*]] = getelementptr inbounds [8 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
|
|
// OMP60-NEXT: store ptr [[ARRAYIDX]], ptr [[TMP27]], align 8
|
|
// OMP60-NEXT: [[TMP28:%.*]] = getelementptr inbounds [8 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 3
|
|
// OMP60-NEXT: store i64 [[TMP2]], ptr [[TMP28]], align 8
|
|
// OMP60-NEXT: [[TMP29:%.*]] = getelementptr inbounds [8 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
|
|
// OMP60-NEXT: store ptr null, ptr [[TMP29]], align 8
|
|
// OMP60-NEXT: [[TMP30:%.*]] = getelementptr inbounds [8 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
|
|
// OMP60-NEXT: store ptr [[TMP10]], ptr [[TMP30]], align 8
|
|
// OMP60-NEXT: [[TMP31:%.*]] = getelementptr inbounds [8 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4
|
|
// OMP60-NEXT: store ptr [[ARRAYIDX7]], ptr [[TMP31]], align 8
|
|
// OMP60-NEXT: [[TMP32:%.*]] = getelementptr inbounds [8 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
|
|
// OMP60-NEXT: store ptr null, ptr [[TMP32]], align 8
|
|
// OMP60-NEXT: [[TMP33:%.*]] = getelementptr inbounds [8 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 5
|
|
// OMP60-NEXT: store ptr [[TMP12]], ptr [[TMP33]], align 8
|
|
// OMP60-NEXT: [[TMP34:%.*]] = getelementptr inbounds [8 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 5
|
|
// OMP60-NEXT: store ptr [[ARRAYIDX10]], ptr [[TMP34]], align 8
|
|
// OMP60-NEXT: [[TMP35:%.*]] = getelementptr inbounds [8 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 5
|
|
// OMP60-NEXT: store ptr null, ptr [[TMP35]], align 8
|
|
// OMP60-NEXT: [[TMP36:%.*]] = getelementptr inbounds [8 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 6
|
|
// OMP60-NEXT: store ptr [[TMP14]], ptr [[TMP36]], align 8
|
|
// OMP60-NEXT: [[TMP37:%.*]] = getelementptr inbounds [8 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 6
|
|
// OMP60-NEXT: store ptr [[ARRAYIDX13]], ptr [[TMP37]], align 8
|
|
// OMP60-NEXT: [[TMP38:%.*]] = getelementptr inbounds [8 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 6
|
|
// OMP60-NEXT: store ptr null, ptr [[TMP38]], align 8
|
|
// OMP60-NEXT: [[TMP39:%.*]] = getelementptr inbounds [8 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 7
|
|
// OMP60-NEXT: store ptr [[PTR11]], ptr [[TMP39]], align 8
|
|
// OMP60-NEXT: [[TMP40:%.*]] = getelementptr inbounds [8 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 7
|
|
// OMP60-NEXT: store ptr [[ARRAYIDX13]], ptr [[TMP40]], align 8
|
|
// OMP60-NEXT: [[TMP41:%.*]] = getelementptr inbounds [8 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 7
|
|
// OMP60-NEXT: store ptr null, ptr [[TMP41]], align 8
|
|
// OMP60-NEXT: [[TMP42:%.*]] = getelementptr inbounds [8 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
|
|
// OMP60-NEXT: [[TMP43:%.*]] = getelementptr inbounds [8 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
|
|
// OMP60-NEXT: [[TMP44:%.*]] = getelementptr inbounds [8 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0
|
|
// OMP60-NEXT: call void @__tgt_target_data_begin_mapper(ptr @[[GLOB1]], i64 -1, i32 8, ptr [[TMP42]], ptr [[TMP43]], ptr [[TMP44]], ptr @.offload_maptypes.2, ptr null, ptr null)
|
|
// OMP60-NEXT: [[TMP45:%.*]] = load ptr, ptr [[TMP20]], align 8
|
|
// OMP60-NEXT: store ptr [[TMP45]], ptr [[TMP]], align 8
|
|
// OMP60-NEXT: [[TMP46:%.*]] = load ptr, ptr [[TMP30]], align 8
|
|
// OMP60-NEXT: store ptr [[TMP46]], ptr [[_TMP14]], align 8
|
|
// OMP60-NEXT: [[TMP47:%.*]] = load ptr, ptr [[TMP23]], align 8
|
|
// OMP60-NEXT: store ptr [[TMP47]], ptr [[_TMP15]], align 8
|
|
// OMP60-NEXT: [[TMP48:%.*]] = load ptr, ptr [[TMP30]], align 8
|
|
// OMP60-NEXT: store ptr [[TMP48]], ptr [[_TMP16]], align 8
|
|
// OMP60-NEXT: [[TMP49:%.*]] = load ptr, ptr [[TMP26]], align 8
|
|
// OMP60-NEXT: store ptr [[TMP49]], ptr [[_TMP17]], align 8
|
|
// OMP60-NEXT: [[TMP50:%.*]] = load ptr, ptr [[TMP30]], align 8
|
|
// OMP60-NEXT: store ptr [[TMP50]], ptr [[_TMP18]], align 8
|
|
// OMP60-NEXT: [[TMP51:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META3]], !align [[META4]]
|
|
// OMP60-NEXT: [[TMP52:%.*]] = load i32, ptr [[TMP51]], align 4
|
|
// OMP60-NEXT: [[INC:%.*]] = add nsw i32 [[TMP52]], 1
|
|
// OMP60-NEXT: store i32 [[INC]], ptr [[TMP51]], align 4
|
|
// OMP60-NEXT: [[TMP53:%.*]] = load ptr, ptr [[_TMP18]], align 8, !nonnull [[META3]], !align [[META5:![0-9]+]]
|
|
// OMP60-NEXT: [[TMP54:%.*]] = load ptr, ptr [[TMP53]], align 8
|
|
// OMP60-NEXT: [[TMP55:%.*]] = load i32, ptr [[TMP54]], align 4
|
|
// OMP60-NEXT: [[INC19:%.*]] = add nsw i32 [[TMP55]], 1
|
|
// OMP60-NEXT: store i32 [[INC19]], ptr [[TMP54]], align 4
|
|
// OMP60-NEXT: [[TMP56:%.*]] = load ptr, ptr [[_TMP15]], align 8, !nonnull [[META3]], !align [[META4]]
|
|
// OMP60-NEXT: [[TMP57:%.*]] = load i32, ptr [[TMP56]], align 4
|
|
// OMP60-NEXT: [[INC20:%.*]] = add nsw i32 [[TMP57]], 1
|
|
// OMP60-NEXT: store i32 [[INC20]], ptr [[TMP56]], align 4
|
|
// OMP60-NEXT: [[TMP58:%.*]] = load ptr, ptr [[_TMP17]], align 8, !nonnull [[META3]], !align [[META4]]
|
|
// OMP60-NEXT: [[ARRAYIDX21:%.*]] = getelementptr inbounds [4 x i32], ptr [[TMP58]], i64 0, i64 0
|
|
// OMP60-NEXT: [[TMP59:%.*]] = load i32, ptr [[ARRAYIDX21]], align 4
|
|
// OMP60-NEXT: [[INC22:%.*]] = add nsw i32 [[TMP59]], 1
|
|
// OMP60-NEXT: store i32 [[INC22]], ptr [[ARRAYIDX21]], align 4
|
|
// OMP60-NEXT: [[TMP60:%.*]] = getelementptr inbounds [8 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
|
|
// OMP60-NEXT: [[TMP61:%.*]] = getelementptr inbounds [8 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
|
|
// OMP60-NEXT: [[TMP62:%.*]] = getelementptr inbounds [8 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0
|
|
// OMP60-NEXT: call void @__tgt_target_data_end_mapper(ptr @[[GLOB1]], i64 -1, i32 8, ptr [[TMP60]], ptr [[TMP61]], ptr [[TMP62]], ptr @.offload_maptypes.2, ptr null, ptr null)
|
|
// OMP60-NEXT: ret void
|
|
//
|
|
//
|
|
// OMP60-LABEL: define linkonce_odr void @_ZN1SC2Ev(
|
|
// OMP60-SAME: ptr noundef nonnull align 8 dereferenceable(40) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat {
|
|
// OMP60-NEXT: [[ENTRY:.*:]]
|
|
// OMP60-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
|
|
// OMP60-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
|
|
// OMP60-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
|
|
// OMP60-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
|
|
// OMP60-NEXT: store i32 0, ptr [[A]], align 8
|
|
// OMP60-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 1
|
|
// OMP60-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 0
|
|
// OMP60-NEXT: store ptr [[A2]], ptr [[PTR]], align 8
|
|
// OMP60-NEXT: [[REF:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 2
|
|
// OMP60-NEXT: [[A3:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 0
|
|
// OMP60-NEXT: store ptr [[A3]], ptr [[REF]], align 8
|
|
// OMP60-NEXT: ret void
|
|
//
|
|
//
|
|
// SIMD-ONLY0-LABEL: define dso_local noundef signext i32 @main(
|
|
// SIMD-ONLY0-SAME: ) #[[ATTR0:[0-9]+]] {
|
|
// SIMD-ONLY0-NEXT: [[ENTRY:.*:]]
|
|
// SIMD-ONLY0-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
|
|
// SIMD-ONLY0-NEXT: [[A:%.*]] = alloca float, align 4
|
|
// SIMD-ONLY0-NEXT: [[PTR:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-NEXT: [[REF:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-NEXT: [[ARR:%.*]] = alloca [4 x float], align 4
|
|
// SIMD-ONLY0-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
|
|
// SIMD-ONLY0-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
|
|
// SIMD-ONLY0-NEXT: [[TMP:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-NEXT: store i32 0, ptr [[RETVAL]], align 4
|
|
// SIMD-ONLY0-NEXT: store float 0.000000e+00, ptr [[A]], align 4
|
|
// SIMD-ONLY0-NEXT: store ptr [[A]], ptr [[PTR]], align 8
|
|
// SIMD-ONLY0-NEXT: store ptr [[A]], ptr [[REF]], align 8
|
|
// SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load float, ptr [[A]], align 4
|
|
// SIMD-ONLY0-NEXT: [[CONV:%.*]] = fptosi float [[TMP0]] to i32
|
|
// SIMD-ONLY0-NEXT: [[TMP1:%.*]] = zext i32 [[CONV]] to i64
|
|
// SIMD-ONLY0-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0()
|
|
// SIMD-ONLY0-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 8
|
|
// SIMD-ONLY0-NEXT: [[VLA:%.*]] = alloca float, i64 [[TMP1]], align 4
|
|
// SIMD-ONLY0-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8
|
|
// SIMD-ONLY0-NEXT: call void @_ZN1SC1Ev(ptr noundef nonnull align 8 dereferenceable(40) [[S]])
|
|
// SIMD-ONLY0-NEXT: call void @_ZN1S3fooEv(ptr noundef nonnull align 8 dereferenceable(40) [[S]])
|
|
// SIMD-ONLY0-NEXT: [[TMP3:%.*]] = load ptr, ptr [[REF]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
|
|
// SIMD-ONLY0-NEXT: store ptr [[TMP3]], ptr [[TMP]], align 8
|
|
// SIMD-ONLY0-NEXT: [[TMP4:%.*]] = load float, ptr [[A]], align 4
|
|
// SIMD-ONLY0-NEXT: [[INC:%.*]] = fadd float [[TMP4]], 1.000000e+00
|
|
// SIMD-ONLY0-NEXT: store float [[INC]], ptr [[A]], align 4
|
|
// SIMD-ONLY0-NEXT: [[TMP5:%.*]] = load ptr, ptr [[PTR]], align 8
|
|
// SIMD-ONLY0-NEXT: [[TMP6:%.*]] = load float, ptr [[TMP5]], align 4
|
|
// SIMD-ONLY0-NEXT: [[INC1:%.*]] = fadd float [[TMP6]], 1.000000e+00
|
|
// SIMD-ONLY0-NEXT: store float [[INC1]], ptr [[TMP5]], align 4
|
|
// SIMD-ONLY0-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META2]], !align [[META3]]
|
|
// SIMD-ONLY0-NEXT: [[TMP8:%.*]] = load float, ptr [[TMP7]], align 4
|
|
// SIMD-ONLY0-NEXT: [[INC2:%.*]] = fadd float [[TMP8]], 1.000000e+00
|
|
// SIMD-ONLY0-NEXT: store float [[INC2]], ptr [[TMP7]], align 4
|
|
// SIMD-ONLY0-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x float], ptr [[ARR]], i64 0, i64 0
|
|
// SIMD-ONLY0-NEXT: [[TMP9:%.*]] = load float, ptr [[ARRAYIDX]], align 4
|
|
// SIMD-ONLY0-NEXT: [[INC3:%.*]] = fadd float [[TMP9]], 1.000000e+00
|
|
// SIMD-ONLY0-NEXT: store float [[INC3]], ptr [[ARRAYIDX]], align 4
|
|
// SIMD-ONLY0-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds float, ptr [[VLA]], i64 0
|
|
// SIMD-ONLY0-NEXT: [[TMP10:%.*]] = load float, ptr [[ARRAYIDX4]], align 4
|
|
// SIMD-ONLY0-NEXT: [[INC5:%.*]] = fadd float [[TMP10]], 1.000000e+00
|
|
// SIMD-ONLY0-NEXT: store float [[INC5]], ptr [[ARRAYIDX4]], align 4
|
|
// SIMD-ONLY0-NEXT: [[TMP11:%.*]] = load float, ptr [[A]], align 4
|
|
// SIMD-ONLY0-NEXT: [[CONV6:%.*]] = fptosi float [[TMP11]] to i32
|
|
// SIMD-ONLY0-NEXT: store i32 [[CONV6]], ptr [[RETVAL]], align 4
|
|
// SIMD-ONLY0-NEXT: [[TMP12:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8
|
|
// SIMD-ONLY0-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP12]])
|
|
// SIMD-ONLY0-NEXT: [[TMP13:%.*]] = load i32, ptr [[RETVAL]], align 4
|
|
// SIMD-ONLY0-NEXT: ret i32 [[TMP13]]
|
|
//
|
|
//
|
|
// SIMD-ONLY0-LABEL: define linkonce_odr void @_ZN1SC1Ev(
|
|
// SIMD-ONLY0-SAME: ptr noundef nonnull align 8 dereferenceable(40) [[THIS:%.*]]) unnamed_addr #[[ATTR2:[0-9]+]] comdat {
|
|
// SIMD-ONLY0-NEXT: [[ENTRY:.*:]]
|
|
// SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
|
|
// SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
|
|
// SIMD-ONLY0-NEXT: call void @_ZN1SC2Ev(ptr noundef nonnull align 8 dereferenceable(40) [[THIS1]])
|
|
// SIMD-ONLY0-NEXT: ret void
|
|
//
|
|
//
|
|
// SIMD-ONLY0-LABEL: define linkonce_odr void @_ZN1S3fooEv(
|
|
// SIMD-ONLY0-SAME: ptr noundef nonnull align 8 dereferenceable(40) [[THIS:%.*]]) #[[ATTR2]] comdat {
|
|
// SIMD-ONLY0-NEXT: [[ENTRY:.*:]]
|
|
// SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-NEXT: [[A:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-NEXT: [[PTR:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-NEXT: [[REF:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-NEXT: [[PTR5:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-NEXT: [[ARR:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-NEXT: [[TMP:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-NEXT: [[_TMP8:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-NEXT: [[_TMP9:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-NEXT: [[_TMP10:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
|
|
// SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
|
|
// SIMD-ONLY0-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
|
|
// SIMD-ONLY0-NEXT: store ptr [[A2]], ptr [[A]], align 8
|
|
// SIMD-ONLY0-NEXT: [[PTR3:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 1
|
|
// SIMD-ONLY0-NEXT: store ptr [[PTR3]], ptr [[PTR]], align 8
|
|
// SIMD-ONLY0-NEXT: [[REF4:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 2
|
|
// SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load ptr, ptr [[REF4]], align 8, !nonnull [[META2]], !align [[META3]]
|
|
// SIMD-ONLY0-NEXT: store ptr [[TMP0]], ptr [[REF]], align 8
|
|
// SIMD-ONLY0-NEXT: [[PTR6:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 1
|
|
// SIMD-ONLY0-NEXT: store ptr [[PTR6]], ptr [[PTR5]], align 8
|
|
// SIMD-ONLY0-NEXT: [[ARR7:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 3
|
|
// SIMD-ONLY0-NEXT: store ptr [[ARR7]], ptr [[ARR]], align 8
|
|
// SIMD-ONLY0-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A]], align 8, !nonnull [[META2]], !align [[META3]]
|
|
// SIMD-ONLY0-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 8
|
|
// SIMD-ONLY0-NEXT: [[TMP2:%.*]] = load ptr, ptr [[PTR5]], align 8, !nonnull [[META2]], !align [[META4:![0-9]+]]
|
|
// SIMD-ONLY0-NEXT: store ptr [[TMP2]], ptr [[_TMP8]], align 8
|
|
// SIMD-ONLY0-NEXT: [[TMP3:%.*]] = load ptr, ptr [[REF]], align 8, !nonnull [[META2]], !align [[META3]]
|
|
// SIMD-ONLY0-NEXT: store ptr [[TMP3]], ptr [[_TMP9]], align 8
|
|
// SIMD-ONLY0-NEXT: [[TMP4:%.*]] = load ptr, ptr [[ARR]], align 8, !nonnull [[META2]], !align [[META3]]
|
|
// SIMD-ONLY0-NEXT: store ptr [[TMP4]], ptr [[_TMP10]], align 8
|
|
// SIMD-ONLY0-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META2]], !align [[META3]]
|
|
// SIMD-ONLY0-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
|
|
// SIMD-ONLY0-NEXT: [[INC:%.*]] = add nsw i32 [[TMP6]], 1
|
|
// SIMD-ONLY0-NEXT: store i32 [[INC]], ptr [[TMP5]], align 4
|
|
// SIMD-ONLY0-NEXT: [[TMP7:%.*]] = load ptr, ptr [[_TMP8]], align 8, !nonnull [[META2]], !align [[META4]]
|
|
// SIMD-ONLY0-NEXT: [[TMP8:%.*]] = load ptr, ptr [[TMP7]], align 8
|
|
// SIMD-ONLY0-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
|
|
// SIMD-ONLY0-NEXT: [[INC11:%.*]] = add nsw i32 [[TMP9]], 1
|
|
// SIMD-ONLY0-NEXT: store i32 [[INC11]], ptr [[TMP8]], align 4
|
|
// SIMD-ONLY0-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP9]], align 8, !nonnull [[META2]], !align [[META3]]
|
|
// SIMD-ONLY0-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4
|
|
// SIMD-ONLY0-NEXT: [[INC12:%.*]] = add nsw i32 [[TMP11]], 1
|
|
// SIMD-ONLY0-NEXT: store i32 [[INC12]], ptr [[TMP10]], align 4
|
|
// SIMD-ONLY0-NEXT: [[TMP12:%.*]] = load ptr, ptr [[_TMP10]], align 8, !nonnull [[META2]], !align [[META3]]
|
|
// SIMD-ONLY0-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x i32], ptr [[TMP12]], i64 0, i64 0
|
|
// SIMD-ONLY0-NEXT: [[TMP13:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
|
|
// SIMD-ONLY0-NEXT: [[INC13:%.*]] = add nsw i32 [[TMP13]], 1
|
|
// SIMD-ONLY0-NEXT: store i32 [[INC13]], ptr [[ARRAYIDX]], align 4
|
|
// SIMD-ONLY0-NEXT: ret void
|
|
//
|
|
//
|
|
// SIMD-ONLY0-LABEL: define linkonce_odr void @_ZN1SC2Ev(
|
|
// SIMD-ONLY0-SAME: ptr noundef nonnull align 8 dereferenceable(40) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat {
|
|
// SIMD-ONLY0-NEXT: [[ENTRY:.*:]]
|
|
// SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
|
|
// SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
|
|
// SIMD-ONLY0-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
|
|
// SIMD-ONLY0-NEXT: store i32 0, ptr [[A]], align 8
|
|
// SIMD-ONLY0-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 1
|
|
// SIMD-ONLY0-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 0
|
|
// SIMD-ONLY0-NEXT: store ptr [[A2]], ptr [[PTR]], align 8
|
|
// SIMD-ONLY0-NEXT: [[REF:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 2
|
|
// SIMD-ONLY0-NEXT: [[A3:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 0
|
|
// SIMD-ONLY0-NEXT: store ptr [[A3]], ptr [[REF]], align 8
|
|
// SIMD-ONLY0-NEXT: ret void
|
|
//
|
|
//
|
|
// SIMD-ONLY0-OMP60-LABEL: define dso_local noundef signext i32 @main(
|
|
// SIMD-ONLY0-OMP60-SAME: i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
|
|
// SIMD-ONLY0-OMP60-NEXT: [[ENTRY:.*:]]
|
|
// SIMD-ONLY0-OMP60-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
|
|
// SIMD-ONLY0-OMP60-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
|
|
// SIMD-ONLY0-OMP60-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[A:%.*]] = alloca float, align 4
|
|
// SIMD-ONLY0-OMP60-NEXT: [[PTR:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[REF:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[ARR:%.*]] = alloca [4 x float], align 4
|
|
// SIMD-ONLY0-OMP60-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[TMP:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: store i32 0, ptr [[RETVAL]], align 4
|
|
// SIMD-ONLY0-OMP60-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
|
|
// SIMD-ONLY0-OMP60-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: store float 0.000000e+00, ptr [[A]], align 4
|
|
// SIMD-ONLY0-OMP60-NEXT: store ptr [[A]], ptr [[PTR]], align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: store ptr [[A]], ptr [[REF]], align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[TMP0:%.*]] = load float, ptr [[A]], align 4
|
|
// SIMD-ONLY0-OMP60-NEXT: [[CONV:%.*]] = fptosi float [[TMP0]] to i32
|
|
// SIMD-ONLY0-OMP60-NEXT: [[TMP1:%.*]] = zext i32 [[CONV]] to i64
|
|
// SIMD-ONLY0-OMP60-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0()
|
|
// SIMD-ONLY0-OMP60-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[VLA:%.*]] = alloca float, i64 [[TMP1]], align 4
|
|
// SIMD-ONLY0-OMP60-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: call void @_ZN1SC1Ev(ptr noundef nonnull align 8 dereferenceable(40) [[S]])
|
|
// SIMD-ONLY0-OMP60-NEXT: call void @_ZN1S3fooEv(ptr noundef nonnull align 8 dereferenceable(40) [[S]])
|
|
// SIMD-ONLY0-OMP60-NEXT: [[TMP3:%.*]] = load ptr, ptr [[REF]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]
|
|
// SIMD-ONLY0-OMP60-NEXT: store ptr [[TMP3]], ptr [[TMP]], align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[TMP4:%.*]] = load float, ptr [[A]], align 4
|
|
// SIMD-ONLY0-OMP60-NEXT: [[INC:%.*]] = fadd float [[TMP4]], 1.000000e+00
|
|
// SIMD-ONLY0-OMP60-NEXT: store float [[INC]], ptr [[A]], align 4
|
|
// SIMD-ONLY0-OMP60-NEXT: [[TMP5:%.*]] = load ptr, ptr [[PTR]], align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[TMP6:%.*]] = load float, ptr [[TMP5]], align 4
|
|
// SIMD-ONLY0-OMP60-NEXT: [[INC1:%.*]] = fadd float [[TMP6]], 1.000000e+00
|
|
// SIMD-ONLY0-OMP60-NEXT: store float [[INC1]], ptr [[TMP5]], align 4
|
|
// SIMD-ONLY0-OMP60-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META2]], !align [[META3]]
|
|
// SIMD-ONLY0-OMP60-NEXT: [[TMP8:%.*]] = load float, ptr [[TMP7]], align 4
|
|
// SIMD-ONLY0-OMP60-NEXT: [[INC2:%.*]] = fadd float [[TMP8]], 1.000000e+00
|
|
// SIMD-ONLY0-OMP60-NEXT: store float [[INC2]], ptr [[TMP7]], align 4
|
|
// SIMD-ONLY0-OMP60-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x float], ptr [[ARR]], i64 0, i64 0
|
|
// SIMD-ONLY0-OMP60-NEXT: [[TMP9:%.*]] = load float, ptr [[ARRAYIDX]], align 4
|
|
// SIMD-ONLY0-OMP60-NEXT: [[INC3:%.*]] = fadd float [[TMP9]], 1.000000e+00
|
|
// SIMD-ONLY0-OMP60-NEXT: store float [[INC3]], ptr [[ARRAYIDX]], align 4
|
|
// SIMD-ONLY0-OMP60-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds float, ptr [[VLA]], i64 0
|
|
// SIMD-ONLY0-OMP60-NEXT: [[TMP10:%.*]] = load float, ptr [[ARRAYIDX4]], align 4
|
|
// SIMD-ONLY0-OMP60-NEXT: [[INC5:%.*]] = fadd float [[TMP10]], 1.000000e+00
|
|
// SIMD-ONLY0-OMP60-NEXT: store float [[INC5]], ptr [[ARRAYIDX4]], align 4
|
|
// SIMD-ONLY0-OMP60-NEXT: [[TMP11:%.*]] = load float, ptr [[A]], align 4
|
|
// SIMD-ONLY0-OMP60-NEXT: [[CONV6:%.*]] = fptosi float [[TMP11]] to i32
|
|
// SIMD-ONLY0-OMP60-NEXT: store i32 [[CONV6]], ptr [[RETVAL]], align 4
|
|
// SIMD-ONLY0-OMP60-NEXT: [[TMP12:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP12]])
|
|
// SIMD-ONLY0-OMP60-NEXT: [[TMP13:%.*]] = load i32, ptr [[RETVAL]], align 4
|
|
// SIMD-ONLY0-OMP60-NEXT: ret i32 [[TMP13]]
|
|
//
|
|
//
|
|
// SIMD-ONLY0-OMP60-LABEL: define linkonce_odr void @_ZN1SC1Ev(
|
|
// SIMD-ONLY0-OMP60-SAME: ptr noundef nonnull align 8 dereferenceable(40) [[THIS:%.*]]) unnamed_addr #[[ATTR2:[0-9]+]] comdat {
|
|
// SIMD-ONLY0-OMP60-NEXT: [[ENTRY:.*:]]
|
|
// SIMD-ONLY0-OMP60-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: call void @_ZN1SC2Ev(ptr noundef nonnull align 8 dereferenceable(40) [[THIS1]])
|
|
// SIMD-ONLY0-OMP60-NEXT: ret void
|
|
//
|
|
//
|
|
// SIMD-ONLY0-OMP60-LABEL: define linkonce_odr void @_ZN1S3fooEv(
|
|
// SIMD-ONLY0-OMP60-SAME: ptr noundef nonnull align 8 dereferenceable(40) [[THIS:%.*]]) #[[ATTR2]] comdat {
|
|
// SIMD-ONLY0-OMP60-NEXT: [[ENTRY:.*:]]
|
|
// SIMD-ONLY0-OMP60-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[A:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[PTR:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[REF:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[PTR5:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[ARR:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[PTR8:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[TMP:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[_TMP10:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[_TMP11:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[_TMP12:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
|
|
// SIMD-ONLY0-OMP60-NEXT: store ptr [[A2]], ptr [[A]], align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[PTR3:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 1
|
|
// SIMD-ONLY0-OMP60-NEXT: store ptr [[PTR3]], ptr [[PTR]], align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[REF4:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 2
|
|
// SIMD-ONLY0-OMP60-NEXT: [[TMP0:%.*]] = load ptr, ptr [[REF4]], align 8, !nonnull [[META2]], !align [[META3]]
|
|
// SIMD-ONLY0-OMP60-NEXT: store ptr [[TMP0]], ptr [[REF]], align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[PTR6:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 1
|
|
// SIMD-ONLY0-OMP60-NEXT: store ptr [[PTR6]], ptr [[PTR5]], align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[ARR7:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 3
|
|
// SIMD-ONLY0-OMP60-NEXT: store ptr [[ARR7]], ptr [[ARR]], align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[PTR9:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 1
|
|
// SIMD-ONLY0-OMP60-NEXT: store ptr [[PTR9]], ptr [[PTR8]], align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A]], align 8, !nonnull [[META2]], !align [[META3]]
|
|
// SIMD-ONLY0-OMP60-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[TMP2:%.*]] = load ptr, ptr [[PTR8]], align 8, !nonnull [[META2]], !align [[META4:![0-9]+]]
|
|
// SIMD-ONLY0-OMP60-NEXT: store ptr [[TMP2]], ptr [[_TMP10]], align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[TMP3:%.*]] = load ptr, ptr [[REF]], align 8, !nonnull [[META2]], !align [[META3]]
|
|
// SIMD-ONLY0-OMP60-NEXT: store ptr [[TMP3]], ptr [[_TMP11]], align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[TMP4:%.*]] = load ptr, ptr [[ARR]], align 8, !nonnull [[META2]], !align [[META3]]
|
|
// SIMD-ONLY0-OMP60-NEXT: store ptr [[TMP4]], ptr [[_TMP12]], align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META2]], !align [[META3]]
|
|
// SIMD-ONLY0-OMP60-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
|
|
// SIMD-ONLY0-OMP60-NEXT: [[INC:%.*]] = add nsw i32 [[TMP6]], 1
|
|
// SIMD-ONLY0-OMP60-NEXT: store i32 [[INC]], ptr [[TMP5]], align 4
|
|
// SIMD-ONLY0-OMP60-NEXT: [[TMP7:%.*]] = load ptr, ptr [[_TMP10]], align 8, !nonnull [[META2]], !align [[META4]]
|
|
// SIMD-ONLY0-OMP60-NEXT: [[TMP8:%.*]] = load ptr, ptr [[TMP7]], align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
|
|
// SIMD-ONLY0-OMP60-NEXT: [[INC13:%.*]] = add nsw i32 [[TMP9]], 1
|
|
// SIMD-ONLY0-OMP60-NEXT: store i32 [[INC13]], ptr [[TMP8]], align 4
|
|
// SIMD-ONLY0-OMP60-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP11]], align 8, !nonnull [[META2]], !align [[META3]]
|
|
// SIMD-ONLY0-OMP60-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4
|
|
// SIMD-ONLY0-OMP60-NEXT: [[INC14:%.*]] = add nsw i32 [[TMP11]], 1
|
|
// SIMD-ONLY0-OMP60-NEXT: store i32 [[INC14]], ptr [[TMP10]], align 4
|
|
// SIMD-ONLY0-OMP60-NEXT: [[TMP12:%.*]] = load ptr, ptr [[_TMP12]], align 8, !nonnull [[META2]], !align [[META3]]
|
|
// SIMD-ONLY0-OMP60-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x i32], ptr [[TMP12]], i64 0, i64 0
|
|
// SIMD-ONLY0-OMP60-NEXT: [[TMP13:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
|
|
// SIMD-ONLY0-OMP60-NEXT: [[INC15:%.*]] = add nsw i32 [[TMP13]], 1
|
|
// SIMD-ONLY0-OMP60-NEXT: store i32 [[INC15]], ptr [[ARRAYIDX]], align 4
|
|
// SIMD-ONLY0-OMP60-NEXT: ret void
|
|
//
|
|
//
|
|
// SIMD-ONLY0-OMP60-LABEL: define linkonce_odr void @_ZN1SC2Ev(
|
|
// SIMD-ONLY0-OMP60-SAME: ptr noundef nonnull align 8 dereferenceable(40) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat {
|
|
// SIMD-ONLY0-OMP60-NEXT: [[ENTRY:.*:]]
|
|
// SIMD-ONLY0-OMP60-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
|
|
// SIMD-ONLY0-OMP60-NEXT: store i32 0, ptr [[A]], align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 1
|
|
// SIMD-ONLY0-OMP60-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 0
|
|
// SIMD-ONLY0-OMP60-NEXT: store ptr [[A2]], ptr [[PTR]], align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: [[REF:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 2
|
|
// SIMD-ONLY0-OMP60-NEXT: [[A3:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 0
|
|
// SIMD-ONLY0-OMP60-NEXT: store ptr [[A3]], ptr [[REF]], align 8
|
|
// SIMD-ONLY0-OMP60-NEXT: ret void
|
|
//
|