3b3fc701d8
Currently, the tests that check stepping through atomic sequences use a hardcoded step distance, which is unreliable because this distance depends on LLVM's codegeneration. The relocations that clang emits can change the distance of the step. Additionally, it was a poor idea to compute and check the step distance because that is not what we should actually be verifying. In the tests we already know where execution should stop after the step - for example, at a branch instruction - therefore, it is better to check the opcode of the instruction rather than the step distance. The step distance itself is not important and can sometimes be misleading. This patch rewrites the tests, so now they checks the opcode of the instruction after the step instead of the step distance.
87 lines
3.6 KiB
Python
87 lines
3.6 KiB
Python
"""
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Test software step-inst, also known as instruction level single step, in risc-v atomic sequence.
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For more information about atomic sequences, see the RISC-V Unprivileged ISA specification.
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"""
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import lldb
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from lldbsuite.test.decorators import *
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from lldbsuite.test.lldbtest import *
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from lldbsuite.test import lldbutil
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class TestSoftwareStep(TestBase):
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def do_sequence_test(self, filename, bkpt_name):
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source_file = filename + ".c"
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exe_file = filename + ".x"
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self.build(dictionary={"C_SOURCES": source_file, "EXE": exe_file})
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(target, process, cur_thread, bkpt) = lldbutil.run_to_name_breakpoint(
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self, bkpt_name, exe_name=exe_file
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)
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entry_pc = cur_thread.GetFrameAtIndex(0).GetPC()
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self.runCmd("thread step-inst")
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self.expect(
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"thread list",
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substrs=["stopped", "stop reason = instruction step into"],
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)
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# Get the instruction we stopped at
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pc = cur_thread.GetFrameAtIndex(0).GetPCAddress()
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inst = target.ReadInstructions(pc, 1).GetInstructionAtIndex(0)
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inst_mnemonic = inst.GetMnemonic(target)
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inst_operands = inst.GetOperands(target)
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if not inst_operands:
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return inst_mnemonic
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return f"{inst_mnemonic} {inst_operands}"
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@skipIf(archs=no_match("^riscv.*"))
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def test_cas(self):
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"""
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This test verifies LLDB instruction step handling of a proper lr/sc pair.
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"""
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instruction = self.do_sequence_test("main", "cas")
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self.assertEqual(instruction, "nop")
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@skipIf(archs=no_match("^riscv.*"))
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def test_branch_cas(self):
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"""
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LLDB cannot predict the actual state of registers within a critical section (i.e., inside an atomic
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sequence). Therefore, it should identify all forward branches inside the atomic sequence and set
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breakpoints at every jump address that lies beyond the end of the sequence (after the sc instruction).
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This ensures that if any such branch is taken, execution will pause at its target address.
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This test includes an lr/sc sequence containing an active forward branch with a jump address located
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after the end of the atomic section. LLDB should correctly stop at this branch's target address. The
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test is nearly identical to the previous one, except for the branch condition, which is inverted and
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will result in a taken jump.
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"""
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instruction = self.do_sequence_test("branch", "branch_cas")
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self.assertEqual(instruction, "ret")
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@skipIf(archs=no_match("^riscv.*"))
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def test_incomplete_sequence_without_lr(self):
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"""
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This test verifies the behavior of a standalone sc instruction without a preceding lr. Since the sc
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lacks the required lr pairing, LLDB should treat it as a non-atomic store rather than part of an
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atomic sequence.
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"""
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instruction = self.do_sequence_test(
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"incomplete_sequence_without_lr", "incomplete_cas"
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)
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self.assertEqual(instruction, "and a5, a2, a4")
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@skipIf(archs=no_match("^riscv.*"))
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def test_incomplete_sequence_without_sc(self):
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"""
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This test checks the behavior of a standalone lr instruction without a subsequent sc. Since the lr
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lacks its required sc counterpart, LLDB should treat it as a non-atomic load rather than part of an
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atomic sequence.
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"""
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instruction = self.do_sequence_test(
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"incomplete_sequence_without_sc", "incomplete_cas"
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)
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self.assertEqual(instruction, "and a5, a2, a4")
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