AMDGCN flavoured SPIR-V has slightly different defaults from what the BE adopts: it assumes all extensions are enabled, and expects nonsemantic debug info to be generated. Furthermore, it is necessary to encode in the resulting SPIR-V binary that what was generated was AMDGCN flavoured, which we do by setting the Generator Version to `UINT16_MAX` (which matches what we expect to see at reverse translation). We will register this generator version at <https://github.com/KhronosGroup/SPIRV-Headers>. This is a preliminary patch out of a series of patches that are needed for adopting the BE for AMDGCN flavoured SPIR-V generation.
54 lines
1.8 KiB
C++
54 lines
1.8 KiB
C++
//===- llvm/MC/MCSPIRVObjectWriter.cpp - SPIR-V Object Writer ----*- C++ *-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/MC/MCAssembler.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCSPIRVObjectWriter.h"
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#include "llvm/MC/MCSection.h"
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#include "llvm/MC/MCValue.h"
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#include "llvm/Support/EndianStream.h"
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using namespace llvm;
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void SPIRVObjectWriter::writeHeader(const MCAssembler &Asm) {
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constexpr uint32_t MagicNumber = 0x07230203;
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constexpr uint32_t GeneratorID = 43;
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const uint32_t GeneratorMagicNumber =
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Asm.getContext().getTargetTriple().getVendor() == Triple::AMD
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? UINT16_MAX
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: ((GeneratorID << 16) | (LLVM_VERSION_MAJOR));
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constexpr uint32_t Schema = 0;
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W.write<uint32_t>(MagicNumber);
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W.write<uint32_t>((VersionInfo.Major << 16) | (VersionInfo.Minor << 8));
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W.write<uint32_t>(GeneratorMagicNumber);
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W.write<uint32_t>(VersionInfo.Bound);
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W.write<uint32_t>(Schema);
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}
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void SPIRVObjectWriter::setBuildVersion(unsigned Major, unsigned Minor,
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unsigned Bound) {
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VersionInfo.Major = Major;
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VersionInfo.Minor = Minor;
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VersionInfo.Bound = Bound;
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}
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uint64_t SPIRVObjectWriter::writeObject() {
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uint64_t StartOffset = W.OS.tell();
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writeHeader(*Asm);
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for (const MCSection &S : *Asm)
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Asm->writeSectionData(W.OS, &S);
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return W.OS.tell() - StartOffset;
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}
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std::unique_ptr<MCObjectWriter>
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llvm::createSPIRVObjectWriter(std::unique_ptr<MCSPIRVObjectTargetWriter> MOTW,
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raw_pwrite_stream &OS) {
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return std::make_unique<SPIRVObjectWriter>(std::move(MOTW), OS);
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}
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