8a4cc440f2
Running optimizeTerminators prior to other optimizations like branch layout can lead to more folding and better codegen, but is not on its own able to capture all cases. There is benefit to running it in both places. This adds the existing code from #161508 into the AArch64RedundantCopyElimination pass, which sounds like a sensible enough place for it. This is a recommit with an extra fix for shrink-wrapping domtree use.
64 lines
2.1 KiB
C++
64 lines
2.1 KiB
C++
//=- AArch64RedundantCondBranch.cpp - Remove redundant conditional branches -=//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// Late in the pipeline, especially with zero phi operands propagated after tail
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// duplications, we can end up with CBZ/CBNZ/TBZ/TBNZ with a zero register. This
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// simple pass looks at the terminators to a block, removing the redundant
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// instructions where necessary.
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//
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//===----------------------------------------------------------------------===//
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#include "AArch64.h"
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#include "AArch64InstrInfo.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/TargetInstrInfo.h"
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#include "llvm/Support/Debug.h"
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using namespace llvm;
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#define DEBUG_TYPE "aarch64-redundantcondbranch"
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namespace {
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class AArch64RedundantCondBranch : public MachineFunctionPass {
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public:
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static char ID;
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AArch64RedundantCondBranch() : MachineFunctionPass(ID) {}
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bool runOnMachineFunction(MachineFunction &MF) override;
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MachineFunctionProperties getRequiredProperties() const override {
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return MachineFunctionProperties().setNoVRegs();
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}
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StringRef getPassName() const override {
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return "AArch64 Redundant Conditional Branch Elimination";
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}
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};
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char AArch64RedundantCondBranch::ID = 0;
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} // namespace
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INITIALIZE_PASS(AArch64RedundantCondBranch, "aarch64-redundantcondbranch",
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"AArch64 Redundant Conditional Branch Elimination pass", false,
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false)
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bool AArch64RedundantCondBranch::runOnMachineFunction(MachineFunction &MF) {
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if (skipFunction(MF.getFunction()))
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return false;
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const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
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bool Changed = false;
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for (MachineBasicBlock &MBB : MF)
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Changed |= optimizeTerminators(&MBB, TII);
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return Changed;
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}
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FunctionPass *llvm::createAArch64RedundantCondBranchPass() {
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return new AArch64RedundantCondBranch();
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}
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