2b839f66ae
Allow tail calls for functions returning via sret when the caller's sret
pointer can be reused. Also support tail calls for byval arguments.
The previous restriction requiring exact match of caller and callee
arguments is relaxed: tail calls are allowed as long as the callee does
not use more stack space than the caller.
Fixes #168152
104 lines
3.8 KiB
C++
104 lines
3.8 KiB
C++
//=- LoongArchMachineFunctionInfo.h - LoongArch machine function info -----===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares LoongArch-specific per-machine-function information.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_LOONGARCH_LOONGARCHMACHINEFUNCTIONINFO_H
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#define LLVM_LIB_TARGET_LOONGARCH_LOONGARCHMACHINEFUNCTIONINFO_H
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#include "LoongArchSubtarget.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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namespace llvm {
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/// LoongArchMachineFunctionInfo - This class is derived from
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/// MachineFunctionInfo and contains private LoongArch-specific information for
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/// each MachineFunction.
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class LoongArchMachineFunctionInfo : public MachineFunctionInfo {
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private:
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/// FrameIndex for start of varargs area
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int VarArgsFrameIndex = 0;
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/// Size of the save area used for varargs
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int VarArgsSaveSize = 0;
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/// Size of stack frame to save callee saved registers
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unsigned CalleeSavedStackSize = 0;
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/// Amount of bytes on stack consumed by the arguments being passed on
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/// the stack
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unsigned ArgumentStackSize = 0;
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/// FrameIndex of the spill slot when there is no scavenged register in
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/// insertIndirectBranch.
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int BranchRelaxationSpillFrameIndex = -1;
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/// Incoming ByVal arguments
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SmallVector<SDValue, 8> IncomingByValArgs;
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/// Registers that have been sign extended from i32.
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SmallVector<Register, 8> SExt32Registers;
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/// Pairs of `jr` instructions and corresponding JTI operands, used for the
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/// `annotate-tablejump` option.
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SmallVector<std::pair<MachineInstr *, int>, 4> JumpInfos;
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public:
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LoongArchMachineFunctionInfo(const Function &F,
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const TargetSubtargetInfo *STI) {}
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MachineFunctionInfo *
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clone(BumpPtrAllocator &Allocator, MachineFunction &DestMF,
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const DenseMap<MachineBasicBlock *, MachineBasicBlock *> &Src2DstMBB)
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const override {
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return DestMF.cloneInfo<LoongArchMachineFunctionInfo>(*this);
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}
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int getVarArgsFrameIndex() const { return VarArgsFrameIndex; }
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void setVarArgsFrameIndex(int Index) { VarArgsFrameIndex = Index; }
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unsigned getVarArgsSaveSize() const { return VarArgsSaveSize; }
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void setVarArgsSaveSize(int Size) { VarArgsSaveSize = Size; }
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unsigned getCalleeSavedStackSize() const { return CalleeSavedStackSize; }
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void setCalleeSavedStackSize(unsigned Size) { CalleeSavedStackSize = Size; }
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unsigned getArgumentStackSize() const { return ArgumentStackSize; }
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void setArgumentStackSize(unsigned size) { ArgumentStackSize = size; }
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int getBranchRelaxationSpillFrameIndex() {
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return BranchRelaxationSpillFrameIndex;
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}
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void setBranchRelaxationSpillFrameIndex(int Index) {
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BranchRelaxationSpillFrameIndex = Index;
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}
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void addIncomingByValArgs(SDValue Val) { IncomingByValArgs.push_back(Val); }
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SDValue getIncomingByValArgs(int Idx) { return IncomingByValArgs[Idx]; }
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unsigned getIncomingByValArgsSize() const { return IncomingByValArgs.size(); }
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void addSExt32Register(Register Reg) { SExt32Registers.push_back(Reg); }
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bool isSExt32Register(Register Reg) const {
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return is_contained(SExt32Registers, Reg);
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}
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void setJumpInfo(MachineInstr *JrMI, int JTIIdx) {
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JumpInfos.push_back(std::make_pair(JrMI, JTIIdx));
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}
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unsigned getJumpInfoSize() { return JumpInfos.size(); }
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MachineInstr *getJumpInfoJrMI(unsigned Idx) { return JumpInfos[Idx].first; }
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int getJumpInfoJTIIndex(unsigned Idx) { return JumpInfos[Idx].second; }
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};
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} // end namespace llvm
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#endif // LLVM_LIB_TARGET_LOONGARCH_LOONGARCHMACHINEFUNCTIONINFO_H
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