e413343ca7
Teach `SDNodeInfoEmitter` TableGen backend to process `SDTypeConstraint` records and emit tables for them. The tables are used by `SDNodeInfo::verifyNode()` to validate a node being created. This PR only adds validation code for `SDTCisVT` and `SDTCVecEltisVT` constraints to keep it smaller. Pull Request: https://github.com/llvm/llvm-project/pull/150125
35 lines
1.0 KiB
C++
35 lines
1.0 KiB
C++
//===----------------------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "M68kSelectionDAGInfo.h"
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#define GET_SDNODE_DESC
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#include "M68kGenSDNodeInfo.inc"
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using namespace llvm;
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M68kSelectionDAGInfo::M68kSelectionDAGInfo()
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: SelectionDAGGenTargetInfo(M68kGenSDNodeInfo) {}
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void M68kSelectionDAGInfo::verifyTargetNode(const SelectionDAG &DAG,
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const SDNode *N) const {
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switch (N->getOpcode()) {
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case M68kISD::ADD:
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case M68kISD::SUBX:
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// result #1 must have type i8, but has type i32
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return;
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case M68kISD::SETCC:
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// operand #1 must have type i8, but has type i32
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return;
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}
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SelectionDAGGenTargetInfo::verifyTargetNode(DAG, N);
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}
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M68kSelectionDAGInfo::~M68kSelectionDAGInfo() = default;
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