2f3935bcee
The PUSH2/POP2/PPX instructions for APX require updates to the Microsoft Windows OS x64 calling convention documented at https://learn.microsoft.com/en-us/cpp/build/exception-handling-x64?view=msvc-170 due to lack of suitable unwinder opcodes that can support APX PUSH2/POP2/PPX. The PR request disables this support by default for code robustness; workloads that choose to explicitly enable this support can change the default behavior by explicitly specifying the flag options that enable this support e.g. for experimentation or code paths that do not need unwinder support.
379 lines
14 KiB
C++
379 lines
14 KiB
C++
//===-- X86Subtarget.cpp - X86 Subtarget Information ----------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the X86 specific subclass of TargetSubtargetInfo.
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//
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//===----------------------------------------------------------------------===//
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#include "X86Subtarget.h"
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#include "GISel/X86CallLowering.h"
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#include "GISel/X86LegalizerInfo.h"
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#include "GISel/X86RegisterBankInfo.h"
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#include "MCTargetDesc/X86BaseInfo.h"
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#include "X86.h"
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#include "X86MacroFusion.h"
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#include "X86TargetMachine.h"
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#include "llvm/CodeGen/GlobalISel/CallLowering.h"
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#include "llvm/CodeGen/GlobalISel/InstructionSelect.h"
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#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
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#include "llvm/CodeGen/ScheduleDAGMutation.h"
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#include "llvm/IR/Attributes.h"
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#include "llvm/IR/ConstantRange.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/GlobalValue.h"
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#include "llvm/IR/Module.h"
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#include "llvm/Support/Casting.h"
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#include "llvm/Support/CodeGen.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/TargetParser/Triple.h"
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#if defined(_MSC_VER)
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#include <intrin.h>
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#endif
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using namespace llvm;
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#define DEBUG_TYPE "subtarget"
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#define GET_SUBTARGETINFO_TARGET_DESC
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#define GET_SUBTARGETINFO_CTOR
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#include "X86GenSubtargetInfo.inc"
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// Temporary option to control early if-conversion for x86 while adding machine
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// models.
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static cl::opt<bool>
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X86EarlyIfConv("x86-early-ifcvt", cl::Hidden,
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cl::desc("Enable early if-conversion on X86"));
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/// Classify a blockaddress reference for the current subtarget according to how
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/// we should reference it in a non-pcrel context.
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unsigned char X86Subtarget::classifyBlockAddressReference() const {
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return classifyLocalReference(nullptr);
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}
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/// Classify a global variable reference for the current subtarget according to
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/// how we should reference it in a non-pcrel context.
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unsigned char
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X86Subtarget::classifyGlobalReference(const GlobalValue *GV) const {
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return classifyGlobalReference(GV, *GV->getParent());
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}
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unsigned char
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X86Subtarget::classifyLocalReference(const GlobalValue *GV) const {
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CodeModel::Model CM = TM.getCodeModel();
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// Tagged globals have non-zero upper bits, which makes direct references
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// require a 64-bit immediate. With the small/medium code models this causes
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// relocation errors, so we go through the GOT instead.
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if (AllowTaggedGlobals && CM != CodeModel::Large && GV && !isa<Function>(GV))
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return X86II::MO_GOTPCREL_NORELAX;
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// If we're not PIC, it's not very interesting.
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if (!isPositionIndependent())
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return X86II::MO_NO_FLAG;
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if (is64Bit()) {
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// 64-bit ELF PIC local references may use GOTOFF relocations.
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if (isTargetELF()) {
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assert(CM != CodeModel::Tiny &&
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"Tiny codesize model not supported on X86");
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// In the large code model, all text is far from any global data, so we
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// use GOTOFF.
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if (CM == CodeModel::Large)
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return X86II::MO_GOTOFF;
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// Large GlobalValues use GOTOFF, otherwise use RIP-rel access.
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if (GV)
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return TM.isLargeGlobalValue(GV) ? X86II::MO_GOTOFF : X86II::MO_NO_FLAG;
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// GV == nullptr is for all other non-GlobalValue global data like the
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// constant pool, jump tables, labels, etc. The small and medium code
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// models treat these as accessible with a RIP-rel access.
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return X86II::MO_NO_FLAG;
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}
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// Otherwise, this is either a RIP-relative reference or a 64-bit movabsq,
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// both of which use MO_NO_FLAG.
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return X86II::MO_NO_FLAG;
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}
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// The COFF dynamic linker just patches the executable sections.
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if (isTargetCOFF())
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return X86II::MO_NO_FLAG;
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if (isTargetDarwin()) {
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// 32 bit macho has no relocation for a-b if a is undefined, even if
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// b is in the section that is being relocated.
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// This means we have to use o load even for GVs that are known to be
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// local to the dso.
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if (GV && (GV->isDeclarationForLinker() || GV->hasCommonLinkage()))
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return X86II::MO_DARWIN_NONLAZY_PIC_BASE;
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return X86II::MO_PIC_BASE_OFFSET;
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}
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return X86II::MO_GOTOFF;
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}
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unsigned char X86Subtarget::classifyGlobalReference(const GlobalValue *GV,
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const Module &M) const {
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// The static large model never uses stubs.
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if (TM.getCodeModel() == CodeModel::Large && !isPositionIndependent())
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return X86II::MO_NO_FLAG;
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// Absolute symbols can be referenced directly.
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if (GV) {
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if (std::optional<ConstantRange> CR = GV->getAbsoluteSymbolRange()) {
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// See if we can use the 8-bit immediate form. Note that some instructions
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// will sign extend the immediate operand, so to be conservative we only
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// accept the range [0,128).
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if (CR->getUnsignedMax().ult(128))
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return X86II::MO_ABS8;
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else
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return X86II::MO_NO_FLAG;
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}
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}
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if (TM.shouldAssumeDSOLocal(GV))
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return classifyLocalReference(GV);
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if (isTargetCOFF()) {
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// ExternalSymbolSDNode like _tls_index.
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if (!GV)
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return X86II::MO_NO_FLAG;
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if (GV->hasDLLImportStorageClass())
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return X86II::MO_DLLIMPORT;
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return X86II::MO_COFFSTUB;
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}
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// Some JIT users use *-win32-elf triples; these shouldn't use GOT tables.
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if (isOSWindows())
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return X86II::MO_NO_FLAG;
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if (is64Bit()) {
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// ELF supports a large, truly PIC code model with non-PC relative GOT
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// references. Other object file formats do not. Use the no-flag, 64-bit
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// reference for them.
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if (TM.getCodeModel() == CodeModel::Large)
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return isTargetELF() ? X86II::MO_GOT : X86II::MO_NO_FLAG;
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// Tagged globals have non-zero upper bits, which makes direct references
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// require a 64-bit immediate. So we can't let the linker relax the
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// relocation to a 32-bit RIP-relative direct reference.
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if (AllowTaggedGlobals && GV && !isa<Function>(GV))
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return X86II::MO_GOTPCREL_NORELAX;
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return X86II::MO_GOTPCREL;
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}
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if (isTargetDarwin()) {
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if (!isPositionIndependent())
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return X86II::MO_DARWIN_NONLAZY;
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return X86II::MO_DARWIN_NONLAZY_PIC_BASE;
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}
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// 32-bit ELF references GlobalAddress directly in static relocation model.
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// We cannot use MO_GOT because EBX may not be set up.
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if (TM.getRelocationModel() == Reloc::Static)
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return X86II::MO_NO_FLAG;
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return X86II::MO_GOT;
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}
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unsigned char
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X86Subtarget::classifyGlobalFunctionReference(const GlobalValue *GV) const {
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return classifyGlobalFunctionReference(GV, *GV->getParent());
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}
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unsigned char
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X86Subtarget::classifyGlobalFunctionReference(const GlobalValue *GV,
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const Module &M) const {
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if (TM.shouldAssumeDSOLocal(GV))
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return X86II::MO_NO_FLAG;
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// Functions on COFF can be non-DSO local for three reasons:
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// - They are intrinsic functions (!GV)
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// - They are marked dllimport
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// - They are extern_weak, and a stub is needed
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if (isTargetCOFF()) {
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if (!GV)
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return X86II::MO_NO_FLAG;
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if (GV->hasDLLImportStorageClass())
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return X86II::MO_DLLIMPORT;
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return X86II::MO_COFFSTUB;
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}
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const Function *F = dyn_cast_or_null<Function>(GV);
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if (isTargetELF()) {
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if (is64Bit() && F && (CallingConv::X86_RegCall == F->getCallingConv()))
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// According to psABI, PLT stub clobbers XMM8-XMM15.
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// In Regcall calling convention those registers are used for passing
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// parameters. Thus we need to prevent lazy binding in Regcall.
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return X86II::MO_GOTPCREL;
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// If PLT must be avoided then the call should be via GOTPCREL.
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if (((F && F->hasFnAttribute(Attribute::NonLazyBind)) ||
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(!F && M.getRtLibUseGOT())) &&
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is64Bit())
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return X86II::MO_GOTPCREL;
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// Reference ExternalSymbol directly in static relocation model.
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if (!is64Bit() && !GV && TM.getRelocationModel() == Reloc::Static)
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return X86II::MO_NO_FLAG;
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return X86II::MO_PLT;
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}
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if (is64Bit()) {
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if (F && F->hasFnAttribute(Attribute::NonLazyBind))
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// If the function is marked as non-lazy, generate an indirect call
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// which loads from the GOT directly. This avoids runtime overhead
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// at the cost of eager binding (and one extra byte of encoding).
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return X86II::MO_GOTPCREL;
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return X86II::MO_NO_FLAG;
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}
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return X86II::MO_NO_FLAG;
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}
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/// Return true if the subtarget allows calls to immediate address.
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bool X86Subtarget::isLegalToCallImmediateAddr() const {
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// FIXME: I386 PE/COFF supports PC relative calls using IMAGE_REL_I386_REL32
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// but WinCOFFObjectWriter::RecordRelocation cannot emit them. Once it does,
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// the following check for Win32 should be removed.
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if (Is64Bit || isTargetWin32())
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return false;
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return isTargetELF() || TM.getRelocationModel() == Reloc::Static;
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}
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void X86Subtarget::initSubtargetFeatures(StringRef CPU, StringRef TuneCPU,
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StringRef FS) {
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if (CPU.empty())
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CPU = "generic";
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if (TuneCPU.empty())
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TuneCPU = "i586"; // FIXME: "generic" is more modern than llc tests expect.
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std::string FullFS = X86_MC::ParseX86Triple(TargetTriple);
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assert(!FullFS.empty() && "Failed to parse X86 triple");
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if (TargetTriple.isOSWindows())
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FullFS += ",-push2pop2,-ppx";
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if (!FS.empty())
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FullFS = (Twine(FullFS) + "," + FS).str();
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// Disable 64-bit only features in non-64-bit mode.
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StringRef FeaturesIn64BitOnly[] = {
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"egpr", "push2pop2", "ppx", "ndd", "ccmp", "nf", "cf", "zu", "uintr"};
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if (FullFS.find("-64bit-mode") != std::string::npos)
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for (StringRef F : FeaturesIn64BitOnly)
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FullFS += ",-" + F.str();
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// Parse features string and set the CPU.
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ParseSubtargetFeatures(CPU, TuneCPU, FullFS);
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// All CPUs that implement SSE4.2 or SSE4A support unaligned accesses of
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// 16-bytes and under that are reasonably fast. These features were
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// introduced with Intel's Nehalem/Silvermont and AMD's Family10h
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// micro-architectures respectively.
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if (hasSSE42() || hasSSE4A())
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IsUnalignedMem16Slow = false;
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LLVM_DEBUG(dbgs() << "Subtarget features: SSELevel " << X86SSELevel
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<< ", MMX " << HasMMX << ", 64bit " << HasX86_64 << "\n");
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if (Is64Bit && !HasX86_64)
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reportFatalUsageError("64-bit code requested on a subtarget that doesn't "
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"support it!");
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// Stack alignment is 16 bytes on Darwin, Linux, kFreeBSD, Hurd and for all
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// 64-bit targets. On Solaris (32-bit), stack alignment is 4 bytes
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// following the i386 psABI, while on Illumos it is always 16 bytes.
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if (StackAlignOverride)
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stackAlignment = *StackAlignOverride;
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else if (isTargetDarwin() || isTargetLinux() || isTargetKFreeBSD() ||
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isTargetHurd() || Is64Bit)
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stackAlignment = Align(16);
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// Consume the vector width attribute or apply any target specific limit.
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if (PreferVectorWidthOverride)
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PreferVectorWidth = PreferVectorWidthOverride;
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else if (Prefer128Bit)
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PreferVectorWidth = 128;
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else if (Prefer256Bit)
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PreferVectorWidth = 256;
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}
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X86Subtarget &X86Subtarget::initializeSubtargetDependencies(StringRef CPU,
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StringRef TuneCPU,
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StringRef FS) {
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initSubtargetFeatures(CPU, TuneCPU, FS);
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return *this;
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}
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X86Subtarget::X86Subtarget(const Triple &TT, StringRef CPU, StringRef TuneCPU,
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StringRef FS, const X86TargetMachine &TM,
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MaybeAlign StackAlignOverride,
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unsigned PreferVectorWidthOverride,
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unsigned RequiredVectorWidth)
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: X86GenSubtargetInfo(TT, CPU, TuneCPU, FS),
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PICStyle(PICStyles::Style::None), TM(TM), TargetTriple(TT),
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StackAlignOverride(StackAlignOverride),
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PreferVectorWidthOverride(PreferVectorWidthOverride),
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RequiredVectorWidth(RequiredVectorWidth),
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InstrInfo(initializeSubtargetDependencies(CPU, TuneCPU, FS)),
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TLInfo(TM, *this), FrameLowering(*this, getStackAlignment()) {
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// Determine the PICStyle based on the target selected.
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if (!isPositionIndependent() || TM.getCodeModel() == CodeModel::Large)
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// With the large code model, None forces all memory accesses to be indirect
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// rather than RIP-relative.
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setPICStyle(PICStyles::Style::None);
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else if (is64Bit())
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setPICStyle(PICStyles::Style::RIPRel);
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else if (isTargetCOFF())
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setPICStyle(PICStyles::Style::None);
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else if (isTargetDarwin())
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setPICStyle(PICStyles::Style::StubPIC);
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else if (isTargetELF())
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setPICStyle(PICStyles::Style::GOT);
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CallLoweringInfo.reset(new X86CallLowering(*getTargetLowering()));
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Legalizer.reset(new X86LegalizerInfo(*this, TM));
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auto *RBI = new X86RegisterBankInfo(*getRegisterInfo());
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RegBankInfo.reset(RBI);
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InstSelector.reset(createX86InstructionSelector(TM, *this, *RBI));
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}
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// Define the virtual destructor out-of-line for build efficiency.
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X86Subtarget::~X86Subtarget() = default;
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const CallLowering *X86Subtarget::getCallLowering() const {
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return CallLoweringInfo.get();
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}
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InstructionSelector *X86Subtarget::getInstructionSelector() const {
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return InstSelector.get();
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}
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const LegalizerInfo *X86Subtarget::getLegalizerInfo() const {
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return Legalizer.get();
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}
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const RegisterBankInfo *X86Subtarget::getRegBankInfo() const {
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return RegBankInfo.get();
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}
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bool X86Subtarget::enableEarlyIfConversion() const {
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return canUseCMOV() && X86EarlyIfConv;
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}
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void X86Subtarget::getPostRAMutations(
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std::vector<std::unique_ptr<ScheduleDAGMutation>> &Mutations) const {
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Mutations.push_back(createX86MacroFusionDAGMutation());
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}
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bool X86Subtarget::isPositionIndependent() const {
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return TM.isPositionIndependent();
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}
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