191af6c254
The llvm.cond.loop intrinsic is semantically equivalent to a conditional branch conditioned on ``pred`` to a basic block consisting only of an unconditional branch to itself. Unlike such a branch, it is guaranteed to use specific instructions. This allows an interrupt handler or other introspection mechanism to straightforwardly detect whether the program is currently spinning in the infinite loop and possibly terminate the program if so. The intent is that this intrinsic may be used as a more efficient alternative to a conditional branch to a call to ``llvm.trap`` in circumstances where the loop detection is guaranteed to be present. This construct has been experimentally determined to be executed more efficiently (when the branch is not taken) than a conditional branch to a trap instruction on AMD and older Intel microarchitectures, and is also more code size efficient by avoiding the need to emit a trap instruction and possibly a long branch instruction. On i386 and x86_64, the infinite loop is guaranteed to consist of a short conditional branch instruction that branches to itself. Specifically, the first byte of the instruction will be between 0x70 and 0x7F, and the second byte will be 0xFE. Part of this RFC: https://discourse.llvm.org/t/rfc-optimizing-conditional-traps/89456 Reviewers: arsenm, RKSimon, fmayer, vitalybuka Pull Request: https://github.com/llvm/llvm-project/pull/177686
93 lines
3.3 KiB
C++
93 lines
3.3 KiB
C++
//===-- X86TargetMachine.h - Define TargetMachine for the X86 ---*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the X86 specific subclass of TargetMachine.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_X86_X86TARGETMACHINE_H
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#define LLVM_LIB_TARGET_X86_X86TARGETMACHINE_H
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#include "X86Subtarget.h"
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#include "llvm/ADT/StringMap.h"
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#include "llvm/CodeGen/CodeGenTargetMachineImpl.h"
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#include "llvm/Support/CodeGen.h"
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#include <memory>
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#include <optional>
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namespace llvm {
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class StringRef;
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class TargetTransformInfo;
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class X86TargetMachine final : public CodeGenTargetMachineImpl {
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std::unique_ptr<TargetLoweringObjectFile> TLOF;
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mutable StringMap<std::unique_ptr<X86Subtarget>> SubtargetMap;
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// True if this is used in JIT.
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bool IsJIT;
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/// Reset internal state.
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void reset() override;
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public:
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X86TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
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StringRef FS, const TargetOptions &Options,
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std::optional<Reloc::Model> RM,
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std::optional<CodeModel::Model> CM, CodeGenOptLevel OL,
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bool JIT);
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~X86TargetMachine() override;
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const X86Subtarget *getSubtargetImpl(const Function &F) const override;
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// DO NOT IMPLEMENT: There is no such thing as a valid default subtarget,
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// subtargets are per-function entities based on the target-specific
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// attributes of each function.
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const X86Subtarget *getSubtargetImpl() const = delete;
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TargetTransformInfo getTargetTransformInfo(const Function &F) const override;
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// Set up the pass pipeline.
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TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
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TargetLoweringObjectFile *getObjFileLowering() const override {
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return TLOF.get();
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}
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MachineFunctionInfo *
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createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F,
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const TargetSubtargetInfo *STI) const override;
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yaml::MachineFunctionInfo *createDefaultFuncInfoYAML() const override;
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yaml::MachineFunctionInfo *
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convertFuncInfoToYAML(const MachineFunction &MF) const override;
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bool parseMachineFunctionInfo(const yaml::MachineFunctionInfo &,
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PerFunctionMIParsingState &PFS,
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SMDiagnostic &Error,
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SMRange &SourceRange) const override;
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void registerPassBuilderCallbacks(PassBuilder &PB) override;
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Error buildCodeGenPipeline(ModulePassManager &, raw_pwrite_stream &,
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raw_pwrite_stream *, CodeGenFileType,
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const CGPassBuilderOption &,
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PassInstrumentationCallbacks *) override;
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bool isJIT() const { return IsJIT; }
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bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override;
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ScheduleDAGInstrs *
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createMachineScheduler(MachineSchedContext *C) const override;
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ScheduleDAGInstrs *
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createPostMachineScheduler(MachineSchedContext *C) const override;
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bool canLowerCondLoop() const override { return true; }
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};
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} // end namespace llvm
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#endif // LLVM_LIB_TARGET_X86_X86TARGETMACHINE_H
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