3a84a4e55d
Note: This relands #140615 adding a ".count" suffix to the non-".all" variants. Our current intrinsic support for barrier intrinsics is confusing and incomplete, with multiple intrinsics mapping to the same instruction and intrinsic names not clearly conveying intrinsic semantics. Further, we lack support for some variants. This change unifies the IR representation to a single consistently named set of intrinsics. - llvm.nvvm.barrier.cta.sync.aligned.all(i32) - llvm.nvvm.barrier.cta.sync.aligned.count(i32, i32) - llvm.nvvm.barrier.cta.arrive.aligned.count(i32, i32) - llvm.nvvm.barrier.cta.sync.all(i32) - llvm.nvvm.barrier.cta.sync.count(i32, i32) - llvm.nvvm.barrier.cta.arrive.count(i32, i32) The following Auto-Upgrade rules are used to maintain compatibility with IR using the legacy intrinsics: * llvm.nvvm.barrier0 --> llvm.nvvm.barrier.cta.sync.aligned.all(0) * llvm.nvvm.barrier.n --> llvm.nvvm.barrier.cta.sync.aligned.all(x) * llvm.nvvm.bar.sync --> llvm.nvvm.barrier.cta.sync.aligned.all(x) * llvm.nvvm.barrier --> llvm.nvvm.barrier.cta.sync.aligned.count(x, y) * llvm.nvvm.barrier.sync --> llvm.nvvm.barrier.cta.sync.all(x) * llvm.nvvm.barrier.sync.cnt --> llvm.nvvm.barrier.cta.sync.count(x, y)
26 lines
1.0 KiB
LLVM
26 lines
1.0 KiB
LLVM
; RUN: opt -aa-pipeline=globals-aa -passes='require<globals-aa>,gvn' -S < %s | FileCheck %s
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; RUN: opt -aa-pipeline=basic-aa,globals-aa -passes='require<globals-aa>,gvn' -S < %s | FileCheck %s
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;
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; Functions w/o `nosync` attribute may communicate via memory and must be
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; treated conservatively. Taken from https://reviews.llvm.org/D115302.
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target datalayout = "e-i64:64-i128:128-v16:16-v32:32-n16:32:64"
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target triple = "nvptx64-nvidia-cuda"
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@s = internal local_unnamed_addr addrspace(3) global i32 undef, align 4
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; CHECK-LABEL: @bar_sync
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; CHECK: store
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; CHECK: tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0)
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; CHECK: load
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define dso_local i32 @bar_sync(i32 %0) local_unnamed_addr {
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store i32 %0, ptr addrspacecast (ptr addrspace(3) @s to ptr), align 4
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tail call void @llvm.nvvm.barrier.cta.sync.aligned.all(i32 0)
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%2 = load i32, ptr addrspacecast (ptr addrspace(3) @s to ptr), align 4
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ret i32 %2
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}
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declare void @llvm.nvvm.barrier.cta.sync.aligned.all(i32) #0
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attributes #0 = { convergent nounwind }
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