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llvm-project
/
llvm
/
test
/
Analysis
/
UniformityAnalysis
/
AMDGPU
/
MIR
History
anjenner
740a3ad1f7
AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (
#141068
)
...
Split off from
https://github.com/llvm/llvm-project/pull/105553
as per discussion there.
2025-12-05 12:37:33 +00:00
..
irreducible
[Uniformity] Fix typo in assumed divergent cycles output (NFC) (
#155750
)
2025-08-28 14:49:33 +09:00
addrspacecast.mir
…
always-uniform-gmir.mir
…
always-uniform.mir
…
atomics-gmir.mir
AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (
#141068
)
2025-12-05 12:37:33 +00:00
atomics.mir
…
control-flow-intrinsics.mir
…
hidden-diverge-gmir.mir
…
hidden-loop-diverge.mir
…
join-loopexit-gmir.mir
…
loads-gmir.mir
AMDGPU/UniformityAnalysis: fix G_ZEXTLOAD and G_SEXTLOAD (
#157845
)
2025-09-10 17:57:15 +02:00
never-uniform.mir
…
temporal-divergence.mir
…
uses-value-from-cycle.mir
…
