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llvm-project/llvm/test/CodeGen/Mips/llvm-ir/load.ll
Alexander Richardson 9baf76a9f8
[MCAsmStreamer] Print register names in --show-inst mode 
Passing the context to `Inst.dump_pretty()` allows printing symbolic
register names instead of `<MCOperand Reg:1234>` in the output.
I plan to use this in a future RVY test cases where we have register
class with the same name in assembly syntax, but different underlying
register enum values. Printing the name of the enum value makes it
easier to test that we selected the correct register.

Reviewed By: lenary

Pull Request: https://github.com/llvm/llvm-project/pull/171252
2025-12-08 21:53:15 -08:00

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=mips-mti-linux-gnu -mcpu=mips32r2 < %s -asm-show-inst | FileCheck %s --check-prefix=MIPS32
; RUN: llc -mtriple=mips-mti-linux-gnu -mcpu=mips32r2 -mattr=+micromips < %s -asm-show-inst | FileCheck %s --check-prefix=MMR3
; RUN: llc -mtriple=mips-img-linux-gnu -mcpu=mips32r6 < %s -asm-show-inst | FileCheck %s --check-prefix=MIPS32R6
; RUN: llc -mtriple=mips-img-linux-gnu -mcpu=mips32r6 -mattr=+micromips < %s -asm-show-inst | FileCheck %s --check-prefix=MMR6
; RUN: llc -mtriple=mips64-mti-linux-gnu -mcpu=mips3 < %s -asm-show-inst | FileCheck %s --check-prefix=MIPS3
; RUN: llc -mtriple=mips64-mti-linux-gnu -mcpu=mips64 < %s -asm-show-inst | FileCheck %s --check-prefix=MIPS64
; RUN: llc -mtriple=mips64-img-linux-gnu -mcpu=mips64r6 < %s -asm-show-inst | FileCheck %s --check-prefix=MIPS64R6
; RUN: llc -mtriple=mips-mti-linux-gnu -mcpu=mips32r2 -mattr=+micromips,+fp64 < %s -asm-show-inst | FileCheck %s --check-prefix=MMR5FP64
; RUN: llc -mtriple=mips-mti-linux-gnu -mcpu=mips32r5 -mattr=+fp64 < %s -asm-show-inst | FileCheck %s --check-prefix=MIPS32R5FP643
; Test subword and word loads. We use -asm-show-inst to test that the produced
; instructions match the expected ISA.
; NOTE: As the -asm-show-inst shows the internal numbering of instructions
; and registers, these numbers have been replaced with wildcard regexes.
@a = common global i8 0, align 4
@b = common global i16 0, align 4
@c = common global i32 0, align 4
@d = common global i64 0, align 8
@e = common global float 0.0, align 4
@f = common global double 0.0, align 8
define i8 @f1() {
; MIPS32-LABEL: f1:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: lui $1, %hi(a) # <MCInst #[[#MCINST1:]] LUi
; MIPS32-NEXT: # <MCOperand Reg:AT>
; MIPS32-NEXT: # <MCOperand Expr:%hi(a)>>
; MIPS32-NEXT: jr $ra # <MCInst #[[#MCINST2:]] JR
; MIPS32-NEXT: # <MCOperand Reg:RA>>
; MIPS32-NEXT: lbu $2, %lo(a)($1) # <MCInst #[[#MCINST3:]] LBu
; MIPS32-NEXT: # <MCOperand Reg:V0>
; MIPS32-NEXT: # <MCOperand Reg:AT>
; MIPS32-NEXT: # <MCOperand Expr:%lo(a)>>
;
; MMR3-LABEL: f1:
; MMR3: # %bb.0: # %entry
; MMR3-NEXT: lui $1, %hi(a) # <MCInst #[[#MCINST4:]] LUi_MM
; MMR3-NEXT: # <MCOperand Reg:AT>
; MMR3-NEXT: # <MCOperand Expr:%hi(a)>>
; MMR3-NEXT: jr $ra # <MCInst #[[#MCINST5:]] JR_MM
; MMR3-NEXT: # <MCOperand Reg:RA>>
; MMR3-NEXT: lbu $2, %lo(a)($1) # <MCInst #[[#MCINST6:]] LBu_MM
; MMR3-NEXT: # <MCOperand Reg:V0>
; MMR3-NEXT: # <MCOperand Reg:AT>
; MMR3-NEXT: # <MCOperand Expr:%lo(a)>>
;
; MIPS32R6-LABEL: f1:
; MIPS32R6: # %bb.0: # %entry
; MIPS32R6-NEXT: lui $1, %hi(a) # <MCInst #[[#MCINST1:]] LUi
; MIPS32R6-NEXT: # <MCOperand Reg:AT>
; MIPS32R6-NEXT: # <MCOperand Expr:%hi(a)>>
; MIPS32R6-NEXT: jr $ra # <MCInst #[[#MCINST7:]] JALR
; MIPS32R6-NEXT: # <MCOperand Reg:ZERO>
; MIPS32R6-NEXT: # <MCOperand Reg:RA>>
; MIPS32R6-NEXT: lbu $2, %lo(a)($1) # <MCInst #[[#MCINST3:]] LBu
; MIPS32R6-NEXT: # <MCOperand Reg:V0>
; MIPS32R6-NEXT: # <MCOperand Reg:AT>
; MIPS32R6-NEXT: # <MCOperand Expr:%lo(a)>>
;
; MMR6-LABEL: f1:
; MMR6: # %bb.0: # %entry
; MMR6-NEXT: lui $1, %hi(a) # <MCInst #[[#MCINST4:]] LUi_MM
; MMR6-NEXT: # <MCOperand Reg:AT>
; MMR6-NEXT: # <MCOperand Expr:%hi(a)>>
; MMR6-NEXT: lbu $2, %lo(a)($1) # <MCInst #[[#MCINST6:]] LBu_MM
; MMR6-NEXT: # <MCOperand Reg:V0>
; MMR6-NEXT: # <MCOperand Reg:AT>
; MMR6-NEXT: # <MCOperand Expr:%lo(a)>>
; MMR6-NEXT: jrc $ra # <MCInst #[[#MCINST8:]] JRC16_MM
; MMR6-NEXT: # <MCOperand Reg:RA>>
;
; MIPS3-LABEL: f1:
; MIPS3: # %bb.0: # %entry
; MIPS3-NEXT: lui $1, %highest(a) # <MCInst #[[#MCINST9:]] LUi64
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%highest(a)>>
; MIPS3-NEXT: daddiu $1, $1, %higher(a) # <MCInst #[[#MCINST10:]] DADDiu
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%higher(a)>>
; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11:]] DSLL
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Imm:16>>
; MIPS3-NEXT: daddiu $1, $1, %hi(a) # <MCInst #[[#MCINST10]] DADDiu
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%hi(a)>>
; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Imm:16>>
; MIPS3-NEXT: jr $ra # <MCInst #[[#MCINST2:]] JR
; MIPS3-NEXT: # <MCOperand Reg:RA_64>>
; MIPS3-NEXT: lbu $2, %lo(a)($1) # <MCInst #[[#MCINST3:]] LBu
; MIPS3-NEXT: # <MCOperand Reg:V0>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%lo(a)>>
;
; MIPS64-LABEL: f1:
; MIPS64: # %bb.0: # %entry
; MIPS64-NEXT: lui $1, %highest(a) # <MCInst #[[#MCINST9:]] LUi64
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%highest(a)>>
; MIPS64-NEXT: daddiu $1, $1, %higher(a) # <MCInst #[[#MCINST10:]] DADDiu
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%higher(a)>>
; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11:]] DSLL
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Imm:16>>
; MIPS64-NEXT: daddiu $1, $1, %hi(a) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%hi(a)>>
; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Imm:16>>
; MIPS64-NEXT: jr $ra # <MCInst #[[#MCINST2:]] JR
; MIPS64-NEXT: # <MCOperand Reg:RA_64>>
; MIPS64-NEXT: lbu $2, %lo(a)($1) # <MCInst #[[#MCINST3:]] LBu
; MIPS64-NEXT: # <MCOperand Reg:V0>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%lo(a)>>
;
; MIPS64R6-LABEL: f1:
; MIPS64R6: # %bb.0: # %entry
; MIPS64R6-NEXT: lui $1, %highest(a) # <MCInst #[[#MCINST9:]] LUi64
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%highest(a)>>
; MIPS64R6-NEXT: daddiu $1, $1, %higher(a) # <MCInst #[[#MCINST10:]] DADDiu
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%higher(a)>>
; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11:]] DSLL
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Imm:16>>
; MIPS64R6-NEXT: daddiu $1, $1, %hi(a) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%hi(a)>>
; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Imm:16>>
; MIPS64R6-NEXT: jr $ra # <MCInst #[[#MCINST12:]] JALR64
; MIPS64R6-NEXT: # <MCOperand Reg:ZERO_64>
; MIPS64R6-NEXT: # <MCOperand Reg:RA_64>>
; MIPS64R6-NEXT: lbu $2, %lo(a)($1) # <MCInst #[[#MCINST3:]] LBu
; MIPS64R6-NEXT: # <MCOperand Reg:V0>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%lo(a)>>
;
; MMR5FP64-LABEL: f1:
; MMR5FP64: # %bb.0: # %entry
; MMR5FP64-NEXT: lui $1, %hi(a) # <MCInst #[[#MCINST4:]] LUi_MM
; MMR5FP64-NEXT: # <MCOperand Reg:AT>
; MMR5FP64-NEXT: # <MCOperand Expr:%hi(a)>>
; MMR5FP64-NEXT: jr $ra # <MCInst #[[#MCINST5:]] JR_MM
; MMR5FP64-NEXT: # <MCOperand Reg:RA>>
; MMR5FP64-NEXT: lbu $2, %lo(a)($1) # <MCInst #[[#MCINST6:]] LBu_MM
; MMR5FP64-NEXT: # <MCOperand Reg:V0>
; MMR5FP64-NEXT: # <MCOperand Reg:AT>
; MMR5FP64-NEXT: # <MCOperand Expr:%lo(a)>>
;
; MIPS32R5FP643-LABEL: f1:
; MIPS32R5FP643: # %bb.0: # %entry
; MIPS32R5FP643-NEXT: lui $1, %hi(a) # <MCInst #[[#MCINST1:]] LUi
; MIPS32R5FP643-NEXT: # <MCOperand Reg:AT>
; MIPS32R5FP643-NEXT: # <MCOperand Expr:%hi(a)>>
; MIPS32R5FP643-NEXT: jr $ra # <MCInst #[[#MCINST2:]] JR
; MIPS32R5FP643-NEXT: # <MCOperand Reg:RA>>
; MIPS32R5FP643-NEXT: lbu $2, %lo(a)($1) # <MCInst #[[#MCINST3:]] LBu
; MIPS32R5FP643-NEXT: # <MCOperand Reg:V0>
; MIPS32R5FP643-NEXT: # <MCOperand Reg:AT>
; MIPS32R5FP643-NEXT: # <MCOperand Expr:%lo(a)>>
entry:
%0 = load i8, ptr @a
ret i8 %0
}
define i32 @f2() {
; MIPS32-LABEL: f2:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: lui $1, %hi(a) # <MCInst #[[#MCINST1]] LUi
; MIPS32-NEXT: # <MCOperand Reg:AT>
; MIPS32-NEXT: # <MCOperand Expr:%hi(a)>>
; MIPS32-NEXT: jr $ra # <MCInst #[[#MCINST2]] JR
; MIPS32-NEXT: # <MCOperand Reg:RA>>
; MIPS32-NEXT: lb $2, %lo(a)($1) # <MCInst #[[#MCINST13:]] LB
; MIPS32-NEXT: # <MCOperand Reg:V0>
; MIPS32-NEXT: # <MCOperand Reg:AT>
; MIPS32-NEXT: # <MCOperand Expr:%lo(a)>>
;
; MMR3-LABEL: f2:
; MMR3: # %bb.0: # %entry
; MMR3-NEXT: lui $1, %hi(a) # <MCInst #[[#MCINST4]] LUi_MM
; MMR3-NEXT: # <MCOperand Reg:AT>
; MMR3-NEXT: # <MCOperand Expr:%hi(a)>>
; MMR3-NEXT: jr $ra # <MCInst #[[#MCINST5]] JR_MM
; MMR3-NEXT: # <MCOperand Reg:RA>>
; MMR3-NEXT: lb $2, %lo(a)($1) # <MCInst #[[#MCINST14:]] LB_MM
; MMR3-NEXT: # <MCOperand Reg:V0>
; MMR3-NEXT: # <MCOperand Reg:AT>
; MMR3-NEXT: # <MCOperand Expr:%lo(a)>>
;
; MIPS32R6-LABEL: f2:
; MIPS32R6: # %bb.0: # %entry
; MIPS32R6-NEXT: lui $1, %hi(a) # <MCInst #[[#MCINST1]] LUi
; MIPS32R6-NEXT: # <MCOperand Reg:AT>
; MIPS32R6-NEXT: # <MCOperand Expr:%hi(a)>>
; MIPS32R6-NEXT: jr $ra # <MCInst #[[#MCINST7]] JALR
; MIPS32R6-NEXT: # <MCOperand Reg:ZERO>
; MIPS32R6-NEXT: # <MCOperand Reg:RA>>
; MIPS32R6-NEXT: lb $2, %lo(a)($1) # <MCInst #[[#MCINST13:]] LB
; MIPS32R6-NEXT: # <MCOperand Reg:V0>
; MIPS32R6-NEXT: # <MCOperand Reg:AT>
; MIPS32R6-NEXT: # <MCOperand Expr:%lo(a)>>
;
; MMR6-LABEL: f2:
; MMR6: # %bb.0: # %entry
; MMR6-NEXT: lui $1, %hi(a) # <MCInst #[[#MCINST4]] LUi_MM
; MMR6-NEXT: # <MCOperand Reg:AT>
; MMR6-NEXT: # <MCOperand Expr:%hi(a)>>
; MMR6-NEXT: lb $2, %lo(a)($1) # <MCInst #[[#MCINST14:]] LB_MM
; MMR6-NEXT: # <MCOperand Reg:V0>
; MMR6-NEXT: # <MCOperand Reg:AT>
; MMR6-NEXT: # <MCOperand Expr:%lo(a)>>
; MMR6-NEXT: jrc $ra # <MCInst #[[#MCINST8]] JRC16_MM
; MMR6-NEXT: # <MCOperand Reg:RA>>
;
; MIPS3-LABEL: f2:
; MIPS3: # %bb.0: # %entry
; MIPS3-NEXT: lui $1, %highest(a) # <MCInst #[[#MCINST9]] LUi64
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%highest(a)>>
; MIPS3-NEXT: daddiu $1, $1, %higher(a) # <MCInst #[[#MCINST10]] DADDiu
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%higher(a)>>
; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Imm:16>>
; MIPS3-NEXT: daddiu $1, $1, %hi(a) # <MCInst #[[#MCINST10]] DADDiu
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%hi(a)>>
; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Imm:16>>
; MIPS3-NEXT: jr $ra # <MCInst #[[#MCINST2]] JR
; MIPS3-NEXT: # <MCOperand Reg:RA_64>>
; MIPS3-NEXT: lb $2, %lo(a)($1) # <MCInst #[[#MCINST13:]] LB
; MIPS3-NEXT: # <MCOperand Reg:V0>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%lo(a)>>
;
; MIPS64-LABEL: f2:
; MIPS64: # %bb.0: # %entry
; MIPS64-NEXT: lui $1, %highest(a) # <MCInst #[[#MCINST9]] LUi64
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%highest(a)>>
; MIPS64-NEXT: daddiu $1, $1, %higher(a) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%higher(a)>>
; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Imm:16>>
; MIPS64-NEXT: daddiu $1, $1, %hi(a) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%hi(a)>>
; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Imm:16>>
; MIPS64-NEXT: jr $ra # <MCInst #[[#MCINST2]] JR
; MIPS64-NEXT: # <MCOperand Reg:RA_64>>
; MIPS64-NEXT: lb $2, %lo(a)($1) # <MCInst #[[#MCINST13:]] LB
; MIPS64-NEXT: # <MCOperand Reg:V0>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%lo(a)>>
;
; MIPS64R6-LABEL: f2:
; MIPS64R6: # %bb.0: # %entry
; MIPS64R6-NEXT: lui $1, %highest(a) # <MCInst #[[#MCINST9]] LUi64
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%highest(a)>>
; MIPS64R6-NEXT: daddiu $1, $1, %higher(a) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%higher(a)>>
; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Imm:16>>
; MIPS64R6-NEXT: daddiu $1, $1, %hi(a) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%hi(a)>>
; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Imm:16>>
; MIPS64R6-NEXT: jr $ra # <MCInst #[[#MCINST12]] JALR64
; MIPS64R6-NEXT: # <MCOperand Reg:ZERO_64>
; MIPS64R6-NEXT: # <MCOperand Reg:RA_64>>
; MIPS64R6-NEXT: lb $2, %lo(a)($1) # <MCInst #[[#MCINST13:]] LB
; MIPS64R6-NEXT: # <MCOperand Reg:V0>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%lo(a)>>
;
; MMR5FP64-LABEL: f2:
; MMR5FP64: # %bb.0: # %entry
; MMR5FP64-NEXT: lui $1, %hi(a) # <MCInst #[[#MCINST4]] LUi_MM
; MMR5FP64-NEXT: # <MCOperand Reg:AT>
; MMR5FP64-NEXT: # <MCOperand Expr:%hi(a)>>
; MMR5FP64-NEXT: jr $ra # <MCInst #[[#MCINST5]] JR_MM
; MMR5FP64-NEXT: # <MCOperand Reg:RA>>
; MMR5FP64-NEXT: lb $2, %lo(a)($1) # <MCInst #[[#MCINST14:]] LB_MM
; MMR5FP64-NEXT: # <MCOperand Reg:V0>
; MMR5FP64-NEXT: # <MCOperand Reg:AT>
; MMR5FP64-NEXT: # <MCOperand Expr:%lo(a)>>
;
; MIPS32R5FP643-LABEL: f2:
; MIPS32R5FP643: # %bb.0: # %entry
; MIPS32R5FP643-NEXT: lui $1, %hi(a) # <MCInst #[[#MCINST1]] LUi
; MIPS32R5FP643-NEXT: # <MCOperand Reg:AT>
; MIPS32R5FP643-NEXT: # <MCOperand Expr:%hi(a)>>
; MIPS32R5FP643-NEXT: jr $ra # <MCInst #[[#MCINST2]] JR
; MIPS32R5FP643-NEXT: # <MCOperand Reg:RA>>
; MIPS32R5FP643-NEXT: lb $2, %lo(a)($1) # <MCInst #[[#MCINST13:]] LB
; MIPS32R5FP643-NEXT: # <MCOperand Reg:V0>
; MIPS32R5FP643-NEXT: # <MCOperand Reg:AT>
; MIPS32R5FP643-NEXT: # <MCOperand Expr:%lo(a)>>
entry:
%0 = load i8, ptr @a
%1 = sext i8 %0 to i32
ret i32 %1
}
define i16 @f3() {
; MIPS32-LABEL: f3:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: lui $1, %hi(b) # <MCInst #[[#MCINST1]] LUi
; MIPS32-NEXT: # <MCOperand Reg:AT>
; MIPS32-NEXT: # <MCOperand Expr:%hi(b)>>
; MIPS32-NEXT: jr $ra # <MCInst #[[#MCINST2]] JR
; MIPS32-NEXT: # <MCOperand Reg:RA>>
; MIPS32-NEXT: lhu $2, %lo(b)($1) # <MCInst #[[#MCINST15:]] LHu
; MIPS32-NEXT: # <MCOperand Reg:V0>
; MIPS32-NEXT: # <MCOperand Reg:AT>
; MIPS32-NEXT: # <MCOperand Expr:%lo(b)>>
;
; MMR3-LABEL: f3:
; MMR3: # %bb.0: # %entry
; MMR3-NEXT: lui $1, %hi(b) # <MCInst #[[#MCINST4]] LUi_MM
; MMR3-NEXT: # <MCOperand Reg:AT>
; MMR3-NEXT: # <MCOperand Expr:%hi(b)>>
; MMR3-NEXT: jr $ra # <MCInst #[[#MCINST5]] JR_MM
; MMR3-NEXT: # <MCOperand Reg:RA>>
; MMR3-NEXT: lhu $2, %lo(b)($1) # <MCInst #[[#MCINST16:]] LHu_MM
; MMR3-NEXT: # <MCOperand Reg:V0>
; MMR3-NEXT: # <MCOperand Reg:AT>
; MMR3-NEXT: # <MCOperand Expr:%lo(b)>>
;
; MIPS32R6-LABEL: f3:
; MIPS32R6: # %bb.0: # %entry
; MIPS32R6-NEXT: lui $1, %hi(b) # <MCInst #[[#MCINST1]] LUi
; MIPS32R6-NEXT: # <MCOperand Reg:AT>
; MIPS32R6-NEXT: # <MCOperand Expr:%hi(b)>>
; MIPS32R6-NEXT: jr $ra # <MCInst #[[#MCINST7]] JALR
; MIPS32R6-NEXT: # <MCOperand Reg:ZERO>
; MIPS32R6-NEXT: # <MCOperand Reg:RA>>
; MIPS32R6-NEXT: lhu $2, %lo(b)($1) # <MCInst #[[#MCINST15:]] LHu
; MIPS32R6-NEXT: # <MCOperand Reg:V0>
; MIPS32R6-NEXT: # <MCOperand Reg:AT>
; MIPS32R6-NEXT: # <MCOperand Expr:%lo(b)>>
;
; MMR6-LABEL: f3:
; MMR6: # %bb.0: # %entry
; MMR6-NEXT: lui $1, %hi(b) # <MCInst #[[#MCINST4]] LUi_MM
; MMR6-NEXT: # <MCOperand Reg:AT>
; MMR6-NEXT: # <MCOperand Expr:%hi(b)>>
; MMR6-NEXT: lhu $2, %lo(b)($1) # <MCInst #[[#MCINST16:]] LHu_MM
; MMR6-NEXT: # <MCOperand Reg:V0>
; MMR6-NEXT: # <MCOperand Reg:AT>
; MMR6-NEXT: # <MCOperand Expr:%lo(b)>>
; MMR6-NEXT: jrc $ra # <MCInst #[[#MCINST8]] JRC16_MM
; MMR6-NEXT: # <MCOperand Reg:RA>>
;
; MIPS3-LABEL: f3:
; MIPS3: # %bb.0: # %entry
; MIPS3-NEXT: lui $1, %highest(b) # <MCInst #[[#MCINST9]] LUi64
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%highest(b)>>
; MIPS3-NEXT: daddiu $1, $1, %higher(b) # <MCInst #[[#MCINST10]] DADDiu
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%higher(b)>>
; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Imm:16>>
; MIPS3-NEXT: daddiu $1, $1, %hi(b) # <MCInst #[[#MCINST10]] DADDiu
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%hi(b)>>
; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Imm:16>>
; MIPS3-NEXT: jr $ra # <MCInst #[[#MCINST2]] JR
; MIPS3-NEXT: # <MCOperand Reg:RA_64>>
; MIPS3-NEXT: lhu $2, %lo(b)($1) # <MCInst #[[#MCINST15:]] LHu
; MIPS3-NEXT: # <MCOperand Reg:V0>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%lo(b)>>
;
; MIPS64-LABEL: f3:
; MIPS64: # %bb.0: # %entry
; MIPS64-NEXT: lui $1, %highest(b) # <MCInst #[[#MCINST9]] LUi64
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%highest(b)>>
; MIPS64-NEXT: daddiu $1, $1, %higher(b) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%higher(b)>>
; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Imm:16>>
; MIPS64-NEXT: daddiu $1, $1, %hi(b) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%hi(b)>>
; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Imm:16>>
; MIPS64-NEXT: jr $ra # <MCInst #[[#MCINST2]] JR
; MIPS64-NEXT: # <MCOperand Reg:RA_64>>
; MIPS64-NEXT: lhu $2, %lo(b)($1) # <MCInst #[[#MCINST15:]] LHu
; MIPS64-NEXT: # <MCOperand Reg:V0>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%lo(b)>>
;
; MIPS64R6-LABEL: f3:
; MIPS64R6: # %bb.0: # %entry
; MIPS64R6-NEXT: lui $1, %highest(b) # <MCInst #[[#MCINST9]] LUi64
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%highest(b)>>
; MIPS64R6-NEXT: daddiu $1, $1, %higher(b) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%higher(b)>>
; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Imm:16>>
; MIPS64R6-NEXT: daddiu $1, $1, %hi(b) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%hi(b)>>
; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Imm:16>>
; MIPS64R6-NEXT: jr $ra # <MCInst #[[#MCINST12]] JALR64
; MIPS64R6-NEXT: # <MCOperand Reg:ZERO_64>
; MIPS64R6-NEXT: # <MCOperand Reg:RA_64>>
; MIPS64R6-NEXT: lhu $2, %lo(b)($1) # <MCInst #[[#MCINST15:]] LHu
; MIPS64R6-NEXT: # <MCOperand Reg:V0>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%lo(b)>>
;
; MMR5FP64-LABEL: f3:
; MMR5FP64: # %bb.0: # %entry
; MMR5FP64-NEXT: lui $1, %hi(b) # <MCInst #[[#MCINST4]] LUi_MM
; MMR5FP64-NEXT: # <MCOperand Reg:AT>
; MMR5FP64-NEXT: # <MCOperand Expr:%hi(b)>>
; MMR5FP64-NEXT: jr $ra # <MCInst #[[#MCINST5]] JR_MM
; MMR5FP64-NEXT: # <MCOperand Reg:RA>>
; MMR5FP64-NEXT: lhu $2, %lo(b)($1) # <MCInst #[[#MCINST16:]] LHu_MM
; MMR5FP64-NEXT: # <MCOperand Reg:V0>
; MMR5FP64-NEXT: # <MCOperand Reg:AT>
; MMR5FP64-NEXT: # <MCOperand Expr:%lo(b)>>
;
; MIPS32R5FP643-LABEL: f3:
; MIPS32R5FP643: # %bb.0: # %entry
; MIPS32R5FP643-NEXT: lui $1, %hi(b) # <MCInst #[[#MCINST1]] LUi
; MIPS32R5FP643-NEXT: # <MCOperand Reg:AT>
; MIPS32R5FP643-NEXT: # <MCOperand Expr:%hi(b)>>
; MIPS32R5FP643-NEXT: jr $ra # <MCInst #[[#MCINST2]] JR
; MIPS32R5FP643-NEXT: # <MCOperand Reg:RA>>
; MIPS32R5FP643-NEXT: lhu $2, %lo(b)($1) # <MCInst #[[#MCINST15:]] LHu
; MIPS32R5FP643-NEXT: # <MCOperand Reg:V0>
; MIPS32R5FP643-NEXT: # <MCOperand Reg:AT>
; MIPS32R5FP643-NEXT: # <MCOperand Expr:%lo(b)>>
entry:
%0 = load i16, ptr @b
ret i16 %0
}
define i32 @f4() {
; MIPS32-LABEL: f4:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: lui $1, %hi(b) # <MCInst #[[#MCINST1]] LUi
; MIPS32-NEXT: # <MCOperand Reg:AT>
; MIPS32-NEXT: # <MCOperand Expr:%hi(b)>>
; MIPS32-NEXT: jr $ra # <MCInst #[[#MCINST2]] JR
; MIPS32-NEXT: # <MCOperand Reg:RA>>
; MIPS32-NEXT: lh $2, %lo(b)($1) # <MCInst #[[#MCINST17:]] LH
; MIPS32-NEXT: # <MCOperand Reg:V0>
; MIPS32-NEXT: # <MCOperand Reg:AT>
; MIPS32-NEXT: # <MCOperand Expr:%lo(b)>>
;
; MMR3-LABEL: f4:
; MMR3: # %bb.0: # %entry
; MMR3-NEXT: lui $1, %hi(b) # <MCInst #[[#MCINST4]] LUi_MM
; MMR3-NEXT: # <MCOperand Reg:AT>
; MMR3-NEXT: # <MCOperand Expr:%hi(b)>>
; MMR3-NEXT: jr $ra # <MCInst #[[#MCINST5]] JR_MM
; MMR3-NEXT: # <MCOperand Reg:RA>>
; MMR3-NEXT: lh $2, %lo(b)($1) # <MCInst #[[#MCINST18:]] LH_MM
; MMR3-NEXT: # <MCOperand Reg:V0>
; MMR3-NEXT: # <MCOperand Reg:AT>
; MMR3-NEXT: # <MCOperand Expr:%lo(b)>>
;
; MIPS32R6-LABEL: f4:
; MIPS32R6: # %bb.0: # %entry
; MIPS32R6-NEXT: lui $1, %hi(b) # <MCInst #[[#MCINST1]] LUi
; MIPS32R6-NEXT: # <MCOperand Reg:AT>
; MIPS32R6-NEXT: # <MCOperand Expr:%hi(b)>>
; MIPS32R6-NEXT: jr $ra # <MCInst #[[#MCINST7]] JALR
; MIPS32R6-NEXT: # <MCOperand Reg:ZERO>
; MIPS32R6-NEXT: # <MCOperand Reg:RA>>
; MIPS32R6-NEXT: lh $2, %lo(b)($1) # <MCInst #[[#MCINST17:]] LH
; MIPS32R6-NEXT: # <MCOperand Reg:V0>
; MIPS32R6-NEXT: # <MCOperand Reg:AT>
; MIPS32R6-NEXT: # <MCOperand Expr:%lo(b)>>
;
; MMR6-LABEL: f4:
; MMR6: # %bb.0: # %entry
; MMR6-NEXT: lui $1, %hi(b) # <MCInst #[[#MCINST4]] LUi_MM
; MMR6-NEXT: # <MCOperand Reg:AT>
; MMR6-NEXT: # <MCOperand Expr:%hi(b)>>
; MMR6-NEXT: lh $2, %lo(b)($1) # <MCInst #[[#MCINST18:]] LH_MM
; MMR6-NEXT: # <MCOperand Reg:V0>
; MMR6-NEXT: # <MCOperand Reg:AT>
; MMR6-NEXT: # <MCOperand Expr:%lo(b)>>
; MMR6-NEXT: jrc $ra # <MCInst #[[#MCINST8]] JRC16_MM
; MMR6-NEXT: # <MCOperand Reg:RA>>
;
; MIPS3-LABEL: f4:
; MIPS3: # %bb.0: # %entry
; MIPS3-NEXT: lui $1, %highest(b) # <MCInst #[[#MCINST9]] LUi64
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%highest(b)>>
; MIPS3-NEXT: daddiu $1, $1, %higher(b) # <MCInst #[[#MCINST10]] DADDiu
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%higher(b)>>
; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Imm:16>>
; MIPS3-NEXT: daddiu $1, $1, %hi(b) # <MCInst #[[#MCINST10]] DADDiu
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%hi(b)>>
; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Imm:16>>
; MIPS3-NEXT: jr $ra # <MCInst #[[#MCINST2]] JR
; MIPS3-NEXT: # <MCOperand Reg:RA_64>>
; MIPS3-NEXT: lh $2, %lo(b)($1) # <MCInst #[[#MCINST17:]] LH
; MIPS3-NEXT: # <MCOperand Reg:V0>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%lo(b)>>
;
; MIPS64-LABEL: f4:
; MIPS64: # %bb.0: # %entry
; MIPS64-NEXT: lui $1, %highest(b) # <MCInst #[[#MCINST9]] LUi64
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%highest(b)>>
; MIPS64-NEXT: daddiu $1, $1, %higher(b) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%higher(b)>>
; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Imm:16>>
; MIPS64-NEXT: daddiu $1, $1, %hi(b) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%hi(b)>>
; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Imm:16>>
; MIPS64-NEXT: jr $ra # <MCInst #[[#MCINST2]] JR
; MIPS64-NEXT: # <MCOperand Reg:RA_64>>
; MIPS64-NEXT: lh $2, %lo(b)($1) # <MCInst #[[#MCINST17:]] LH
; MIPS64-NEXT: # <MCOperand Reg:V0>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%lo(b)>>
;
; MIPS64R6-LABEL: f4:
; MIPS64R6: # %bb.0: # %entry
; MIPS64R6-NEXT: lui $1, %highest(b) # <MCInst #[[#MCINST9]] LUi64
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%highest(b)>>
; MIPS64R6-NEXT: daddiu $1, $1, %higher(b) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%higher(b)>>
; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Imm:16>>
; MIPS64R6-NEXT: daddiu $1, $1, %hi(b) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%hi(b)>>
; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Imm:16>>
; MIPS64R6-NEXT: jr $ra # <MCInst #[[#MCINST12]] JALR64
; MIPS64R6-NEXT: # <MCOperand Reg:ZERO_64>
; MIPS64R6-NEXT: # <MCOperand Reg:RA_64>>
; MIPS64R6-NEXT: lh $2, %lo(b)($1) # <MCInst #[[#MCINST17:]] LH
; MIPS64R6-NEXT: # <MCOperand Reg:V0>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%lo(b)>>
;
; MMR5FP64-LABEL: f4:
; MMR5FP64: # %bb.0: # %entry
; MMR5FP64-NEXT: lui $1, %hi(b) # <MCInst #[[#MCINST4]] LUi_MM
; MMR5FP64-NEXT: # <MCOperand Reg:AT>
; MMR5FP64-NEXT: # <MCOperand Expr:%hi(b)>>
; MMR5FP64-NEXT: jr $ra # <MCInst #[[#MCINST5]] JR_MM
; MMR5FP64-NEXT: # <MCOperand Reg:RA>>
; MMR5FP64-NEXT: lh $2, %lo(b)($1) # <MCInst #[[#MCINST18:]] LH_MM
; MMR5FP64-NEXT: # <MCOperand Reg:V0>
; MMR5FP64-NEXT: # <MCOperand Reg:AT>
; MMR5FP64-NEXT: # <MCOperand Expr:%lo(b)>>
;
; MIPS32R5FP643-LABEL: f4:
; MIPS32R5FP643: # %bb.0: # %entry
; MIPS32R5FP643-NEXT: lui $1, %hi(b) # <MCInst #[[#MCINST1]] LUi
; MIPS32R5FP643-NEXT: # <MCOperand Reg:AT>
; MIPS32R5FP643-NEXT: # <MCOperand Expr:%hi(b)>>
; MIPS32R5FP643-NEXT: jr $ra # <MCInst #[[#MCINST2]] JR
; MIPS32R5FP643-NEXT: # <MCOperand Reg:RA>>
; MIPS32R5FP643-NEXT: lh $2, %lo(b)($1) # <MCInst #[[#MCINST17:]] LH
; MIPS32R5FP643-NEXT: # <MCOperand Reg:V0>
; MIPS32R5FP643-NEXT: # <MCOperand Reg:AT>
; MIPS32R5FP643-NEXT: # <MCOperand Expr:%lo(b)>>
entry:
%0 = load i16, ptr @b
%1 = sext i16 %0 to i32
ret i32 %1
}
define i32 @f5() {
; MIPS32-LABEL: f5:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: lui $1, %hi(c) # <MCInst #[[#MCINST1]] LUi
; MIPS32-NEXT: # <MCOperand Reg:AT>
; MIPS32-NEXT: # <MCOperand Expr:%hi(c)>>
; MIPS32-NEXT: jr $ra # <MCInst #[[#MCINST2]] JR
; MIPS32-NEXT: # <MCOperand Reg:RA>>
; MIPS32-NEXT: lw $2, %lo(c)($1) # <MCInst #[[#MCINST19:]] LW
; MIPS32-NEXT: # <MCOperand Reg:V0>
; MIPS32-NEXT: # <MCOperand Reg:AT>
; MIPS32-NEXT: # <MCOperand Expr:%lo(c)>>
;
; MMR3-LABEL: f5:
; MMR3: # %bb.0: # %entry
; MMR3-NEXT: lui $1, %hi(c) # <MCInst #[[#MCINST4]] LUi_MM
; MMR3-NEXT: # <MCOperand Reg:AT>
; MMR3-NEXT: # <MCOperand Expr:%hi(c)>>
; MMR3-NEXT: jr $ra # <MCInst #[[#MCINST5]] JR_MM
; MMR3-NEXT: # <MCOperand Reg:RA>>
; MMR3-NEXT: lw $2, %lo(c)($1) # <MCInst #[[#MCINST20:]] LW_MM
; MMR3-NEXT: # <MCOperand Reg:V0>
; MMR3-NEXT: # <MCOperand Reg:AT>
; MMR3-NEXT: # <MCOperand Expr:%lo(c)>>
;
; MIPS32R6-LABEL: f5:
; MIPS32R6: # %bb.0: # %entry
; MIPS32R6-NEXT: lui $1, %hi(c) # <MCInst #[[#MCINST1]] LUi
; MIPS32R6-NEXT: # <MCOperand Reg:AT>
; MIPS32R6-NEXT: # <MCOperand Expr:%hi(c)>>
; MIPS32R6-NEXT: jr $ra # <MCInst #[[#MCINST7]] JALR
; MIPS32R6-NEXT: # <MCOperand Reg:ZERO>
; MIPS32R6-NEXT: # <MCOperand Reg:RA>>
; MIPS32R6-NEXT: lw $2, %lo(c)($1) # <MCInst #[[#MCINST19:]] LW
; MIPS32R6-NEXT: # <MCOperand Reg:V0>
; MIPS32R6-NEXT: # <MCOperand Reg:AT>
; MIPS32R6-NEXT: # <MCOperand Expr:%lo(c)>>
;
; MMR6-LABEL: f5:
; MMR6: # %bb.0: # %entry
; MMR6-NEXT: lui $1, %hi(c) # <MCInst #[[#MCINST4]] LUi_MM
; MMR6-NEXT: # <MCOperand Reg:AT>
; MMR6-NEXT: # <MCOperand Expr:%hi(c)>>
; MMR6-NEXT: lw $2, %lo(c)($1) # <MCInst #[[#MCINST20:]] LW_MM
; MMR6-NEXT: # <MCOperand Reg:V0>
; MMR6-NEXT: # <MCOperand Reg:AT>
; MMR6-NEXT: # <MCOperand Expr:%lo(c)>>
; MMR6-NEXT: jrc $ra # <MCInst #[[#MCINST8]] JRC16_MM
; MMR6-NEXT: # <MCOperand Reg:RA>>
;
; MIPS3-LABEL: f5:
; MIPS3: # %bb.0: # %entry
; MIPS3-NEXT: lui $1, %highest(c) # <MCInst #[[#MCINST9]] LUi64
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%highest(c)>>
; MIPS3-NEXT: daddiu $1, $1, %higher(c) # <MCInst #[[#MCINST10]] DADDiu
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%higher(c)>>
; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Imm:16>>
; MIPS3-NEXT: daddiu $1, $1, %hi(c) # <MCInst #[[#MCINST10]] DADDiu
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%hi(c)>>
; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Imm:16>>
; MIPS3-NEXT: jr $ra # <MCInst #[[#MCINST2]] JR
; MIPS3-NEXT: # <MCOperand Reg:RA_64>>
; MIPS3-NEXT: lw $2, %lo(c)($1) # <MCInst #[[#MCINST19:]] LW
; MIPS3-NEXT: # <MCOperand Reg:V0>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%lo(c)>>
;
; MIPS64-LABEL: f5:
; MIPS64: # %bb.0: # %entry
; MIPS64-NEXT: lui $1, %highest(c) # <MCInst #[[#MCINST9]] LUi64
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%highest(c)>>
; MIPS64-NEXT: daddiu $1, $1, %higher(c) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%higher(c)>>
; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Imm:16>>
; MIPS64-NEXT: daddiu $1, $1, %hi(c) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%hi(c)>>
; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Imm:16>>
; MIPS64-NEXT: jr $ra # <MCInst #[[#MCINST2]] JR
; MIPS64-NEXT: # <MCOperand Reg:RA_64>>
; MIPS64-NEXT: lw $2, %lo(c)($1) # <MCInst #[[#MCINST19:]] LW
; MIPS64-NEXT: # <MCOperand Reg:V0>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%lo(c)>>
;
; MIPS64R6-LABEL: f5:
; MIPS64R6: # %bb.0: # %entry
; MIPS64R6-NEXT: lui $1, %highest(c) # <MCInst #[[#MCINST9]] LUi64
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%highest(c)>>
; MIPS64R6-NEXT: daddiu $1, $1, %higher(c) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%higher(c)>>
; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Imm:16>>
; MIPS64R6-NEXT: daddiu $1, $1, %hi(c) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%hi(c)>>
; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Imm:16>>
; MIPS64R6-NEXT: jr $ra # <MCInst #[[#MCINST12]] JALR64
; MIPS64R6-NEXT: # <MCOperand Reg:ZERO_64>
; MIPS64R6-NEXT: # <MCOperand Reg:RA_64>>
; MIPS64R6-NEXT: lw $2, %lo(c)($1) # <MCInst #[[#MCINST19:]] LW
; MIPS64R6-NEXT: # <MCOperand Reg:V0>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%lo(c)>>
;
; MMR5FP64-LABEL: f5:
; MMR5FP64: # %bb.0: # %entry
; MMR5FP64-NEXT: lui $1, %hi(c) # <MCInst #[[#MCINST4]] LUi_MM
; MMR5FP64-NEXT: # <MCOperand Reg:AT>
; MMR5FP64-NEXT: # <MCOperand Expr:%hi(c)>>
; MMR5FP64-NEXT: jr $ra # <MCInst #[[#MCINST5]] JR_MM
; MMR5FP64-NEXT: # <MCOperand Reg:RA>>
; MMR5FP64-NEXT: lw $2, %lo(c)($1) # <MCInst #[[#MCINST20:]] LW_MM
; MMR5FP64-NEXT: # <MCOperand Reg:V0>
; MMR5FP64-NEXT: # <MCOperand Reg:AT>
; MMR5FP64-NEXT: # <MCOperand Expr:%lo(c)>>
;
; MIPS32R5FP643-LABEL: f5:
; MIPS32R5FP643: # %bb.0: # %entry
; MIPS32R5FP643-NEXT: lui $1, %hi(c) # <MCInst #[[#MCINST1]] LUi
; MIPS32R5FP643-NEXT: # <MCOperand Reg:AT>
; MIPS32R5FP643-NEXT: # <MCOperand Expr:%hi(c)>>
; MIPS32R5FP643-NEXT: jr $ra # <MCInst #[[#MCINST2]] JR
; MIPS32R5FP643-NEXT: # <MCOperand Reg:RA>>
; MIPS32R5FP643-NEXT: lw $2, %lo(c)($1) # <MCInst #[[#MCINST19:]] LW
; MIPS32R5FP643-NEXT: # <MCOperand Reg:V0>
; MIPS32R5FP643-NEXT: # <MCOperand Reg:AT>
; MIPS32R5FP643-NEXT: # <MCOperand Expr:%lo(c)>>
entry:
%0 = load i32, ptr @c
ret i32 %0
}
define i64 @f6() {
; MIPS32-LABEL: f6:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: lui $1, %hi(c) # <MCInst #[[#MCINST1]] LUi
; MIPS32-NEXT: # <MCOperand Reg:AT>
; MIPS32-NEXT: # <MCOperand Expr:%hi(c)>>
; MIPS32-NEXT: lw $3, %lo(c)($1) # <MCInst #[[#MCINST19]] LW
; MIPS32-NEXT: # <MCOperand Reg:V1>
; MIPS32-NEXT: # <MCOperand Reg:AT>
; MIPS32-NEXT: # <MCOperand Expr:%lo(c)>>
; MIPS32-NEXT: jr $ra # <MCInst #[[#MCINST2]] JR
; MIPS32-NEXT: # <MCOperand Reg:RA>>
; MIPS32-NEXT: addiu $2, $zero, 0 # <MCInst #[[#MCINST21:]] ADDiu
; MIPS32-NEXT: # <MCOperand Reg:V0>
; MIPS32-NEXT: # <MCOperand Reg:ZERO>
; MIPS32-NEXT: # <MCOperand Imm:0>>
;
; MMR3-LABEL: f6:
; MMR3: # %bb.0: # %entry
; MMR3-NEXT: lui $1, %hi(c) # <MCInst #[[#MCINST4]] LUi_MM
; MMR3-NEXT: # <MCOperand Reg:AT>
; MMR3-NEXT: # <MCOperand Expr:%hi(c)>>
; MMR3-NEXT: li16 $2, 0 # <MCInst #[[#MCINST22:]] LI16_MM
; MMR3-NEXT: # <MCOperand Reg:V0>
; MMR3-NEXT: # <MCOperand Imm:0>>
; MMR3-NEXT: jr $ra # <MCInst #[[#MCINST5]] JR_MM
; MMR3-NEXT: # <MCOperand Reg:RA>>
; MMR3-NEXT: lw $3, %lo(c)($1) # <MCInst #[[#MCINST20]] LW_MM
; MMR3-NEXT: # <MCOperand Reg:V1>
; MMR3-NEXT: # <MCOperand Reg:AT>
; MMR3-NEXT: # <MCOperand Expr:%lo(c)>>
;
; MIPS32R6-LABEL: f6:
; MIPS32R6: # %bb.0: # %entry
; MIPS32R6-NEXT: lui $1, %hi(c) # <MCInst #[[#MCINST1]] LUi
; MIPS32R6-NEXT: # <MCOperand Reg:AT>
; MIPS32R6-NEXT: # <MCOperand Expr:%hi(c)>>
; MIPS32R6-NEXT: lw $3, %lo(c)($1) # <MCInst #[[#MCINST19]] LW
; MIPS32R6-NEXT: # <MCOperand Reg:V1>
; MIPS32R6-NEXT: # <MCOperand Reg:AT>
; MIPS32R6-NEXT: # <MCOperand Expr:%lo(c)>>
; MIPS32R6-NEXT: jr $ra # <MCInst #[[#MCINST7]] JALR
; MIPS32R6-NEXT: # <MCOperand Reg:ZERO>
; MIPS32R6-NEXT: # <MCOperand Reg:RA>>
; MIPS32R6-NEXT: addiu $2, $zero, 0 # <MCInst #[[#MCINST21:]] ADDiu
; MIPS32R6-NEXT: # <MCOperand Reg:V0>
; MIPS32R6-NEXT: # <MCOperand Reg:ZERO>
; MIPS32R6-NEXT: # <MCOperand Imm:0>>
;
; MMR6-LABEL: f6:
; MMR6: # %bb.0: # %entry
; MMR6-NEXT: lui $1, %hi(c) # <MCInst #[[#MCINST4]] LUi_MM
; MMR6-NEXT: # <MCOperand Reg:AT>
; MMR6-NEXT: # <MCOperand Expr:%hi(c)>>
; MMR6-NEXT: lw $3, %lo(c)($1) # <MCInst #[[#MCINST20]] LW_MM
; MMR6-NEXT: # <MCOperand Reg:V1>
; MMR6-NEXT: # <MCOperand Reg:AT>
; MMR6-NEXT: # <MCOperand Expr:%lo(c)>>
; MMR6-NEXT: li16 $2, 0 # <MCInst #[[#MCINST22:]] LI16_MM
; MMR6-NEXT: # <MCOperand Reg:V0>
; MMR6-NEXT: # <MCOperand Imm:0>>
; MMR6-NEXT: jrc $ra # <MCInst #[[#MCINST8]] JRC16_MM
; MMR6-NEXT: # <MCOperand Reg:RA>>
;
; MIPS3-LABEL: f6:
; MIPS3: # %bb.0: # %entry
; MIPS3-NEXT: lui $1, %highest(c) # <MCInst #[[#MCINST9]] LUi64
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%highest(c)>>
; MIPS3-NEXT: daddiu $1, $1, %higher(c) # <MCInst #[[#MCINST10]] DADDiu
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%higher(c)>>
; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Imm:16>>
; MIPS3-NEXT: daddiu $1, $1, %hi(c) # <MCInst #[[#MCINST10]] DADDiu
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%hi(c)>>
; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Imm:16>>
; MIPS3-NEXT: jr $ra # <MCInst #[[#MCINST2]] JR
; MIPS3-NEXT: # <MCOperand Reg:RA_64>>
; MIPS3-NEXT: lwu $2, %lo(c)($1) # <MCInst #[[#MCINST23:]] LWu
; MIPS3-NEXT: # <MCOperand Reg:V0_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%lo(c)>>
;
; MIPS64-LABEL: f6:
; MIPS64: # %bb.0: # %entry
; MIPS64-NEXT: lui $1, %highest(c) # <MCInst #[[#MCINST9]] LUi64
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%highest(c)>>
; MIPS64-NEXT: daddiu $1, $1, %higher(c) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%higher(c)>>
; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Imm:16>>
; MIPS64-NEXT: daddiu $1, $1, %hi(c) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%hi(c)>>
; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Imm:16>>
; MIPS64-NEXT: jr $ra # <MCInst #[[#MCINST2]] JR
; MIPS64-NEXT: # <MCOperand Reg:RA_64>>
; MIPS64-NEXT: lwu $2, %lo(c)($1) # <MCInst #[[#MCINST23:]] LWu
; MIPS64-NEXT: # <MCOperand Reg:V0_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%lo(c)>>
;
; MIPS64R6-LABEL: f6:
; MIPS64R6: # %bb.0: # %entry
; MIPS64R6-NEXT: lui $1, %highest(c) # <MCInst #[[#MCINST9]] LUi64
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%highest(c)>>
; MIPS64R6-NEXT: daddiu $1, $1, %higher(c) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%higher(c)>>
; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Imm:16>>
; MIPS64R6-NEXT: daddiu $1, $1, %hi(c) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%hi(c)>>
; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Imm:16>>
; MIPS64R6-NEXT: jr $ra # <MCInst #[[#MCINST12]] JALR64
; MIPS64R6-NEXT: # <MCOperand Reg:ZERO_64>
; MIPS64R6-NEXT: # <MCOperand Reg:RA_64>>
; MIPS64R6-NEXT: lwu $2, %lo(c)($1) # <MCInst #[[#MCINST23:]] LWu
; MIPS64R6-NEXT: # <MCOperand Reg:V0_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%lo(c)>>
;
; MMR5FP64-LABEL: f6:
; MMR5FP64: # %bb.0: # %entry
; MMR5FP64-NEXT: lui $1, %hi(c) # <MCInst #[[#MCINST4]] LUi_MM
; MMR5FP64-NEXT: # <MCOperand Reg:AT>
; MMR5FP64-NEXT: # <MCOperand Expr:%hi(c)>>
; MMR5FP64-NEXT: li16 $2, 0 # <MCInst #[[#MCINST22:]] LI16_MM
; MMR5FP64-NEXT: # <MCOperand Reg:V0>
; MMR5FP64-NEXT: # <MCOperand Imm:0>>
; MMR5FP64-NEXT: jr $ra # <MCInst #[[#MCINST5]] JR_MM
; MMR5FP64-NEXT: # <MCOperand Reg:RA>>
; MMR5FP64-NEXT: lw $3, %lo(c)($1) # <MCInst #[[#MCINST20]] LW_MM
; MMR5FP64-NEXT: # <MCOperand Reg:V1>
; MMR5FP64-NEXT: # <MCOperand Reg:AT>
; MMR5FP64-NEXT: # <MCOperand Expr:%lo(c)>>
;
; MIPS32R5FP643-LABEL: f6:
; MIPS32R5FP643: # %bb.0: # %entry
; MIPS32R5FP643-NEXT: lui $1, %hi(c) # <MCInst #[[#MCINST1]] LUi
; MIPS32R5FP643-NEXT: # <MCOperand Reg:AT>
; MIPS32R5FP643-NEXT: # <MCOperand Expr:%hi(c)>>
; MIPS32R5FP643-NEXT: lw $3, %lo(c)($1) # <MCInst #[[#MCINST19]] LW
; MIPS32R5FP643-NEXT: # <MCOperand Reg:V1>
; MIPS32R5FP643-NEXT: # <MCOperand Reg:AT>
; MIPS32R5FP643-NEXT: # <MCOperand Expr:%lo(c)>>
; MIPS32R5FP643-NEXT: jr $ra # <MCInst #[[#MCINST2]] JR
; MIPS32R5FP643-NEXT: # <MCOperand Reg:RA>>
; MIPS32R5FP643-NEXT: addiu $2, $zero, 0 # <MCInst #[[#MCINST21:]] ADDiu
; MIPS32R5FP643-NEXT: # <MCOperand Reg:V0>
; MIPS32R5FP643-NEXT: # <MCOperand Reg:ZERO>
; MIPS32R5FP643-NEXT: # <MCOperand Imm:0>>
entry:
%0 = load i32, ptr @c
%1 = zext i32 %0 to i64
ret i64 %1
}
define i64 @f7() {
; MIPS32-LABEL: f7:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: lui $1, %hi(c) # <MCInst #[[#MCINST1]] LUi
; MIPS32-NEXT: # <MCOperand Reg:AT>
; MIPS32-NEXT: # <MCOperand Expr:%hi(c)>>
; MIPS32-NEXT: lw $3, %lo(c)($1) # <MCInst #[[#MCINST19]] LW
; MIPS32-NEXT: # <MCOperand Reg:V1>
; MIPS32-NEXT: # <MCOperand Reg:AT>
; MIPS32-NEXT: # <MCOperand Expr:%lo(c)>>
; MIPS32-NEXT: jr $ra # <MCInst #[[#MCINST2]] JR
; MIPS32-NEXT: # <MCOperand Reg:RA>>
; MIPS32-NEXT: sra $2, $3, 31 # <MCInst #[[#MCINST24:]] SRA
; MIPS32-NEXT: # <MCOperand Reg:V0>
; MIPS32-NEXT: # <MCOperand Reg:V1>
; MIPS32-NEXT: # <MCOperand Imm:31>>
;
; MMR3-LABEL: f7:
; MMR3: # %bb.0: # %entry
; MMR3-NEXT: lui $1, %hi(c) # <MCInst #[[#MCINST4]] LUi_MM
; MMR3-NEXT: # <MCOperand Reg:AT>
; MMR3-NEXT: # <MCOperand Expr:%hi(c)>>
; MMR3-NEXT: lw $3, %lo(c)($1) # <MCInst #[[#MCINST20]] LW_MM
; MMR3-NEXT: # <MCOperand Reg:V1>
; MMR3-NEXT: # <MCOperand Reg:AT>
; MMR3-NEXT: # <MCOperand Expr:%lo(c)>>
; MMR3-NEXT: jr $ra # <MCInst #[[#MCINST5]] JR_MM
; MMR3-NEXT: # <MCOperand Reg:RA>>
; MMR3-NEXT: sra $2, $3, 31 # <MCInst #[[#MCINST25:]] SRA_MM
; MMR3-NEXT: # <MCOperand Reg:V0>
; MMR3-NEXT: # <MCOperand Reg:V1>
; MMR3-NEXT: # <MCOperand Imm:31>>
;
; MIPS32R6-LABEL: f7:
; MIPS32R6: # %bb.0: # %entry
; MIPS32R6-NEXT: lui $1, %hi(c) # <MCInst #[[#MCINST1]] LUi
; MIPS32R6-NEXT: # <MCOperand Reg:AT>
; MIPS32R6-NEXT: # <MCOperand Expr:%hi(c)>>
; MIPS32R6-NEXT: lw $3, %lo(c)($1) # <MCInst #[[#MCINST19]] LW
; MIPS32R6-NEXT: # <MCOperand Reg:V1>
; MIPS32R6-NEXT: # <MCOperand Reg:AT>
; MIPS32R6-NEXT: # <MCOperand Expr:%lo(c)>>
; MIPS32R6-NEXT: jr $ra # <MCInst #[[#MCINST7]] JALR
; MIPS32R6-NEXT: # <MCOperand Reg:ZERO>
; MIPS32R6-NEXT: # <MCOperand Reg:RA>>
; MIPS32R6-NEXT: sra $2, $3, 31 # <MCInst #[[#MCINST24:]] SRA
; MIPS32R6-NEXT: # <MCOperand Reg:V0>
; MIPS32R6-NEXT: # <MCOperand Reg:V1>
; MIPS32R6-NEXT: # <MCOperand Imm:31>>
;
; MMR6-LABEL: f7:
; MMR6: # %bb.0: # %entry
; MMR6-NEXT: lui $1, %hi(c) # <MCInst #[[#MCINST4]] LUi_MM
; MMR6-NEXT: # <MCOperand Reg:AT>
; MMR6-NEXT: # <MCOperand Expr:%hi(c)>>
; MMR6-NEXT: lw $3, %lo(c)($1) # <MCInst #[[#MCINST20]] LW_MM
; MMR6-NEXT: # <MCOperand Reg:V1>
; MMR6-NEXT: # <MCOperand Reg:AT>
; MMR6-NEXT: # <MCOperand Expr:%lo(c)>>
; MMR6-NEXT: sra $2, $3, 31 # <MCInst #[[#MCINST25:]] SRA_MM
; MMR6-NEXT: # <MCOperand Reg:V0>
; MMR6-NEXT: # <MCOperand Reg:V1>
; MMR6-NEXT: # <MCOperand Imm:31>>
; MMR6-NEXT: jrc $ra # <MCInst #[[#MCINST8]] JRC16_MM
; MMR6-NEXT: # <MCOperand Reg:RA>>
;
; MIPS3-LABEL: f7:
; MIPS3: # %bb.0: # %entry
; MIPS3-NEXT: lui $1, %highest(c) # <MCInst #[[#MCINST9]] LUi64
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%highest(c)>>
; MIPS3-NEXT: daddiu $1, $1, %higher(c) # <MCInst #[[#MCINST10]] DADDiu
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%higher(c)>>
; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Imm:16>>
; MIPS3-NEXT: daddiu $1, $1, %hi(c) # <MCInst #[[#MCINST10]] DADDiu
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%hi(c)>>
; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Imm:16>>
; MIPS3-NEXT: jr $ra # <MCInst #[[#MCINST2]] JR
; MIPS3-NEXT: # <MCOperand Reg:RA_64>>
; MIPS3-NEXT: lw $2, %lo(c)($1) # <MCInst #[[#MCINST26:]] LW64
; MIPS3-NEXT: # <MCOperand Reg:V0_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%lo(c)>>
;
; MIPS64-LABEL: f7:
; MIPS64: # %bb.0: # %entry
; MIPS64-NEXT: lui $1, %highest(c) # <MCInst #[[#MCINST9]] LUi64
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%highest(c)>>
; MIPS64-NEXT: daddiu $1, $1, %higher(c) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%higher(c)>>
; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Imm:16>>
; MIPS64-NEXT: daddiu $1, $1, %hi(c) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%hi(c)>>
; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Imm:16>>
; MIPS64-NEXT: jr $ra # <MCInst #[[#MCINST2]] JR
; MIPS64-NEXT: # <MCOperand Reg:RA_64>>
; MIPS64-NEXT: lw $2, %lo(c)($1) # <MCInst #[[#MCINST26:]] LW64
; MIPS64-NEXT: # <MCOperand Reg:V0_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%lo(c)>>
;
; MIPS64R6-LABEL: f7:
; MIPS64R6: # %bb.0: # %entry
; MIPS64R6-NEXT: lui $1, %highest(c) # <MCInst #[[#MCINST9]] LUi64
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%highest(c)>>
; MIPS64R6-NEXT: daddiu $1, $1, %higher(c) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%higher(c)>>
; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Imm:16>>
; MIPS64R6-NEXT: daddiu $1, $1, %hi(c) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%hi(c)>>
; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Imm:16>>
; MIPS64R6-NEXT: jr $ra # <MCInst #[[#MCINST12]] JALR64
; MIPS64R6-NEXT: # <MCOperand Reg:ZERO_64>
; MIPS64R6-NEXT: # <MCOperand Reg:RA_64>>
; MIPS64R6-NEXT: lw $2, %lo(c)($1) # <MCInst #[[#MCINST26:]] LW64
; MIPS64R6-NEXT: # <MCOperand Reg:V0_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%lo(c)>>
;
; MMR5FP64-LABEL: f7:
; MMR5FP64: # %bb.0: # %entry
; MMR5FP64-NEXT: lui $1, %hi(c) # <MCInst #[[#MCINST4]] LUi_MM
; MMR5FP64-NEXT: # <MCOperand Reg:AT>
; MMR5FP64-NEXT: # <MCOperand Expr:%hi(c)>>
; MMR5FP64-NEXT: lw $3, %lo(c)($1) # <MCInst #[[#MCINST20]] LW_MM
; MMR5FP64-NEXT: # <MCOperand Reg:V1>
; MMR5FP64-NEXT: # <MCOperand Reg:AT>
; MMR5FP64-NEXT: # <MCOperand Expr:%lo(c)>>
; MMR5FP64-NEXT: jr $ra # <MCInst #[[#MCINST5]] JR_MM
; MMR5FP64-NEXT: # <MCOperand Reg:RA>>
; MMR5FP64-NEXT: sra $2, $3, 31 # <MCInst #[[#MCINST25:]] SRA_MM
; MMR5FP64-NEXT: # <MCOperand Reg:V0>
; MMR5FP64-NEXT: # <MCOperand Reg:V1>
; MMR5FP64-NEXT: # <MCOperand Imm:31>>
;
; MIPS32R5FP643-LABEL: f7:
; MIPS32R5FP643: # %bb.0: # %entry
; MIPS32R5FP643-NEXT: lui $1, %hi(c) # <MCInst #[[#MCINST1]] LUi
; MIPS32R5FP643-NEXT: # <MCOperand Reg:AT>
; MIPS32R5FP643-NEXT: # <MCOperand Expr:%hi(c)>>
; MIPS32R5FP643-NEXT: lw $3, %lo(c)($1) # <MCInst #[[#MCINST19]] LW
; MIPS32R5FP643-NEXT: # <MCOperand Reg:V1>
; MIPS32R5FP643-NEXT: # <MCOperand Reg:AT>
; MIPS32R5FP643-NEXT: # <MCOperand Expr:%lo(c)>>
; MIPS32R5FP643-NEXT: jr $ra # <MCInst #[[#MCINST2]] JR
; MIPS32R5FP643-NEXT: # <MCOperand Reg:RA>>
; MIPS32R5FP643-NEXT: sra $2, $3, 31 # <MCInst #[[#MCINST24:]] SRA
; MIPS32R5FP643-NEXT: # <MCOperand Reg:V0>
; MIPS32R5FP643-NEXT: # <MCOperand Reg:V1>
; MIPS32R5FP643-NEXT: # <MCOperand Imm:31>>
entry:
%0 = load i32, ptr @c
%1 = sext i32 %0 to i64
ret i64 %1
}
define float @f8() {
; MIPS32-LABEL: f8:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: lui $1, %hi(e) # <MCInst #[[#MCINST1]] LUi
; MIPS32-NEXT: # <MCOperand Reg:AT>
; MIPS32-NEXT: # <MCOperand Expr:%hi(e)>>
; MIPS32-NEXT: jr $ra # <MCInst #[[#MCINST2]] JR
; MIPS32-NEXT: # <MCOperand Reg:RA>>
; MIPS32-NEXT: lwc1 $f0, %lo(e)($1) # <MCInst #[[#MCINST27:]] LWC1
; MIPS32-NEXT: # <MCOperand Reg:F0>
; MIPS32-NEXT: # <MCOperand Reg:AT>
; MIPS32-NEXT: # <MCOperand Expr:%lo(e)>>
;
; MMR3-LABEL: f8:
; MMR3: # %bb.0: # %entry
; MMR3-NEXT: lui $1, %hi(e) # <MCInst #[[#MCINST4]] LUi_MM
; MMR3-NEXT: # <MCOperand Reg:AT>
; MMR3-NEXT: # <MCOperand Expr:%hi(e)>>
; MMR3-NEXT: jr $ra # <MCInst #[[#MCINST5]] JR_MM
; MMR3-NEXT: # <MCOperand Reg:RA>>
; MMR3-NEXT: lwc1 $f0, %lo(e)($1) # <MCInst #[[#MCINST28:]] LWC1_MM
; MMR3-NEXT: # <MCOperand Reg:F0>
; MMR3-NEXT: # <MCOperand Reg:AT>
; MMR3-NEXT: # <MCOperand Expr:%lo(e)>>
;
; MIPS32R6-LABEL: f8:
; MIPS32R6: # %bb.0: # %entry
; MIPS32R6-NEXT: lui $1, %hi(e) # <MCInst #[[#MCINST1]] LUi
; MIPS32R6-NEXT: # <MCOperand Reg:AT>
; MIPS32R6-NEXT: # <MCOperand Expr:%hi(e)>>
; MIPS32R6-NEXT: jr $ra # <MCInst #[[#MCINST7]] JALR
; MIPS32R6-NEXT: # <MCOperand Reg:ZERO>
; MIPS32R6-NEXT: # <MCOperand Reg:RA>>
; MIPS32R6-NEXT: lwc1 $f0, %lo(e)($1) # <MCInst #[[#MCINST27:]] LWC1
; MIPS32R6-NEXT: # <MCOperand Reg:F0>
; MIPS32R6-NEXT: # <MCOperand Reg:AT>
; MIPS32R6-NEXT: # <MCOperand Expr:%lo(e)>>
;
; MMR6-LABEL: f8:
; MMR6: # %bb.0: # %entry
; MMR6-NEXT: lui $1, %hi(e) # <MCInst #[[#MCINST4]] LUi_MM
; MMR6-NEXT: # <MCOperand Reg:AT>
; MMR6-NEXT: # <MCOperand Expr:%hi(e)>>
; MMR6-NEXT: lwc1 $f0, %lo(e)($1) # <MCInst #[[#MCINST28:]] LWC1_MM
; MMR6-NEXT: # <MCOperand Reg:F0>
; MMR6-NEXT: # <MCOperand Reg:AT>
; MMR6-NEXT: # <MCOperand Expr:%lo(e)>>
; MMR6-NEXT: jrc $ra # <MCInst #[[#MCINST8]] JRC16_MM
; MMR6-NEXT: # <MCOperand Reg:RA>>
;
; MIPS3-LABEL: f8:
; MIPS3: # %bb.0: # %entry
; MIPS3-NEXT: lui $1, %highest(e) # <MCInst #[[#MCINST9]] LUi64
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%highest(e)>>
; MIPS3-NEXT: daddiu $1, $1, %higher(e) # <MCInst #[[#MCINST10]] DADDiu
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%higher(e)>>
; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Imm:16>>
; MIPS3-NEXT: daddiu $1, $1, %hi(e) # <MCInst #[[#MCINST10]] DADDiu
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%hi(e)>>
; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Imm:16>>
; MIPS3-NEXT: jr $ra # <MCInst #[[#MCINST2]] JR
; MIPS3-NEXT: # <MCOperand Reg:RA_64>>
; MIPS3-NEXT: lwc1 $f0, %lo(e)($1) # <MCInst #[[#MCINST27:]] LWC1
; MIPS3-NEXT: # <MCOperand Reg:F0>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%lo(e)>>
;
; MIPS64-LABEL: f8:
; MIPS64: # %bb.0: # %entry
; MIPS64-NEXT: lui $1, %highest(e) # <MCInst #[[#MCINST9]] LUi64
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%highest(e)>>
; MIPS64-NEXT: daddiu $1, $1, %higher(e) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%higher(e)>>
; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Imm:16>>
; MIPS64-NEXT: daddiu $1, $1, %hi(e) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%hi(e)>>
; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Imm:16>>
; MIPS64-NEXT: jr $ra # <MCInst #[[#MCINST2]] JR
; MIPS64-NEXT: # <MCOperand Reg:RA_64>>
; MIPS64-NEXT: lwc1 $f0, %lo(e)($1) # <MCInst #[[#MCINST27:]] LWC1
; MIPS64-NEXT: # <MCOperand Reg:F0>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%lo(e)>>
;
; MIPS64R6-LABEL: f8:
; MIPS64R6: # %bb.0: # %entry
; MIPS64R6-NEXT: lui $1, %highest(e) # <MCInst #[[#MCINST9]] LUi64
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%highest(e)>>
; MIPS64R6-NEXT: daddiu $1, $1, %higher(e) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%higher(e)>>
; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Imm:16>>
; MIPS64R6-NEXT: daddiu $1, $1, %hi(e) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%hi(e)>>
; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Imm:16>>
; MIPS64R6-NEXT: jr $ra # <MCInst #[[#MCINST12]] JALR64
; MIPS64R6-NEXT: # <MCOperand Reg:ZERO_64>
; MIPS64R6-NEXT: # <MCOperand Reg:RA_64>>
; MIPS64R6-NEXT: lwc1 $f0, %lo(e)($1) # <MCInst #[[#MCINST27:]] LWC1
; MIPS64R6-NEXT: # <MCOperand Reg:F0>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%lo(e)>>
;
; MMR5FP64-LABEL: f8:
; MMR5FP64: # %bb.0: # %entry
; MMR5FP64-NEXT: lui $1, %hi(e) # <MCInst #[[#MCINST4]] LUi_MM
; MMR5FP64-NEXT: # <MCOperand Reg:AT>
; MMR5FP64-NEXT: # <MCOperand Expr:%hi(e)>>
; MMR5FP64-NEXT: jr $ra # <MCInst #[[#MCINST5]] JR_MM
; MMR5FP64-NEXT: # <MCOperand Reg:RA>>
; MMR5FP64-NEXT: lwc1 $f0, %lo(e)($1) # <MCInst #[[#MCINST28:]] LWC1_MM
; MMR5FP64-NEXT: # <MCOperand Reg:F0>
; MMR5FP64-NEXT: # <MCOperand Reg:AT>
; MMR5FP64-NEXT: # <MCOperand Expr:%lo(e)>>
;
; MIPS32R5FP643-LABEL: f8:
; MIPS32R5FP643: # %bb.0: # %entry
; MIPS32R5FP643-NEXT: lui $1, %hi(e) # <MCInst #[[#MCINST1]] LUi
; MIPS32R5FP643-NEXT: # <MCOperand Reg:AT>
; MIPS32R5FP643-NEXT: # <MCOperand Expr:%hi(e)>>
; MIPS32R5FP643-NEXT: jr $ra # <MCInst #[[#MCINST2]] JR
; MIPS32R5FP643-NEXT: # <MCOperand Reg:RA>>
; MIPS32R5FP643-NEXT: lwc1 $f0, %lo(e)($1) # <MCInst #[[#MCINST27:]] LWC1
; MIPS32R5FP643-NEXT: # <MCOperand Reg:F0>
; MIPS32R5FP643-NEXT: # <MCOperand Reg:AT>
; MIPS32R5FP643-NEXT: # <MCOperand Expr:%lo(e)>>
entry:
%0 = load float, ptr @e
ret float %0
}
define double @f9() {
; MIPS32-LABEL: f9:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: lui $1, %hi(f) # <MCInst #[[#MCINST1]] LUi
; MIPS32-NEXT: # <MCOperand Reg:AT>
; MIPS32-NEXT: # <MCOperand Expr:%hi(f)>>
; MIPS32-NEXT: jr $ra # <MCInst #[[#MCINST2]] JR
; MIPS32-NEXT: # <MCOperand Reg:RA>>
; MIPS32-NEXT: ldc1 $f0, %lo(f)($1) # <MCInst #[[#MCINST29:]] LDC1
; MIPS32-NEXT: # <MCOperand Reg:D0>
; MIPS32-NEXT: # <MCOperand Reg:AT>
; MIPS32-NEXT: # <MCOperand Expr:%lo(f)>>
;
; MMR3-LABEL: f9:
; MMR3: # %bb.0: # %entry
; MMR3-NEXT: lui $1, %hi(f) # <MCInst #[[#MCINST4]] LUi_MM
; MMR3-NEXT: # <MCOperand Reg:AT>
; MMR3-NEXT: # <MCOperand Expr:%hi(f)>>
; MMR3-NEXT: jr $ra # <MCInst #[[#MCINST5]] JR_MM
; MMR3-NEXT: # <MCOperand Reg:RA>>
; MMR3-NEXT: ldc1 $f0, %lo(f)($1) # <MCInst #[[#MCINST30:]] LDC1_MM_D32
; MMR3-NEXT: # <MCOperand Reg:D0>
; MMR3-NEXT: # <MCOperand Reg:AT>
; MMR3-NEXT: # <MCOperand Expr:%lo(f)>>
;
; MIPS32R6-LABEL: f9:
; MIPS32R6: # %bb.0: # %entry
; MIPS32R6-NEXT: lui $1, %hi(f) # <MCInst #[[#MCINST1]] LUi
; MIPS32R6-NEXT: # <MCOperand Reg:AT>
; MIPS32R6-NEXT: # <MCOperand Expr:%hi(f)>>
; MIPS32R6-NEXT: jr $ra # <MCInst #[[#MCINST7]] JALR
; MIPS32R6-NEXT: # <MCOperand Reg:ZERO>
; MIPS32R6-NEXT: # <MCOperand Reg:RA>>
; MIPS32R6-NEXT: ldc1 $f0, %lo(f)($1) # <MCInst #[[#MCINST31:]] LDC164
; MIPS32R6-NEXT: # <MCOperand Reg:D0_64>
; MIPS32R6-NEXT: # <MCOperand Reg:AT>
; MIPS32R6-NEXT: # <MCOperand Expr:%lo(f)>>
;
; MMR6-LABEL: f9:
; MMR6: # %bb.0: # %entry
; MMR6-NEXT: lui $1, %hi(f) # <MCInst #[[#MCINST4]] LUi_MM
; MMR6-NEXT: # <MCOperand Reg:AT>
; MMR6-NEXT: # <MCOperand Expr:%hi(f)>>
; MMR6-NEXT: ldc1 $f0, %lo(f)($1) # <MCInst #[[#MCINST32:]] LDC1_D64_MMR6
; MMR6-NEXT: # <MCOperand Reg:D0_64>
; MMR6-NEXT: # <MCOperand Reg:AT>
; MMR6-NEXT: # <MCOperand Expr:%lo(f)>>
; MMR6-NEXT: jrc $ra # <MCInst #[[#MCINST8]] JRC16_MM
; MMR6-NEXT: # <MCOperand Reg:RA>>
;
; MIPS3-LABEL: f9:
; MIPS3: # %bb.0: # %entry
; MIPS3-NEXT: lui $1, %highest(f) # <MCInst #[[#MCINST9]] LUi64
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%highest(f)>>
; MIPS3-NEXT: daddiu $1, $1, %higher(f) # <MCInst #[[#MCINST10]] DADDiu
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%higher(f)>>
; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Imm:16>>
; MIPS3-NEXT: daddiu $1, $1, %hi(f) # <MCInst #[[#MCINST10]] DADDiu
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%hi(f)>>
; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Imm:16>>
; MIPS3-NEXT: jr $ra # <MCInst #[[#MCINST2]] JR
; MIPS3-NEXT: # <MCOperand Reg:RA_64>>
; MIPS3-NEXT: ldc1 $f0, %lo(f)($1) # <MCInst #[[#MCINST31:]] LDC164
; MIPS3-NEXT: # <MCOperand Reg:D0_64>
; MIPS3-NEXT: # <MCOperand Reg:AT_64>
; MIPS3-NEXT: # <MCOperand Expr:%lo(f)>>
;
; MIPS64-LABEL: f9:
; MIPS64: # %bb.0: # %entry
; MIPS64-NEXT: lui $1, %highest(f) # <MCInst #[[#MCINST9]] LUi64
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%highest(f)>>
; MIPS64-NEXT: daddiu $1, $1, %higher(f) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%higher(f)>>
; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Imm:16>>
; MIPS64-NEXT: daddiu $1, $1, %hi(f) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%hi(f)>>
; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Imm:16>>
; MIPS64-NEXT: jr $ra # <MCInst #[[#MCINST2]] JR
; MIPS64-NEXT: # <MCOperand Reg:RA_64>>
; MIPS64-NEXT: ldc1 $f0, %lo(f)($1) # <MCInst #[[#MCINST31:]] LDC164
; MIPS64-NEXT: # <MCOperand Reg:D0_64>
; MIPS64-NEXT: # <MCOperand Reg:AT_64>
; MIPS64-NEXT: # <MCOperand Expr:%lo(f)>>
;
; MIPS64R6-LABEL: f9:
; MIPS64R6: # %bb.0: # %entry
; MIPS64R6-NEXT: lui $1, %highest(f) # <MCInst #[[#MCINST9]] LUi64
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%highest(f)>>
; MIPS64R6-NEXT: daddiu $1, $1, %higher(f) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%higher(f)>>
; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Imm:16>>
; MIPS64R6-NEXT: daddiu $1, $1, %hi(f) # <MCInst #[[#MCINST10]] DADDiu
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%hi(f)>>
; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #[[#MCINST11]] DSLL
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Imm:16>>
; MIPS64R6-NEXT: jr $ra # <MCInst #[[#MCINST12]] JALR64
; MIPS64R6-NEXT: # <MCOperand Reg:ZERO_64>
; MIPS64R6-NEXT: # <MCOperand Reg:RA_64>>
; MIPS64R6-NEXT: ldc1 $f0, %lo(f)($1) # <MCInst #[[#MCINST31:]] LDC164
; MIPS64R6-NEXT: # <MCOperand Reg:D0_64>
; MIPS64R6-NEXT: # <MCOperand Reg:AT_64>
; MIPS64R6-NEXT: # <MCOperand Expr:%lo(f)>>
;
; MMR5FP64-LABEL: f9:
; MMR5FP64: # %bb.0: # %entry
; MMR5FP64-NEXT: lui $1, %hi(f) # <MCInst #[[#MCINST4]] LUi_MM
; MMR5FP64-NEXT: # <MCOperand Reg:AT>
; MMR5FP64-NEXT: # <MCOperand Expr:%hi(f)>>
; MMR5FP64-NEXT: jr $ra # <MCInst #[[#MCINST5]] JR_MM
; MMR5FP64-NEXT: # <MCOperand Reg:RA>>
; MMR5FP64-NEXT: ldc1 $f0, %lo(f)($1) # <MCInst #[[#MCINST33:]] LDC1_MM_D64
; MMR5FP64-NEXT: # <MCOperand Reg:D0_64>
; MMR5FP64-NEXT: # <MCOperand Reg:AT>
; MMR5FP64-NEXT: # <MCOperand Expr:%lo(f)>>
;
; MIPS32R5FP643-LABEL: f9:
; MIPS32R5FP643: # %bb.0: # %entry
; MIPS32R5FP643-NEXT: lui $1, %hi(f) # <MCInst #[[#MCINST1]] LUi
; MIPS32R5FP643-NEXT: # <MCOperand Reg:AT>
; MIPS32R5FP643-NEXT: # <MCOperand Expr:%hi(f)>>
; MIPS32R5FP643-NEXT: jr $ra # <MCInst #[[#MCINST2]] JR
; MIPS32R5FP643-NEXT: # <MCOperand Reg:RA>>
; MIPS32R5FP643-NEXT: ldc1 $f0, %lo(f)($1) # <MCInst #[[#MCINST31:]] LDC164
; MIPS32R5FP643-NEXT: # <MCOperand Reg:D0_64>
; MIPS32R5FP643-NEXT: # <MCOperand Reg:AT>
; MIPS32R5FP643-NEXT: # <MCOperand Expr:%lo(f)>>
entry:
%0 = load double, ptr @f
ret double %0
}
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