4f04770984
Such that we can now have something like: ``` PseudoVFMACC_VV_M2_E64 %1, %28, %28, 7 /* frm=dyn */, %21 /* vl */, 6 /* e64 */, 0 /* tu, mu */ ``` or ``` PseudoVFMACC_VV_M2_E64 %1, %28, %28, 7 /* frm=dyn */, -1 /* vl=VLMAX */, 6 /* e64 */, 0 /* tu, mu */ ``` Hopefully this could make reading RISC-V MIR (a little) less painful.
22 lines
1.3 KiB
LLVM
22 lines
1.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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; RUN: llc < %s -mtriple=riscv64 -mattr=+v -stop-after=finalize-isel | FileCheck %s
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define <vscale x 1 x double> @foo(<vscale x 1 x double> %x, <vscale x 1 x double> %y, <vscale x 1 x double> %z, <vscale x 1 x i1> %m, i32 %vl) {
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; CHECK-LABEL: name: foo
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; CHECK: bb.0 (%ir-block.0):
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; CHECK-NEXT: liveins: $v8, $v9, $v0, $x10
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:vr = COPY $v0
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:vr = COPY $v9
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; CHECK-NEXT: [[COPY3:%[0-9]+]]:vr = COPY $v8
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; CHECK-NEXT: [[SLLI:%[0-9]+]]:gpr = SLLI [[COPY]], 32
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; CHECK-NEXT: [[SRLI:%[0-9]+]]:gprnox0 = SRLI killed [[SLLI]], 32
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; CHECK-NEXT: [[COPY4:%[0-9]+]]:vmv0 = COPY [[COPY1]]
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; CHECK-NEXT: [[PseudoVFMUL_VV_M1_E64_MASK:%[0-9]+]]:vrnov0 = nnan ninf nsz arcp contract afn reassoc nofpexcept PseudoVFMUL_VV_M1_E64_MASK $noreg, [[COPY3]], [[COPY2]], [[COPY4]], 7 /* frm=dyn */, killed [[SRLI]] /* vl */, 6 /* e64 */, 1 /* ta, mu */, implicit $frm
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; CHECK-NEXT: $v8 = COPY [[PseudoVFMUL_VV_M1_E64_MASK]]
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; CHECK-NEXT: PseudoRET implicit $v8
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%1 = call fast <vscale x 1 x double> @llvm.vp.fmul.nxv1f64(<vscale x 1 x double> %x, <vscale x 1 x double> %y, <vscale x 1 x i1> %m, i32 %vl)
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ret <vscale x 1 x double> %1
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}
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