35dfeb7b4d
The instruction selection pass for SPIR-V now performs dead code elimination (DCE). This change removes unused instructions, leading to more optimized SPIR-V output. As a consequence of this, several tests were updated to ensure their continued correctness and to prevent previously tested code from being optimized away. Specifically: - Many tests now store computed values into global variables to ensure they are not eliminated by DCE, allowing their code generation to be verified. - The test `keep-tracked-const.ll` was removed because it no longer tested its original intent. The check statements in this test were for constants generated when expanding a G_TRUNC instruction, which is now removed by DCE instead of being expanded. - A new test, `remove-dead-type-intrinsics.ll`, was added to confirm that dead struct types are correctly removed by the compiler. These updates improve the SPIR-V backends optimization capabilities and maintain the robustness of the test suite. --------- Co-authored-by: Nathan Gauër <github@keenuts.net>
39 lines
1.6 KiB
LLVM
39 lines
1.6 KiB
LLVM
; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
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; CHECK-DAG: %[[#INT8:]] = OpTypeInt 8 0
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; CHECK-DAG: %[[#VEC3:]] = OpTypeVector %[[#INT8]] 3
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; CHECK-DAG: %[[#VEC4:]] = OpTypeVector %[[#INT8]] 4
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; CHECK-DAG: %[[#PTR_VEC3:]] = OpTypePointer CrossWorkgroup %[[#VEC3]]
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; CHECK-DAG: %[[#PTR_VEC4:]] = OpTypePointer CrossWorkgroup %[[#VEC4]]
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@G_loadv1 = global <4 x i8> zeroinitializer
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@G_loadv2 = global <4 x i8> zeroinitializer
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; CHECK: %[[#AC1:]] = OpInBoundsPtrAccessChain %[[#PTR_VEC3]] %[[#]] %[[#]]
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; CHECK: %[[#BC1:]] = OpBitcast %[[#PTR_VEC4]] %[[#AC1]]
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; CHECK: %[[#LD1:]] = OpLoad %[[#VEC4]] %[[#BC1]] Aligned 4
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; CHECK: OpReturn
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define spir_kernel void @foo(ptr addrspace(1) %a, i64 %b) {
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%index = getelementptr inbounds <3 x i8>, ptr addrspace(1) %a, i64 %b
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%loadv = load <4 x i8>, ptr addrspace(1) %index, align 4
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store <4 x i8> %loadv, ptr @G_loadv1
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ret void
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}
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; CHECK: %[[#AC2:]] = OpInBoundsPtrAccessChain %[[#PTR_VEC3]] %[[#]] %[[#]]
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; CHECK: %[[#BC2:]] = OpBitcast %[[#PTR_VEC4]] %[[#AC2]]
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; CHECK: %[[#LD2:]] = OpLoad %[[#VEC4]] %[[#BC2]] Aligned 4
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; CHECK: OpReturn
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define spir_kernel void @bar(ptr addrspace(1) %a, i64 %b) {
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%index = getelementptr inbounds <3 x i8>, ptr addrspace(1) %a, i64 %b
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; This redundant bitcast is left here itentionally to simulate the conversion
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; from older LLVM IR with typed pointers.
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%cast = bitcast ptr addrspace(1) %index to ptr addrspace(1)
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%loadv = load <4 x i8>, ptr addrspace(1) %cast, align 4
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store <4 x i8> %loadv, ptr @G_loadv2
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ret void
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}
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