9f72fab490
The previous check for vector bitcasts in `loadVectorFromVector` only compared the number of elements, which is insufficient when the element types differ. This can lead to incorrect assumptions about the validity of the cast. This commit replaces the element count check with a comparison of the total size of the vectors in bits. This ensures that the bitcast is only performed between vectors of the same size, preventing potential miscompilations. Part of https://github.com/llvm/llvm-project/issues/153091
51 lines
3.4 KiB
LLVM
51 lines
3.4 KiB
LLVM
; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv-unknown-vulkan-compute %s -o - | FileCheck %s --match-full-lines
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-vulkan %s -o - -filetype=obj | spirv-val %}
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; CHECK-DAG: %[[#uint:]] = OpTypeInt 32 0
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; CHECK-DAG: %[[#v2_uint:]] = OpTypeVector %[[#uint]] 2
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; CHECK-DAG: %[[#double:]] = OpTypeFloat 64
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; CHECK-DAG: %[[#v2_double:]] = OpTypeVector %[[#double]] 2
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; CHECK-DAG: %[[#v4_uint:]] = OpTypeVector %[[#uint]] 4
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@.str = private unnamed_addr constant [3 x i8] c"In\00", align 1
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@.str.2 = private unnamed_addr constant [4 x i8] c"Out\00", align 1
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define void @main() local_unnamed_addr #0 {
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entry:
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%0 = tail call target("spirv.VulkanBuffer", [0 x <2 x i32>], 12, 0) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0v2i32_12_0t(i32 0, i32 0, i32 1, i32 0, ptr nonnull @.str)
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%1 = tail call target("spirv.VulkanBuffer", [0 x <2 x double>], 12, 1) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0v2f64_12_1t(i32 0, i32 2, i32 1, i32 0, ptr nonnull @.str.2)
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%2 = tail call noundef align 8 dereferenceable(8) ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0v2i32_12_0t(target("spirv.VulkanBuffer", [0 x <2 x i32>], 12, 0) %0, i32 0)
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%3 = load <2 x i32>, ptr addrspace(11) %2, align 8
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%4 = tail call noundef align 8 dereferenceable(8) ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0v2i32_12_0t(target("spirv.VulkanBuffer", [0 x <2 x i32>], 12, 0) %0, i32 1)
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%5 = load <2 x i32>, ptr addrspace(11) %4, align 8
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; CHECK: %[[#tmp:]] = OpVectorShuffle %[[#v4_uint]] {{%[0-9]+}} {{%[0-9]+}} 0 2 1 3
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%6 = shufflevector <2 x i32> %3, <2 x i32> %5, <4 x i32> <i32 0, i32 2, i32 1, i32 3>
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; CHECK: %[[#access:]] = OpAccessChain {{.*}}
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%7 = tail call noundef align 16 dereferenceable(16) ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0v2f64_12_1t(target("spirv.VulkanBuffer", [0 x <2 x double>], 12, 1) %1, i32 0)
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; CHECK: %[[#bitcast:]] = OpBitcast %[[#v2_double]] %[[#tmp]]
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; CHECK: OpStore %[[#access]] %[[#bitcast]] Aligned 16
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store <4 x i32> %6, ptr addrspace(11) %7, align 16
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ret void
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}
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; This tests a load from a pointer that has been bitcast between vector types
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; which share the same total bit-width but have different numbers of elements.
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; Tests that legalize-pointer-casts works correctly by moving the bitcast to
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; the element that was loaded.
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define void @main2() local_unnamed_addr #0 {
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entry:
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; CHECK: %[[LOAD:[0-9]+]] = OpLoad %[[#v2_double]] {{.*}}
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; CHECK: %[[BITCAST1:[0-9]+]] = OpBitcast %[[#v4_uint]] %[[LOAD]]
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; CHECK: %[[BITCAST2:[0-9]+]] = OpBitcast %[[#v2_double]] %[[BITCAST1]]
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; CHECK: OpStore {{%[0-9]+}} %[[BITCAST2]] {{.*}}
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%0 = tail call target("spirv.VulkanBuffer", [0 x <2 x double>], 12, 1) @llvm.spv.resource.handlefrombinding.tspirv.VulkanBuffer_a0v2f64_12_1t(i32 0, i32 2, i32 1, i32 0, ptr nonnull @.str.2)
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%2 = tail call noundef align 16 dereferenceable(16) ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0v2f64_12_1t(target("spirv.VulkanBuffer", [0 x <2 x double>], 12, 1) %0, i32 0)
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%3 = load <4 x i32>, ptr addrspace(11) %2
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%4 = tail call noundef align 16 dereferenceable(16) ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0v2f64_12_1t(target("spirv.VulkanBuffer", [0 x <2 x double>], 12, 1) %0, i32 1)
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store <4 x i32> %3, ptr addrspace(11) %4
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ret void
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}
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attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" }
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