f57abf519b
This patch consist of 2 parts: * A first part that removes the scalar to vector promotion for built-ins in the `SPIRVRegularizer`; * and a second part that implements the promotion for built-ins from scalar to vector in `generateExtInst`. The implementation in `SPIRVRegularizer` had several issues: * It rolled its own built-in pattern matching that was extremely permissive * the compiler would crash if the built-in had a definition * the compiler would crash if the built-in had no arguments * The compiler would crash if there were more than 2 function definitions in the module. * It'd be better if this was implemented as a module pass; where we iterate over the users of the function, instead of scanning the whole module for callers. This patch does the scalar to vector promotion just before the `OpExtInst` is generated. Without relying on the IR transformation. One change in the generated code from the previous implementation is that this version uses a single `OpCompositeConstruct` operation to convert the scalar into a vector. The old implementation inserted an element at the 0 position in an `undef` vector (using `OpCompositeInsert`); then copied that element for every vector element using `OpVectorShuffle`. This patch also adds a test (`OpExtInst_vector_promotion_bug.ll`) that highlights an issue in the builtin pattern matching that we're using: our pattern matching doesn't consider the number of arguments, only the demangled name, first and last arguments (`min(int,int,int)` matches the same builtin as `min(int, int)`).
180 lines
7.9 KiB
LLVM
180 lines
7.9 KiB
LLVM
; RUN: llc -O0 -mtriple=spirv32-unknown-unknown < %s | FileCheck %s
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv32-unknown-unknown < %s -filetype=obj | spirv-val %}
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;
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; Some OpenCL builtins have mixed vector-scalar variants, but OpExtInt only supports
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; versions where all the arguments have the same type.
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;
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; We generate code, but it is invalid.
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; We should generate vector versions for these cases.
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define spir_kernel void @S_MIN() {
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; CHECK-LABEL: OpFunction %{{[0-9]+}} None %{{[0-9]+}} ; -- Begin function S_MIN
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; CHECK-NEXT: OpLabel
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; CHECK-NEXT: %[[VEC:[0-9]+]] = OpCompositeConstruct %[[VECTYPE:[0-9]+]] %[[SCALAR:[0-9]+]] %[[SCALAR]]
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; CHECK-NEXT: %{{[0-9]+}} = OpExtInst %[[VECTYPE]] %{{[0-9]+}} s_min %{{[0-9]+}} %[[VEC]]
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; CHECK-NEXT: OpReturn
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; CHECK-NEXT: OpFunctionEnd
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; CHECK-NEXT: ; -- End function
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entry:
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%call = tail call spir_func <2 x i32> @_Z3minDv2_ii(<2 x i32> <i32 1, i32 10>, i32 5)
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ret void
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}
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define spir_kernel void @U_MIN() {
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; CHECK-LABEL: OpFunction %{{[0-9]+}} None %{{[0-9]+}} ; -- Begin function U_MIN
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; CHECK-NEXT: OpLabel
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; CHECK-NEXT: %[[VEC:[0-9]+]] = OpCompositeConstruct %[[VECTYPE:[0-9]+]] %[[SCALAR:[0-9]+]] %[[SCALAR]]
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; CHECK-NEXT: %{{[0-9]+}} = OpExtInst %[[VECTYPE]] %{{[0-9]+}} u_min %{{[0-9]+}} %[[VEC]]
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; CHECK-NEXT: OpReturn
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; CHECK-NEXT: OpFunctionEnd
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; CHECK-NEXT: ; -- End function
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entry:
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%call = tail call spir_func <2 x i32> @_Z3minDv2_jj(<2 x i32> <i32 1, i32 10>, i32 5)
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ret void
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}
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define spir_kernel void @S_MAX() {
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; CHECK-LABEL: OpFunction %{{[0-9]+}} None %{{[0-9]+}} ; -- Begin function S_MAX
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; CHECK-NEXT: OpLabel
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; CHECK-NEXT: %[[VEC:[0-9]+]] = OpCompositeConstruct %[[VECTYPE:[0-9]+]] %[[SCALAR:[0-9]+]] %[[SCALAR]]
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; CHECK-NEXT: %{{[0-9]+}} = OpExtInst %[[VECTYPE]] %{{[0-9]+}} s_max %{{[0-9]+}} %[[VEC]]
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; CHECK-NEXT: OpReturn
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; CHECK-NEXT: OpFunctionEnd
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; CHECK-NEXT: ; -- End function
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entry:
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%call = tail call spir_func <2 x i32> @_Z3maxDv2_ii(<2 x i32> <i32 1, i32 10>, i32 5)
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ret void
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}
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define spir_kernel void @F_MIN() {
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; CHECK-LABEL: OpFunction %{{[0-9]+}} None %{{[0-9]+}} ; -- Begin function F_MIN
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; CHECK-NEXT: OpLabel
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; CHECK-NEXT: %[[VEC:[0-9]+]] = OpCompositeConstruct %[[VECTYPE:[0-9]+]] %[[SCALAR:[0-9]+]] %[[SCALAR]]
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; CHECK-NEXT: %{{[0-9]+}} = OpExtInst %[[VECTYPE]] %{{[0-9]+}} fmin %{{[0-9]+}} %[[VEC]]
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; CHECK-NEXT: OpReturn
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; CHECK-NEXT: OpFunctionEnd
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; CHECK-NEXT: ; -- End function
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entry:
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%call = tail call spir_func <2 x float> @_Z3minDv2_ff(<2 x float> <float 1.0, float 10.0>, float 5.0)
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ret void
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}
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define spir_kernel void @F_MAX() {
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; CHECK-LABEL: OpFunction %{{[0-9]+}} None %{{[0-9]+}} ; -- Begin function F_MAX
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; CHECK-NEXT: OpLabel
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; CHECK-NEXT: %[[VEC:[0-9]+]] = OpCompositeConstruct %[[VECTYPE:[0-9]+]] %[[SCALAR:[0-9]+]] %[[SCALAR]]
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; CHECK-NEXT: %{{[0-9]+}} = OpExtInst %[[VECTYPE]] %{{[0-9]+}} fmax %{{[0-9]+}} %[[VEC]]
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; CHECK-NEXT: OpReturn
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; CHECK-NEXT: OpFunctionEnd
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; CHECK-NEXT: ; -- End function
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entry:
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%call = tail call spir_func <2 x float> @_Z3maxDv2_ff(<2 x float> <float 1.0, float 10.0>, float 5.0)
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ret void
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}
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define spir_kernel void @F_FMIN() {
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; CHECK-LABEL: OpFunction %{{[0-9]+}} None %{{[0-9]+}} ; -- Begin function F_FMIN
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; CHECK-NEXT: OpLabel
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; CHECK-NEXT: %[[VEC:[0-9]+]] = OpCompositeConstruct %[[VECTYPE:[0-9]+]] %[[SCALAR:[0-9]+]] %[[SCALAR]]
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; CHECK-NEXT: %{{[0-9]+}} = OpExtInst %[[VECTYPE]] %{{[0-9]+}} fmin %{{[0-9]+}} %[[VEC]]
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; CHECK-NEXT: OpReturn
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; CHECK-NEXT: OpFunctionEnd
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; CHECK-NEXT: ; -- End function
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entry:
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%call = tail call spir_func <2 x float> @_Z4fminDv2_ff(<2 x float> <float 1.0, float 10.0>, float 5.0)
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ret void
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}
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define spir_kernel void @F_FMAX() {
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; CHECK-LABEL: OpFunction %{{[0-9]+}} None %{{[0-9]+}} ; -- Begin function F_FMAX
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; CHECK-NEXT: OpLabel
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; CHECK-NEXT: %[[VEC:[0-9]+]] = OpCompositeConstruct %[[VECTYPE:[0-9]+]] %[[SCALAR:[0-9]+]] %[[SCALAR]]
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; CHECK-NEXT: %{{[0-9]+}} = OpExtInst %[[VECTYPE]] %{{[0-9]+}} fmax %{{[0-9]+}} %[[VEC]]
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; CHECK-NEXT: OpReturn
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; CHECK-NEXT: OpFunctionEnd
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; CHECK-NEXT: ; -- End function
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entry:
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%call = tail call spir_func <2 x float> @_Z4fmaxDv2_ff(<2 x float> <float 1.0, float 10.0>, float 5.0)
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ret void
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}
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define spir_kernel void @S_CLAMP() {
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; CHECK-LABEL: OpFunction %{{[0-9]+}} None %{{[0-9]+}} ; -- Begin function S_CLAMP
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; CHECK-NEXT: OpLabel
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; CHECK-NEXT: %[[VEC_0:[0-9]+]] = OpCompositeConstruct %[[VECTYPE:[0-9]+]] %[[SCALAR_0:[0-9]+]] %[[SCALAR_0]]
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; CHECK-NEXT: %[[VEC_1:[0-9]+]] = OpCompositeConstruct %[[VECTYPE:[0-9]+]] %[[SCALAR_1:[0-9]+]] %[[SCALAR_1]]
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; CHECK-NEXT: %{{[0-9]+}} = OpExtInst %[[VECTYPE]] %{{[0-9]+}} s_clamp %{{[0-9]+}} %[[VEC_0]] %[[VEC_1]]
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; CHECK-NEXT: OpReturn
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; CHECK-NEXT: OpFunctionEnd
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; CHECK-NEXT: ; -- End function
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entry:
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%call = tail call spir_func <2 x i32> @_Z5clampDv2_iii(<2 x i32> <i32 1, i32 10>, i32 5, i32 6)
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ret void
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}
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define spir_kernel void @F_CLAMP() {
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; CHECK-LABEL: OpFunction %{{[0-9]+}} None %{{[0-9]+}} ; -- Begin function F_CLAMP
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; CHECK-NEXT: OpLabel
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; CHECK-NEXT: %[[VEC_0:[0-9]+]] = OpCompositeConstruct %[[VECTYPE:[0-9]+]] %[[SCALAR_0:[0-9]+]] %[[SCALAR_0]]
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; CHECK-NEXT: %[[VEC_1:[0-9]+]] = OpCompositeConstruct %[[VECTYPE:[0-9]+]] %[[SCALAR_1:[0-9]+]] %[[SCALAR_1]]
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; CHECK-NEXT: %{{[0-9]+}} = OpExtInst %[[VECTYPE]] %{{[0-9]+}} fclamp %{{[0-9]+}} %[[VEC_0]] %[[VEC_1]]
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; CHECK-NEXT: OpReturn
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; CHECK-NEXT: OpFunctionEnd
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; CHECK-NEXT: ; -- End function
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entry:
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%call = tail call spir_func <2 x float> @_Z5clampDv2_fff(<2 x float> <float 1.0, float 10.0>, float 5.0, float 6.0)
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ret void
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}
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define spir_kernel void @MIX() {
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; CHECK-LABEL: OpFunction %{{[0-9]+}} None %{{[0-9]+}} ; -- Begin function MIX
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; CHECK-NEXT: OpLabel
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; CHECK-NEXT: %[[VEC:[0-9]+]] = OpCompositeConstruct %[[VECTYPE:[0-9]+]] %[[SCALAR:[0-9]+]] %[[SCALAR]]
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; CHECK-NEXT: %{{[0-9]+}} = OpExtInst %[[VECTYPE]] %{{[0-9]+}} mix %{{[0-9]+}} %{{[0-9]+}} %[[VEC]]
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; CHECK-NEXT: OpReturn
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; CHECK-NEXT: OpFunctionEnd
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; CHECK-NEXT: ; -- End function
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entry:
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%call = tail call spir_func <2 x float> @_Z3mixDv2_fS_f(<2 x float> <float 1.0, float 10.0>, <2 x float> <float 2.0, float 20.0>, float 0.5)
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ret void
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}
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define spir_kernel void @SMOOTHSTEP() {
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; CHECK-LABEL: OpFunction %{{[0-9]+}} None %{{[0-9]+}} ; -- Begin function SMOOTHSTEP
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; CHECK-NEXT: OpLabel
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; CHECK-NEXT: %[[VEC_0:[0-9]+]] = OpCompositeConstruct %[[VECTYPE:[0-9]+]] %[[SCALAR_0:[0-9]+]] %[[SCALAR_0]]
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; CHECK-NEXT: %[[VEC_1:[0-9]+]] = OpCompositeConstruct %[[VECTYPE:[0-9]+]] %[[SCALAR_1:[0-9]+]] %[[SCALAR_1]]
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; CHECK-NEXT: %{{[0-9]+}} = OpExtInst %[[VECTYPE]] %{{[0-9]+}} smoothstep %[[VEC_0]] %[[VEC_1]] %{{[0-9]+}}
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; CHECK-NEXT: OpReturn
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; CHECK-NEXT: OpFunctionEnd
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; CHECK-NEXT: ; -- End function
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entry:
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%call = tail call spir_func <2 x float> @_Z10smoothstepffDv2_f(float 1.0, float 0.5, <2 x float> <float 1.0, float 10.0>)
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ret void
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}
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define spir_kernel void @ill_0() {
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; CHECK-LABEL: OpFunction %{{[0-9]+}} None %{{[0-9]+}} ; -- Begin function ill_0
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; CHECK-NEXT: OpLabel
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; CHECK-NEXT: OpFunctionCall %{{[0-9]+}} %{{[0-9]+}}
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; CHECK-NEXT: OpReturn
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; CHECK-NEXT: OpFunctionEnd
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; CHECK-NEXT: ; -- End function
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entry:
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tail call spir_func void @_Z3minv()
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ret void
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}
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declare spir_func <2 x i32> @_Z3minDv2_ii(<2 x i32>, i32)
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declare spir_func <2 x i32> @_Z3minDv2_jj(<2 x i32>, i32)
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declare spir_func <2 x i32> @_Z3maxDv2_ii(<2 x i32>, i32)
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declare spir_func <2 x float> @_Z3minDv2_ff(<2 x float>, float)
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declare spir_func <2 x float> @_Z3maxDv2_ff(<2 x float>, float)
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declare spir_func <2 x float> @_Z4fminDv2_ff(<2 x float>, float)
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declare spir_func <2 x float> @_Z4fmaxDv2_ff(<2 x float>, float)
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declare spir_func <2 x i32> @_Z5clampDv2_iii(<2 x i32>, i32)
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declare spir_func <2 x float> @_Z5clampDv2_fff(<2 x float>, float)
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declare spir_func <2 x float> @_Z3mixDv2_fS_f(<2 x float>, <2 x float>, float)
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declare spir_func <2 x float> @_Z10smoothstepffDv2_f(float, float, <2 x float>)
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declare spir_func void @_Z3minv()
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