4d629f9744
In review of bbde6b, I had originally proposed that we support the legacy text format. As review evolved, it bacame clear this had been a bad idea (too much complexity), but in order to let that patch finally move forward, I approved the change with the variant. This change undoes the variant, and updates all the tests to just use the array form.
193 lines
6.7 KiB
YAML
193 lines
6.7 KiB
YAML
# RUN: llc -mtriple=thumbv8.1m.main %s -run-pass=arm-low-overhead-loops --verify-machineinstrs -o -
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# CHECK: bb.1.for.body.preheader:
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# CHECK: $lr = t2DLS
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# CHECK-NOT: t2LoopDec
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# CHECK: bb.6.for.inc:
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# CHECK: $lr = t2LEUpdate renamable $lr, %bb.2
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--- |
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; ModuleID = 'switch.ll'
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source_filename = "switch.ll"
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target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
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target triple = "thumbv8.1m.main"
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define dso_local arm_aapcscc i32 @search(ptr nocapture readonly %c, i32 %N) {
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entry:
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%cmp11 = icmp eq i32 %N, 0
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br i1 %cmp11, label %for.cond.cleanup, label %for.body.preheader
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for.body.preheader: ; preds = %entry
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%start = call i32 @llvm.start.loop.iterations.i32(i32 %N)
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br label %for.body
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for.cond.cleanup: ; preds = %for.inc, %entry
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%found.0.lcssa = phi i32 [ 0, %entry ], [ %found.1, %for.inc ]
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%spaces.0.lcssa = phi i32 [ 0, %entry ], [ %spaces.1, %for.inc ]
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%sub = sub nsw i32 %found.0.lcssa, %spaces.0.lcssa
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ret i32 %sub
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for.body: ; preds = %for.inc, %for.body.preheader
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%lsr.iv1 = phi ptr [ %c, %for.body.preheader ], [ %scevgep, %for.inc ]
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%spaces.013 = phi i32 [ %spaces.1, %for.inc ], [ 0, %for.body.preheader ]
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%found.012 = phi i32 [ %found.1, %for.inc ], [ 0, %for.body.preheader ]
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%0 = phi i32 [ %start, %for.body.preheader ], [ %3, %for.inc ]
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%1 = load i8, ptr %lsr.iv1, align 1
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%2 = zext i8 %1 to i32
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switch i32 %2, label %for.inc [
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i32 108, label %sw.bb
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i32 111, label %sw.bb
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i32 112, label %sw.bb
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i32 32, label %sw.bb1
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]
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sw.bb: ; preds = %for.body, %for.body, %for.body
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%inc = add nsw i32 %found.012, 1
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br label %for.inc
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sw.bb1: ; preds = %for.body
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%inc2 = add nsw i32 %spaces.013, 1
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br label %for.inc
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for.inc: ; preds = %sw.bb1, %sw.bb, %for.body
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%found.1 = phi i32 [ %found.012, %for.body ], [ %found.012, %sw.bb1 ], [ %inc, %sw.bb ]
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%spaces.1 = phi i32 [ %spaces.013, %for.body ], [ %inc2, %sw.bb1 ], [ %spaces.013, %sw.bb ]
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%scevgep = getelementptr i8, ptr %lsr.iv1, i32 1
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%3 = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %0, i32 1)
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%4 = icmp ne i32 %3, 0
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br i1 %4, label %for.body, label %for.cond.cleanup
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}
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; Function Attrs: noduplicate nounwind
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declare i32 @llvm.start.loop.iterations.i32(i32) #0
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; Function Attrs: noduplicate nounwind
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declare i32 @llvm.loop.decrement.reg.i32.i32.i32(i32, i32) #0
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; Function Attrs: nounwind
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declare void @llvm.stackprotector(ptr, ptr) #1
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attributes #0 = { noduplicate nounwind }
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attributes #1 = { nounwind }
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...
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---
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name: search
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alignment: 2
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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failedISel: false
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tracksRegLiveness: true
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hasWinCFI: false
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registers: []
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liveins:
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- { reg: '$r0', virtual-reg: '' }
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- { reg: '$r1', virtual-reg: '' }
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 8
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offsetAdjustment: 0
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maxAlignment: 4
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adjustsStack: false
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hasCalls: false
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stackProtector: ''
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maxCallFrameSize: 0
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cvBytesOfCalleeSavedRegisters: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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localFrameSize: 0
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savePoint: []
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restorePoint: []
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fixedStack: []
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stack:
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- { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
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stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
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stack-id: default, callee-saved-register: '$r4', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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callSites: []
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constants: []
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machineFunctionInfo: {}
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body: |
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bb.0.entry:
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successors: %bb.7(0x30000000), %bb.1(0x50000000)
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liveins: $r0, $r1, $r4, $lr
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frame-setup tPUSH 14, $noreg, killed $r4, killed $lr, implicit-def $sp, implicit $sp
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frame-setup CFI_INSTRUCTION def_cfa_offset 8
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frame-setup CFI_INSTRUCTION offset $lr, -4
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frame-setup CFI_INSTRUCTION offset $r4, -8
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tCBZ $r1, %bb.7
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bb.1.for.body.preheader:
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successors: %bb.4(0x80000000)
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liveins: $r0, $r1
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$lr = tMOVr $r1, 14, $noreg
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$lr = t2DoLoopStart killed $r1
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renamable $r1, dead $cpsr = tMOVi8 0, 14, $noreg
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renamable $r12 = t2MOVi 1, 14, $noreg, $noreg
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renamable $r2, dead $cpsr = tMOVi8 0, 14, $noreg
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tB %bb.4, 14, $noreg
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bb.2.for.body:
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successors: %bb.3(0x80000000)
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liveins: $lr, $r0, $r1, $r2, $r3, $r12
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tCMPi8 killed renamable $r3, 32, 14, $noreg, implicit-def $cpsr
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t2IT 0, 8, implicit-def $itstate
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renamable $r1 = nsw tADDi8 $noreg, killed renamable $r1, 1, 0, killed $cpsr, implicit $r1, implicit killed $itstate
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bb.3.for.inc:
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successors: %bb.4(0x7c000000), %bb.8(0x04000000)
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liveins: $lr, $r0, $r1, $r2, $r12
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renamable $r0, dead $cpsr = tADDi8 killed renamable $r0, 1, 14, $noreg
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renamable $lr = t2LoopDec killed renamable $lr, 1
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t2LoopEnd renamable $lr, %bb.4, implicit-def dead $cpsr
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tB %bb.8, 14, $noreg
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bb.4.for.body:
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successors: %bb.2(0x26666665), %bb.5(0x5999999b)
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liveins: $lr, $r0, $r1, $r2, $r12
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renamable $r3 = tLDRBi renamable $r0, 0, 14, $noreg :: (load (s8) from %ir.lsr.iv1)
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renamable $r4 = t2SUBri renamable $r3, 108, 14, $noreg, $noreg
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tCMPi8 renamable $r4, 4, 14, $noreg, implicit-def $cpsr
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tBcc %bb.2, 8, killed $cpsr
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bb.5.for.body:
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successors: %bb.6(0x6db6db6e), %bb.2(0x12492492)
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liveins: $lr, $r0, $r1, $r2, $r3, $r4, $r12
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renamable $r4 = t2LSLrr renamable $r12, killed renamable $r4, 14, $noreg, $noreg
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t2TSTri killed renamable $r4, 25, 14, $noreg, implicit-def $cpsr
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tBcc %bb.2, 0, killed $cpsr
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bb.6.sw.bb:
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successors: %bb.3(0x80000000)
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liveins: $lr, $r0, $r1, $r2, $r12
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renamable $r2, dead $cpsr = nsw tADDi8 killed renamable $r2, 1, 14, $noreg
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tB %bb.3, 14, $noreg
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bb.7:
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successors: %bb.8(0x80000000)
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renamable $r2, dead $cpsr = tMOVi8 0, 14, $noreg
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renamable $r1, dead $cpsr = tMOVi8 0, 14, $noreg
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bb.8.for.cond.cleanup:
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liveins: $r1, $r2
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renamable $r0, dead $cpsr = nsw tSUBrr killed renamable $r2, killed renamable $r1, 14, $noreg
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tPOP_RET 14, $noreg, def $r4, def $pc, implicit killed $r0
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...
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