de6b8cdc41
Add support for CSE of writeonly calls, similar to the existing support for readonly calls.
164 lines
4.9 KiB
LLVM
164 lines
4.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -passes=early-cse -earlycse-debug-hash < %s | FileCheck %s --check-prefixes=CHECK,NO-MSSA
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; RUN: opt -S -passes='early-cse<memssa>' < %s | FileCheck %s --check-prefixes=CHECK,MSSA
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@var = global i32 undef
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declare void @foo() nounwind
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define void @test() {
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; CHECK-LABEL: @test(
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; CHECK-NEXT: call void @foo() #[[ATTR1:[0-9]+]]
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; CHECK-NEXT: store i32 2, ptr @var, align 4
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; CHECK-NEXT: ret void
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;
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store i32 1, ptr @var
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call void @foo() writeonly
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store i32 2, ptr @var
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ret void
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}
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declare void @writeonly_void() memory(write)
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; Can CSE writeonly calls, including non-nounwind/willreturn.
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define void @writeonly_cse() {
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; CHECK-LABEL: @writeonly_cse(
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; CHECK-NEXT: call void @writeonly_void()
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; CHECK-NEXT: ret void
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;
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call void @writeonly_void()
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call void @writeonly_void()
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ret void
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}
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; Can CSE, loads do not matter.
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define i32 @writeonly_cse_intervening_load(ptr %p) {
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; CHECK-LABEL: @writeonly_cse_intervening_load(
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; CHECK-NEXT: call void @writeonly_void()
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; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[P:%.*]], align 4
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; CHECK-NEXT: ret i32 [[V]]
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;
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call void @writeonly_void()
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%v = load i32, ptr %p
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call void @writeonly_void()
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ret i32 %v
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}
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; Cannot CSE, the store may be to the same memory.
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define void @writeonly_cse_intervening_store(ptr %p) {
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; CHECK-LABEL: @writeonly_cse_intervening_store(
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; CHECK-NEXT: call void @writeonly_void()
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; CHECK-NEXT: store i32 0, ptr [[P:%.*]], align 4
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; CHECK-NEXT: call void @writeonly_void()
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; CHECK-NEXT: ret void
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;
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call void @writeonly_void()
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store i32 0, ptr %p
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call void @writeonly_void()
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ret void
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}
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; Can CSE, the store does not alias the writeonly call.
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define void @writeonly_cse_intervening_noalias_store(ptr noalias %p) {
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; NO-MSSA-LABEL: @writeonly_cse_intervening_noalias_store(
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; NO-MSSA-NEXT: call void @writeonly_void()
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; NO-MSSA-NEXT: store i32 0, ptr [[P:%.*]], align 4
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; NO-MSSA-NEXT: call void @writeonly_void()
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; NO-MSSA-NEXT: ret void
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;
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; MSSA-LABEL: @writeonly_cse_intervening_noalias_store(
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; MSSA-NEXT: call void @writeonly_void()
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; MSSA-NEXT: store i32 0, ptr [[P:%.*]], align 4
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; MSSA-NEXT: ret void
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;
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call void @writeonly_void()
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store i32 0, ptr %p
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call void @writeonly_void()
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ret void
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}
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; Cannot CSE loads across writeonly call.
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define i32 @load_cse_across_writeonly(ptr %p) {
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; CHECK-LABEL: @load_cse_across_writeonly(
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; CHECK-NEXT: [[V1:%.*]] = load i32, ptr [[P:%.*]], align 4
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; CHECK-NEXT: call void @writeonly_void()
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; CHECK-NEXT: [[V2:%.*]] = load i32, ptr [[P]], align 4
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; CHECK-NEXT: [[RES:%.*]] = sub i32 [[V1]], [[V2]]
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; CHECK-NEXT: ret i32 [[RES]]
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;
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%v1 = load i32, ptr %p
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call void @writeonly_void()
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%v2 = load i32, ptr %p
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%res = sub i32 %v1, %v2
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ret i32 %res
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}
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; Can CSE loads across eliminated writeonly call.
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define i32 @load_cse_across_csed_writeonly(ptr %p) {
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; CHECK-LABEL: @load_cse_across_csed_writeonly(
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; CHECK-NEXT: call void @writeonly_void()
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; CHECK-NEXT: [[V2:%.*]] = load i32, ptr [[P:%.*]], align 4
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; CHECK-NEXT: ret i32 0
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;
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call void @writeonly_void()
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%v1 = load i32, ptr %p
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call void @writeonly_void()
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%v2 = load i32, ptr %p
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%res = sub i32 %v1, %v2
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ret i32 %res
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}
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declare i32 @writeonly(ptr %p) memory(write)
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; Can CSE writeonly calls with arg and return.
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define i32 @writeonly_ret_cse(ptr %p) {
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; CHECK-LABEL: @writeonly_ret_cse(
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; CHECK-NEXT: [[V2:%.*]] = call i32 @writeonly(ptr [[P:%.*]])
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; CHECK-NEXT: ret i32 0
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;
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%v1 = call i32 @writeonly(ptr %p)
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%v2 = call i32 @writeonly(ptr %p)
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%res = sub i32 %v1, %v2
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ret i32 %res
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}
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; Cannot CSE writeonly calls with different arguments.
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define i32 @writeonly_different_args(ptr %p1, ptr %p2) {
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; CHECK-LABEL: @writeonly_different_args(
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; CHECK-NEXT: [[V1:%.*]] = call i32 @writeonly(ptr [[P1:%.*]])
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; CHECK-NEXT: [[V2:%.*]] = call i32 @writeonly(ptr [[P2:%.*]])
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; CHECK-NEXT: [[RES:%.*]] = sub i32 [[V1]], [[V2]]
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; CHECK-NEXT: ret i32 [[RES]]
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;
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%v1 = call i32 @writeonly(ptr %p1)
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%v2 = call i32 @writeonly(ptr %p2)
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%res = sub i32 %v1, %v2
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ret i32 %res
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}
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declare void @callee()
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; These are weird cases where the same call is both readonly and writeonly
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; based on call-site attributes. I believe this implies that both calls are
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; actually readnone and safe to CSE, but leave them alone to be conservative.
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define void @readonly_and_writeonly() {
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; CHECK-LABEL: @readonly_and_writeonly(
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; CHECK-NEXT: call void @callee() #[[ATTR2:[0-9]+]]
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; CHECK-NEXT: call void @callee() #[[ATTR1]]
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; CHECK-NEXT: ret void
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;
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call void @callee() memory(read)
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call void @callee() memory(write)
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ret void
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}
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define void @writeonly_and_readonly() {
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; CHECK-LABEL: @writeonly_and_readonly(
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; CHECK-NEXT: call void @callee() #[[ATTR1]]
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; CHECK-NEXT: call void @callee() #[[ATTR2]]
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; CHECK-NEXT: ret void
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;
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call void @callee() memory(write)
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call void @callee() memory(read)
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ret void
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}
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