f76921ac0d
Tests have been regenerated to favour UTC-emitted lines. While this may not be strictly necessary – as the final migration to MemorySSA should boil down to a simple flip –, adopting UTC-based lines should overall make tests more robust as well as easier to diff (at least on the majority of the tests instances where the new lines have been added). Crash tests now feature check lines as well (notably, pr17852.ll, pr24397.ll and unreachable_block_infinite_loop.ll). Pre-2010 tests leveraging llvm-dis have not been updated.
70 lines
2.2 KiB
LLVM
70 lines
2.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
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; RUN: opt -S < %s -passes=gvn | FileCheck %s
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declare void @llvm.sideeffect()
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; Store-to-load forwarding across a @llvm.sideeffect.
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define float @s2l(ptr %p) {
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; CHECK-LABEL: define float @s2l(
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; CHECK-SAME: ptr [[P:%.*]]) {
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; CHECK-NEXT: store float 0.000000e+00, ptr [[P]], align 4
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; CHECK-NEXT: call void @llvm.sideeffect()
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; CHECK-NEXT: ret float 0.000000e+00
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;
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store float 0.0, ptr %p
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call void @llvm.sideeffect()
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%t = load float, ptr %p
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ret float %t
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}
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; Redundant load elimination across a @llvm.sideeffect.
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define float @rle(ptr %p) {
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; CHECK-LABEL: define float @rle(
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; CHECK-SAME: ptr [[P:%.*]]) {
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; CHECK-NEXT: [[R:%.*]] = load float, ptr [[P]], align 4
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; CHECK-NEXT: call void @llvm.sideeffect()
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; CHECK-NEXT: [[T:%.*]] = fadd float [[R]], [[R]]
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; CHECK-NEXT: ret float [[T]]
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;
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%r = load float, ptr %p
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call void @llvm.sideeffect()
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%s = load float, ptr %p
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%t = fadd float %r, %s
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ret float %t
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}
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; LICM across a @llvm.sideeffect.
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define float @licm(i64 %n, ptr nocapture readonly %p) #0 {
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; CHECK-LABEL: define float @licm(
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; CHECK-SAME: i64 [[N:%.*]], ptr readonly captures(none) [[P:%.*]]) {
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; CHECK-NEXT: [[BB0:.*]]:
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; CHECK-NEXT: [[T3_PRE:%.*]] = load float, ptr [[P]], align 4
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; CHECK-NEXT: br label %[[LOOP:.*]]
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; CHECK: [[LOOP]]:
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; CHECK-NEXT: [[I:%.*]] = phi i64 [ 0, %[[BB0]] ], [ [[T5:%.*]], %[[LOOP]] ]
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; CHECK-NEXT: [[SUM:%.*]] = phi float [ 0.000000e+00, %[[BB0]] ], [ [[T4:%.*]], %[[LOOP]] ]
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; CHECK-NEXT: call void @llvm.sideeffect()
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; CHECK-NEXT: [[T4]] = fadd float [[SUM]], [[T3_PRE]]
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; CHECK-NEXT: [[T5]] = add i64 [[I]], 1
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; CHECK-NEXT: [[T6:%.*]] = icmp ult i64 [[T5]], [[N]]
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; CHECK-NEXT: br i1 [[T6]], label %[[LOOP]], label %[[BB2:.*]]
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; CHECK: [[BB2]]:
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; CHECK-NEXT: ret float [[T4]]
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;
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bb0:
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br label %loop
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loop:
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%i = phi i64 [ 0, %bb0 ], [ %t5, %loop ]
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%sum = phi float [ 0.000000e+00, %bb0 ], [ %t4, %loop ]
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call void @llvm.sideeffect()
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%t3 = load float, ptr %p
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%t4 = fadd float %sum, %t3
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%t5 = add i64 %i, 1
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%t6 = icmp ult i64 %t5, %n
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br i1 %t6, label %loop, label %bb2
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bb2:
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ret float %t4
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}
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