llvm-project/llvm/test/Transforms/GVN/simplify-icf-cache-invalidation.ll
Antonio Frighetto f76921ac0d
[GVN] Regenerate test checks to use UTC (NFC)
Tests have been regenerated to favour UTC-emitted lines. While
this may not be strictly necessary – as the final migration to
MemorySSA should boil down to a simple flip –, adopting UTC-based
lines should overall make tests more robust as well as easier to
diff (at least on the majority of the tests instances where the new
lines have been added). Crash tests now feature check lines as well
(notably, pr17852.ll, pr24397.ll and unreachable_block_infinite_loop.ll).
Pre-2010 tests leveraging llvm-dis have not been updated.
2025-10-07 14:10:00 +02:00

72 lines
2.7 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -passes=gvn -S < %s | FileCheck %s
%struct.zot = type { ptr }
%struct.wombat = type { ptr }
%struct.baz = type { i8, ptr }
@global = hidden unnamed_addr constant ptr @quux
declare ptr @f()
define hidden void @eggs(ptr %arg, i1 %arg2, ptr %arg3, i32 %arg4, ptr %arg5) unnamed_addr align 2 {
; CHECK-LABEL: define hidden void @eggs(
; CHECK-SAME: ptr [[ARG:%.*]], i1 [[ARG2:%.*]], ptr [[ARG3:%.*]], i32 [[ARG4:%.*]], ptr [[ARG5:%.*]]) unnamed_addr align 2 {
; CHECK-NEXT: [[BB:.*:]]
; CHECK-NEXT: [[TMP:%.*]] = alloca [[STRUCT_WOMBAT:%.*]], align 8
; CHECK-NEXT: store ptr @global, ptr [[ARG]], align 8, !invariant.group [[META0:![0-9]+]]
; CHECK-NEXT: br i1 [[ARG2]], label %[[BB4:.*]], label %[[BB2:.*]]
; CHECK: [[BB2]]:
; CHECK-NEXT: [[TMP3:%.*]] = atomicrmw sub ptr [[ARG3]], i32 [[ARG4]] acq_rel, align 4
; CHECK-NEXT: br label %[[BB4]]
; CHECK: [[BB4]]:
; CHECK-NEXT: [[TMP5:%.*]] = load ptr, ptr [[ARG5]], align 8
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_BAZ:%.*]], ptr [[TMP5]], i64 0, i32 1
; CHECK-NEXT: br i1 [[ARG2]], label %[[BB9:.*]], label %[[BB7:.*]]
; CHECK: [[BB7]]:
; CHECK-NEXT: [[TMP8:%.*]] = tail call ptr @f()
; CHECK-NEXT: br label %[[BB9]]
; CHECK: [[BB9]]:
; CHECK-NEXT: tail call void @quux(ptr [[ARG]], i1 [[ARG2]])
; CHECK-NEXT: [[TMP17:%.*]] = load ptr, ptr [[TMP]], align 8
; CHECK-NEXT: [[TMP18:%.*]] = icmp eq ptr [[TMP17]], null
; CHECK-NEXT: ret void
;
bb:
%tmp = alloca %struct.wombat, align 8
store ptr @global, ptr %arg, align 8, !invariant.group !0
br i1 %arg2, label %bb4, label %bb2
bb2: ; preds = %bb
%tmp3 = atomicrmw sub ptr %arg3, i32 %arg4 acq_rel, align 4
br label %bb4
bb4: ; preds = %bb2, %bb
%tmp5 = load ptr, ptr %arg5, align 8
%tmp6 = getelementptr inbounds %struct.baz, ptr %tmp5, i64 0, i32 1
br i1 %arg2, label %bb9, label %bb7
bb7: ; preds = %bb4
%tmp8 = tail call ptr @f()
br label %bb9
bb9: ; preds = %bb7, %bb4
%tmp10 = load ptr, ptr %arg5, align 8
%tmp13 = load ptr, ptr %arg, align 8, !invariant.group !0
%tmp15 = load ptr, ptr %tmp13, align 8
tail call void %tmp15(ptr %arg, i1 %arg2)
%tmp17 = load ptr, ptr %tmp, align 8
%tmp18 = icmp eq ptr %tmp17, null
ret void
}
; Function Attrs: nounwind willreturn
declare hidden void @quux(ptr, i1) unnamed_addr #0 align 2
attributes #0 = { nounwind willreturn }
!0 = !{}
;.
; CHECK: [[META0]] = !{}
;.