d17d32a6cb
Simplifcation of vector.reduce intrinsics are prevented by an early bailout for ConstantInt base operands. This PR removes the bailout and updates the tests to show matching output when -use-constant-int-for-*-splat is used.
52 lines
1.5 KiB
LLVM
52 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
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; RUN: opt < %s -passes=instsimplify -S | FileCheck %s
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; RUN: opt < %s -passes=instsimplify -use-constant-int-for-fixed-length-splat -use-constant-int-for-scalable-splat -S | FileCheck %s
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define i16 @W() {
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; CHECK-LABEL: define i16 @W() {
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; CHECK-NEXT: ret i16 -32768
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;
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%Z = call i16 @llvm.bitreverse.i16(i16 1)
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ret i16 %Z
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}
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define i32 @X() {
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; CHECK-LABEL: define i32 @X() {
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; CHECK-NEXT: ret i32 -2147483648
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;
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%Z = call i32 @llvm.bitreverse.i32(i32 1)
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ret i32 %Z
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}
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define i64 @Y() {
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; CHECK-LABEL: define i64 @Y() {
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; CHECK-NEXT: ret i64 -9223372036854775808
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;
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%Z = call i64 @llvm.bitreverse.i64(i64 1)
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ret i64 %Z
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}
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define i80 @Z() {
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; CHECK-LABEL: define i80 @Z() {
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; CHECK-NEXT: ret i80 23777929115895377691656
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;
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%Z = call i80 @llvm.bitreverse.i80(i80 76151636403560493650080)
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ret i80 %Z
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}
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define <4 x i32> @bitreverse_splat_v4i32() {
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; CHECK-LABEL: define <4 x i32> @bitreverse_splat_v4i32() {
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; CHECK-NEXT: ret <4 x i32> splat (i32 -2147483648)
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;
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%Z = call <4 x i32> @llvm.bitreverse.v4i32(<4 x i32> splat(i32 1))
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ret <4 x i32> %Z
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}
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define <vscale x 4 x i32> @bitreverse_splat_nxv4i32() {
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; CHECK-LABEL: define <vscale x 4 x i32> @bitreverse_splat_nxv4i32() {
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; CHECK-NEXT: ret <vscale x 4 x i32> splat (i32 -2147483648)
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;
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%Z = call <vscale x 4 x i32> @llvm.bitreverse.v4i32(<vscale x 4 x i32> splat(i32 1))
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ret <vscale x 4 x i32> %Z
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}
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