1054a6e9de
Follow-up to https://github.com/llvm/llvm-project/pull/169576 to enable UDiv canonicalization if the start of the AddRec is not constant. The fold is not restricted to constant start values, as long as we are able to compute a constant remainder. The fold is only applied if the subtraction of the remainder can be folded into to start expression, but that is just to avoid creating more complex AddRecs. For reference, the proof from #169576 is https://alive2.llvm.org/ce/z/iu2tav PR: https://github.com/llvm/llvm-project/pull/170474
85 lines
2.8 KiB
LLVM
85 lines
2.8 KiB
LLVM
; RUN: opt -mtriple=x86_64-apple-darwin -mattr=+sse2 -passes=loop-vectorize -debug-only=loop-vectorize -S < %s 2>&1 | FileCheck %s
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; REQUIRES: asserts
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; CHECK: 'foo'
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; CHECK: LV: Found an estimated cost of 1 for VF 1 For instruction: %shift = ashr i32 %val, %k
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; CHECK: Cost of 2 for VF 2: WIDEN ir<%shift> = ashr ir<%val>, ir<%k>
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; CHECK: Cost of 2 for VF 4: WIDEN ir<%shift> = ashr ir<%val>, ir<%k>
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define void @foo(ptr nocapture %p, i32 %k) local_unnamed_addr {
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entry:
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br label %body
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body:
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%i = phi i64 [ 0, %entry ], [ %next, %body ]
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%ptr = getelementptr inbounds i32, ptr %p, i64 %i
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%val = load i32, ptr %ptr, align 4
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%shift = ashr i32 %val, %k
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store i32 %shift, ptr %ptr, align 4
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%next = add nuw nsw i64 %i, 1
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%cmp = icmp eq i64 %next, 16
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br i1 %cmp, label %exit, label %body
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exit:
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ret void
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}
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; CHECK: 'shift_and_masked_load_store'
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; CHECK: Cost of 1 for VF 2: CLONE ir<%shifted> = lshr vp<{{.+}}>, ir<2>
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; CHECK: Cost of 1 for VF 4: CLONE ir<%shifted> = lshr vp<{{.+}}>, ir<2>
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; CHECK: Cost of 4 for VF 8: WIDEN ir<%shifted> = lshr ir<%iv>, ir<2>
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define void @shift_and_masked_load_store(i64 %trip.count) #0 {
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
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%shifted = lshr i64 %iv, 2
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%masked.idx = and i64 %shifted, 1
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%load.ptr = getelementptr i16, ptr poison, i64 %masked.idx
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%val = load i16, ptr %load.ptr, align 2
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%store.idx = shl nuw i64 %iv, 2
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%store.ptr = getelementptr i8, ptr poison, i64 %store.idx
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store i16 %val, ptr %store.ptr, align 2
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%iv.next = add i64 %iv, 1
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%cmp = icmp eq i64 %iv, %trip.count
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br i1 %cmp, label %exit, label %loop
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exit:
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ret void
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}
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define i64 @sdiv_arg_outer_iv(ptr noalias %dst, ptr %src) {
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; CHECK: 'sdiv_arg_outer_iv'
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; CHECK: Cost of 0 for VF 2: CLONE ir<%div> = sdiv ir<%add.offset>, ir<8>
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; CHECK: Cost of 0 for VF 4: CLONE ir<%div> = sdiv ir<%add.offset>, ir<8>
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; CHECK: Cost of 0 for VF 8: CLONE ir<%div> = sdiv ir<%add.offset>, ir<8>
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; CHECK: Cost of 0 for VF 16: REPLICATE ir<%div> = sdiv ir<%add.offset>, ir<8>
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entry:
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br label %outer.header
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outer.header:
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%outer.iv = phi i32 [ 0, %entry ], [ %outer.iv.next, %outer.latch ]
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%offset = shl nsw i32 %outer.iv, 7
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br label %loop
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loop:
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%iv = phi i64 [ 0, %outer.header ], [ %iv.next, %loop ]
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%iv.trunc = trunc i64 %iv to i32
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%add.offset = add i32 %offset, %iv.trunc
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%div = sdiv i32 %add.offset, 8
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%div.ext = sext i32 %div to i64
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%gep.src = getelementptr i8, ptr %src, i64 %div.ext
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%l = load i8, ptr %gep.src, align 1
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%gep.dst = getelementptr i8, ptr %dst, i64 %iv
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store i8 %l, ptr %gep.dst, align 1
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%iv.next = add i64 %iv, 1
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%ec = icmp eq i64 %iv, 64
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br i1 %ec, label %outer.latch, label %loop
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outer.latch:
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%outer.iv.next = add nsw i32 %outer.iv, 1
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br label %outer.header
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}
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attributes #0 = { "target-features"="+avx2" "tune-cpu"="alderlake" }
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