d64d3735ab
If multiple nodes are generated from same PHI node for the same block, still need to vectorize vector nodes, even if the value for the incoming block was already emitted. Fixes #177124
87 lines
4.0 KiB
LLVM
87 lines
4.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
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; RUN: opt -passes=slp-vectorizer -S -slp-threshold=-99999 -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
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define void @test() {
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; CHECK-LABEL: define void @test() {
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; CHECK-NEXT: [[BB:.*]]:
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; CHECK-NEXT: switch i32 0, label %[[BB1:.*]] [
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; CHECK-NEXT: i32 -4, label %[[BB4:.*]]
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; CHECK-NEXT: i32 -1, label %[[BB4]]
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; CHECK-NEXT: i32 1, label %[[BB4]]
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; CHECK-NEXT: i32 2, label %[[BB4]]
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; CHECK-NEXT: i32 5, label %[[BB4]]
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; CHECK-NEXT: i32 7, label %[[BB4]]
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; CHECK-NEXT: i32 8, label %[[BB4]]
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; CHECK-NEXT: i32 11, label %[[BB4]]
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; CHECK-NEXT: i32 13, label %[[BB4]]
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; CHECK-NEXT: i32 21, label %[[BB4]]
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; CHECK-NEXT: i32 17, label %[[BB4]]
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; CHECK-NEXT: i32 19, label %[[BB4]]
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; CHECK-NEXT: ]
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; CHECK: [[BB1]]:
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; CHECK-NEXT: [[TMP0:%.*]] = ashr <2 x i32> zeroinitializer, <i32 1, i32 0>
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; CHECK-NEXT: [[TMP1:%.*]] = or <2 x i32> zeroinitializer, <i32 1, i32 0>
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; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <2 x i32> [[TMP0]], <2 x i32> [[TMP1]], <2 x i32> <i32 0, i32 3>
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; CHECK-NEXT: switch i32 0, label %[[BB4]] [
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; CHECK-NEXT: i32 -4, label %[[BB4]]
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; CHECK-NEXT: i32 -1, label %[[BB4]]
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; CHECK-NEXT: i32 1, label %[[BB4]]
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; CHECK-NEXT: i32 2, label %[[BB4]]
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; CHECK-NEXT: i32 5, label %[[BB4]]
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; CHECK-NEXT: i32 7, label %[[BB4]]
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; CHECK-NEXT: i32 8, label %[[BB4]]
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; CHECK-NEXT: i32 11, label %[[BB4]]
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; CHECK-NEXT: i32 13, label %[[BB4]]
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; CHECK-NEXT: i32 21, label %[[BB4]]
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; CHECK-NEXT: i32 17, label %[[BB4]]
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; CHECK-NEXT: i32 19, label %[[BB4]]
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; CHECK-NEXT: ]
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; CHECK: [[BB4]]:
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; CHECK-NEXT: [[TMP3:%.*]] = phi <2 x i32> [ [[TMP2]], %[[BB1]] ], [ [[TMP2]], %[[BB1]] ], [ [[TMP2]], %[[BB1]] ], [ [[TMP2]], %[[BB1]] ], [ [[TMP2]], %[[BB1]] ], [ [[TMP2]], %[[BB1]] ], [ [[TMP2]], %[[BB1]] ], [ [[TMP2]], %[[BB1]] ], [ [[TMP2]], %[[BB1]] ], [ [[TMP2]], %[[BB1]] ], [ [[TMP2]], %[[BB1]] ], [ zeroinitializer, %[[BB]] ], [ zeroinitializer, %[[BB]] ], [ zeroinitializer, %[[BB]] ], [ zeroinitializer, %[[BB]] ], [ zeroinitializer, %[[BB]] ], [ zeroinitializer, %[[BB]] ], [ zeroinitializer, %[[BB]] ], [ zeroinitializer, %[[BB]] ], [ zeroinitializer, %[[BB]] ], [ zeroinitializer, %[[BB]] ], [ zeroinitializer, %[[BB]] ], [ zeroinitializer, %[[BB]] ], [ [[TMP2]], %[[BB1]] ], [ [[TMP2]], %[[BB1]] ]
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; CHECK-NEXT: ret void
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;
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bb:
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%ashr = ashr i32 0, 0
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%add = add i32 0, 0
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switch i32 0, label %bb1 [
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i32 -4, label %bb4
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i32 -1, label %bb4
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i32 1, label %bb4
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i32 2, label %bb4
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i32 5, label %bb4
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i32 7, label %bb4
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i32 8, label %bb4
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i32 11, label %bb4
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i32 13, label %bb4
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i32 21, label %bb4
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i32 17, label %bb4
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i32 19, label %bb4
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]
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bb1:
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%add2 = add i32 0, 0
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%ashr3 = ashr i32 %add2, 1
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%xor = xor i32 0, 0
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%or = or i32 %xor, %ashr
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switch i32 0, label %bb4 [
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i32 -4, label %bb4
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i32 -1, label %bb4
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i32 1, label %bb4
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i32 2, label %bb4
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i32 5, label %bb4
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i32 7, label %bb4
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i32 8, label %bb4
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i32 11, label %bb4
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i32 13, label %bb4
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i32 21, label %bb4
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i32 17, label %bb4
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i32 19, label %bb4
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]
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bb4:
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%phi = phi i32 [ %ashr3, %bb1 ], [ %ashr3, %bb1 ], [ %ashr3, %bb1 ], [ %ashr3, %bb1 ], [ %ashr3, %bb1 ], [ %ashr3, %bb1 ], [ %ashr3, %bb1 ], [ %ashr3, %bb1 ], [ %ashr3, %bb1 ], [ %ashr3, %bb1 ], [ %ashr3, %bb1 ], [ %ashr, %bb ], [ %ashr, %bb ], [ %ashr, %bb ], [ %ashr, %bb ], [ %ashr, %bb ], [ %ashr, %bb ], [ %ashr, %bb ], [ %ashr, %bb ], [ %ashr, %bb ], [ %ashr, %bb ], [ %ashr, %bb ], [ %ashr, %bb ], [ %ashr3, %bb1 ], [ %ashr3, %bb1 ]
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%phi5 = phi i32 [ %or, %bb1 ], [ %or, %bb1 ], [ %or, %bb1 ], [ %or, %bb1 ], [ %or, %bb1 ], [ %or, %bb1 ], [ %or, %bb1 ], [ %or, %bb1 ], [ %or, %bb1 ], [ %or, %bb1 ], [ %or, %bb1 ], [ %add, %bb ], [ %add, %bb ], [ %add, %bb ], [ %add, %bb ], [ %add, %bb ], [ %add, %bb ], [ %add, %bb ], [ %add, %bb ], [ %add, %bb ], [ %add, %bb ], [ %add, %bb ], [ %add, %bb ], [ %or, %bb1 ], [ %or, %bb1 ]
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ret void
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}
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