5079260ec7
I was hitting this error and the error location was pointing to the register class definition instead of the incorrect InstAlias. Pass in the InstAlias location to make it easier to debug. Happens with `def : InstAlias<"foo", (Inst X0)>`, where `Inst` takes a RegClassByHwMode operand that is not necessarily satisfied by register X0. Similar problem with the CompressPat backend. Reviewed By: arsenm Pull Request: https://github.com/llvm/llvm-project/pull/170790
240 lines
9.9 KiB
C++
240 lines
9.9 KiB
C++
//===- CodeGenInstAlias.cpp - CodeGen InstAlias Class Wrapper -------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the CodeGenInstAlias class.
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//
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//===----------------------------------------------------------------------===//
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#include "CodeGenInstAlias.h"
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#include "CodeGenInstruction.h"
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#include "CodeGenRegisters.h"
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#include "CodeGenTarget.h"
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#include "llvm/ADT/StringMap.h"
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#include "llvm/Support/Error.h"
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#include "llvm/TableGen/Error.h"
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#include "llvm/TableGen/Record.h"
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using namespace llvm;
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unsigned CodeGenInstAlias::ResultOperand::getMINumOperands() const {
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if (!isRecord())
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return 1;
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const Record *Rec = getRecord();
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if (!Rec->isSubClassOf("Operand"))
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return 1;
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const DagInit *MIOpInfo = Rec->getValueAsDag("MIOperandInfo");
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if (MIOpInfo->getNumArgs() == 0) {
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// Unspecified, so it defaults to 1
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return 1;
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}
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return MIOpInfo->getNumArgs();
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}
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using ResultOperand = CodeGenInstAlias::ResultOperand;
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static Expected<ResultOperand>
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matchSimpleOperand(const Init *Arg, const StringInit *ArgName, const Record *Op,
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const CodeGenTarget &T, ArrayRef<SMLoc> Loc) {
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if (const Record *OpRC = T.getAsRegClassLike(Op)) {
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if (const auto *ArgDef = dyn_cast<DefInit>(Arg)) {
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const Record *ArgRec = ArgDef->getDef();
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// Match 'RegClass:$name' or 'RegOp:$name'.
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if (const Record *ArgRC = T.getInitValueAsRegClassLike(Arg)) {
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if (ArgRC->isSubClassOf("RegisterClass")) {
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if (!OpRC->isSubClassOf("RegisterClass") ||
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!T.getRegisterClass(OpRC, Loc).hasSubClass(
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&T.getRegisterClass(ArgRC, Loc)))
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return createStringError(
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"argument register class " + ArgRC->getName() +
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" is not a subclass of operand register class " +
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OpRC->getName());
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if (!ArgName)
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return createStringError(
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"register class argument must have a name");
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}
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// TODO: Verify RegClassByHwMode usage
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return ResultOperand::createRecord(ArgName->getAsUnquotedString(),
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ArgRec);
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}
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// Match 'Reg'.
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if (ArgRec->isSubClassOf("Register")) {
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if (!T.getRegisterClass(OpRC, Loc).contains(
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T.getRegBank().getReg(ArgRec)))
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return createStringError(
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"register argument " + ArgRec->getName() +
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" is not a member of operand register class " + OpRC->getName());
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if (ArgName)
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return createStringError("register argument must not have a name");
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return ResultOperand::createRegister(ArgRec);
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}
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// Match 'zero_reg'.
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if (ArgRec->getName() == "zero_reg") {
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if (ArgName)
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return createStringError("register argument must not have a name");
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return ResultOperand::createRegister(nullptr);
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}
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}
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return createStringError("argument must be a subclass of RegisterClass, "
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"RegisterOperand, or zero_reg");
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}
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if (Op->isSubClassOf("Operand")) {
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// Match integer or bits.
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if (const auto *ArgInt = dyn_cast_or_null<IntInit>(
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Arg->convertInitializerTo(IntRecTy::get(Arg->getRecordKeeper())))) {
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if (ArgName)
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return createStringError("integer argument must not have a name");
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return ResultOperand::createImmediate(ArgInt->getValue());
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}
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// Match a subclass of Operand.
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if (const auto *ArgDef = dyn_cast<DefInit>(Arg);
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ArgDef && ArgDef->getDef()->isSubClassOf("Operand")) {
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if (!ArgName)
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return createStringError("argument must have a name");
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return ResultOperand::createRecord(ArgName->getAsUnquotedString(),
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ArgDef->getDef());
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}
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}
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return createStringError("argument must be a subclass of 'Operand' but got " +
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Op->getName() + " instead");
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}
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static Expected<ResultOperand> matchComplexOperand(const Init *Arg,
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const StringInit *ArgName,
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const Record *Op) {
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assert(Op->isSubClassOf("Operand"));
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const auto *ArgDef = dyn_cast<DefInit>(Arg);
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if (!ArgDef || !ArgDef->getDef()->isSubClassOf("Operand"))
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return createStringError("argument must be a subclass of Operand");
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if (!ArgName)
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return createStringError("argument must have a name");
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return ResultOperand::createRecord(ArgName->getAsUnquotedString(),
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ArgDef->getDef());
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}
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CodeGenInstAlias::CodeGenInstAlias(const Record *R, const CodeGenTarget &T)
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: TheDef(R) {
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Result = R->getValueAsDag("ResultInst");
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AsmString = R->getValueAsString("AsmString");
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// Verify that the root of the result is an instruction.
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const DefInit *DI = dyn_cast<DefInit>(Result->getOperator());
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if (!DI || !DI->getDef()->isSubClassOf("Instruction"))
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PrintFatalError(R->getLoc(),
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"result of inst alias should be an instruction");
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ResultInst = &T.getInstruction(DI->getDef());
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// NameClass - If argument names are repeated, we need to verify they have
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// the same class.
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StringMap<const Record *> NameClass;
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for (unsigned i = 0, e = Result->getNumArgs(); i != e; ++i) {
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const DefInit *ADI = dyn_cast<DefInit>(Result->getArg(i));
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if (!ADI || !Result->getArgName(i))
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continue;
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// Verify we don't have something like: (someinst GR16:$foo, GR32:$foo)
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// $foo can exist multiple times in the result list, but it must have the
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// same type.
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const Record *&Entry = NameClass[Result->getArgNameStr(i)];
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if (Entry && Entry != ADI->getDef())
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PrintFatalError(R->getLoc(), "result value $" + Result->getArgNameStr(i) +
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" is both " + Entry->getName() +
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" and " + ADI->getDef()->getName() +
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"!");
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Entry = ADI->getDef();
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}
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// Decode and validate the arguments of the result.
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unsigned ArgIdx = 0;
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for (auto [OpIdx, OpInfo] : enumerate(ResultInst->Operands)) {
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// Tied registers don't have an entry in the result dag unless they're part
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// of a complex operand, in which case we include them anyways, as we
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// don't have any other way to specify the whole operand.
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if (OpInfo.MINumOperands == 1 && OpInfo.getTiedRegister() != -1) {
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// Tied operands of different RegisterClass should be explicit within an
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// instruction's syntax and so cannot be skipped.
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int TiedOpNum = OpInfo.getTiedRegister();
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if (OpInfo.Rec->getName() ==
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ResultInst->Operands[TiedOpNum].Rec->getName())
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continue;
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}
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if (ArgIdx >= Result->getNumArgs())
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PrintFatalError(R->getLoc(), "not enough arguments for instruction!");
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const Record *Op = OpInfo.Rec;
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if (Op->isSubClassOf("Operand") && !OpInfo.MIOperandInfo->arg_empty()) {
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// Complex operand (a subclass of Operand with non-empty MIOperandInfo).
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// The argument can be a DAG or a subclass of Operand.
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if (auto *ArgDag = dyn_cast<DagInit>(Result->getArg(ArgIdx))) {
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// The argument is a DAG. The operator must be the name of the operand.
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if (auto *Operator = dyn_cast<DefInit>(ArgDag->getOperator());
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!Operator || Operator->getDef()->getName() != Op->getName())
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PrintFatalError(R, "argument #" + Twine(ArgIdx) +
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" operator must be " + Op->getName());
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// The number of sub-arguments and the number of sub-operands
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// must match exactly.
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unsigned NumSubOps = OpInfo.MIOperandInfo->getNumArgs();
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unsigned NumSubArgs = ArgDag->getNumArgs();
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if (NumSubArgs != NumSubOps)
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PrintFatalError(R, "argument #" + Twine(ArgIdx) +
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" must have exactly " + Twine(NumSubOps) +
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" sub-arguments");
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// Match sub-operands individually.
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for (unsigned SubOpIdx = 0; SubOpIdx != NumSubOps; ++SubOpIdx) {
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const Record *SubOp =
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cast<DefInit>(OpInfo.MIOperandInfo->getArg(SubOpIdx))->getDef();
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Expected<ResultOperand> ResOpOrErr = matchSimpleOperand(
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ArgDag->getArg(SubOpIdx), ArgDag->getArgName(SubOpIdx), SubOp, T,
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R->getLoc());
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if (!ResOpOrErr)
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PrintFatalError(R, "in argument #" + Twine(ArgIdx) + "." +
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Twine(SubOpIdx) + ": " +
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toString(ResOpOrErr.takeError()));
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ResultOperands.push_back(*ResOpOrErr);
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ResultInstOperandIndex.emplace_back(OpIdx, SubOpIdx);
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}
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} else {
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// Match complex operand as a whole.
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Expected<ResultOperand> ResOpOrErr = matchComplexOperand(
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Result->getArg(ArgIdx), Result->getArgName(ArgIdx), Op);
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if (!ResOpOrErr)
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PrintFatalError(R, "in argument #" + Twine(ArgIdx) + ": " +
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toString(ResOpOrErr.takeError()));
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ResultOperands.push_back(*ResOpOrErr);
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ResultInstOperandIndex.emplace_back(OpIdx, -1);
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}
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} else {
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// Simple operand (RegisterClass, RegisterOperand or Operand with empty
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// MIOperandInfo).
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Expected<ResultOperand> ResOpOrErr =
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matchSimpleOperand(Result->getArg(ArgIdx), Result->getArgName(ArgIdx),
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Op, T, R->getLoc());
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if (!ResOpOrErr)
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PrintFatalError(R, "in argument #" + Twine(ArgIdx) + ": " +
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toString(ResOpOrErr.takeError()));
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ResultOperands.push_back(*ResOpOrErr);
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ResultInstOperandIndex.emplace_back(OpIdx, -1);
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}
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ArgIdx++;
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}
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if (ArgIdx != Result->getNumArgs())
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PrintFatalError(R->getLoc(), "too many operands for instruction!");
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}
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