258cb467e9
This patch introduces a new transformation pass that converts `acc.serial` constructs into `acc.parallel` constructs with num_gangs(1), num_workers(1), and vector_length(1). The transformation is semantically equivalent since an OpenACC serial region executes sequentially, which is identical to a parallel region with a single gang, worker, and vector. This unification simplifies processing of acc regions by enabling code reuse in later compilation stages. Co-authored-by: Vijay Kandiah <vkandiah@nvidia.com>
118 lines
4.6 KiB
C++
118 lines
4.6 KiB
C++
//===- ACCLegalizeSerial.cpp - Legalize ACC Serial region -----------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass converts acc.serial into acc.parallel with num_gangs(1)
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// num_workers(1) vector_length(1).
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//
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// This transformation simplifies processing of acc regions by unifying the
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// handling of serial and parallel constructs. Since an OpenACC serial region
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// executes sequentially (like a parallel region with a single gang, worker, and
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// vector), this conversion is semantically equivalent while enabling code reuse
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// in later compilation stages.
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Dialect/OpenACC/Transforms/Passes.h"
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#include "mlir/Dialect/Arith/IR/Arith.h"
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#include "mlir/Dialect/Func/IR/FuncOps.h"
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#include "mlir/Dialect/OpenACC/OpenACC.h"
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#include "mlir/IR/Builders.h"
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#include "mlir/IR/BuiltinAttributes.h"
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#include "mlir/IR/Location.h"
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#include "mlir/IR/MLIRContext.h"
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#include "mlir/IR/PatternMatch.h"
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#include "mlir/IR/Region.h"
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#include "mlir/IR/Value.h"
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#include "mlir/Support/LLVM.h"
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#include "mlir/Support/LogicalResult.h"
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#include "mlir/Transforms/GreedyPatternRewriteDriver.h"
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#include "llvm/Support/Debug.h"
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namespace mlir {
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namespace acc {
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#define GEN_PASS_DEF_ACCLEGALIZESERIAL
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#include "mlir/Dialect/OpenACC/Transforms/Passes.h.inc"
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} // namespace acc
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} // namespace mlir
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#define DEBUG_TYPE "acc-legalize-serial"
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namespace {
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using namespace mlir;
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struct ACCSerialOpConversion : public OpRewritePattern<acc::SerialOp> {
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using OpRewritePattern<acc::SerialOp>::OpRewritePattern;
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LogicalResult matchAndRewrite(acc::SerialOp serialOp,
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PatternRewriter &rewriter) const override {
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const Location loc = serialOp.getLoc();
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// Create a container holding the constant value of 1 for use as the
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// num_gangs, num_workers, and vector_length attributes.
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llvm::SmallVector<mlir::Value> numValues;
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auto value = arith::ConstantIntOp::create(rewriter, loc, 1, 32);
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numValues.push_back(value);
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// Since num_gangs is specified as both attributes and values, create a
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// segment attribute.
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llvm::SmallVector<int32_t> numGangsSegments;
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numGangsSegments.push_back(numValues.size());
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auto gangSegmentsAttr = rewriter.getDenseI32ArrayAttr(numGangsSegments);
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// Create a device_type attribute set to `none` which ensures that
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// the parallel dimensions specification applies to the default clauses.
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llvm::SmallVector<mlir::Attribute> crtDeviceTypes;
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auto crtDeviceTypeAttr = mlir::acc::DeviceTypeAttr::get(
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rewriter.getContext(), mlir::acc::DeviceType::None);
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crtDeviceTypes.push_back(crtDeviceTypeAttr);
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auto devTypeAttr =
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mlir::ArrayAttr::get(rewriter.getContext(), crtDeviceTypes);
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LLVM_DEBUG(llvm::dbgs() << "acc.serial OP: " << serialOp << "\n");
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// Create a new acc.parallel op with the same operands - except include the
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// num_gangs, num_workers, and vector_length attributes.
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acc::ParallelOp parOp = acc::ParallelOp::create(
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rewriter, loc, serialOp.getAsyncOperands(),
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serialOp.getAsyncOperandsDeviceTypeAttr(), serialOp.getAsyncOnlyAttr(),
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serialOp.getWaitOperands(), serialOp.getWaitOperandsSegmentsAttr(),
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serialOp.getWaitOperandsDeviceTypeAttr(),
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serialOp.getHasWaitDevnumAttr(), serialOp.getWaitOnlyAttr(), numValues,
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gangSegmentsAttr, devTypeAttr, numValues, devTypeAttr, numValues,
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devTypeAttr, serialOp.getIfCond(), serialOp.getSelfCond(),
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serialOp.getSelfAttrAttr(), serialOp.getReductionOperands(),
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serialOp.getPrivateOperands(), serialOp.getFirstprivateOperands(),
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serialOp.getDataClauseOperands(), serialOp.getDefaultAttrAttr(),
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serialOp.getCombinedAttr());
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parOp.getRegion().takeBody(serialOp.getRegion());
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LLVM_DEBUG(llvm::dbgs() << "acc.parallel OP: " << parOp << "\n");
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rewriter.replaceOp(serialOp, parOp);
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return success();
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}
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};
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class ACCLegalizeSerial
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: public mlir::acc::impl::ACCLegalizeSerialBase<ACCLegalizeSerial> {
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public:
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using ACCLegalizeSerialBase<ACCLegalizeSerial>::ACCLegalizeSerialBase;
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void runOnOperation() override {
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func::FuncOp funcOp = getOperation();
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MLIRContext *context = funcOp.getContext();
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RewritePatternSet patterns(context);
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patterns.insert<ACCSerialOpConversion>(context);
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(void)applyPatternsGreedily(funcOp, std::move(patterns));
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}
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};
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} // namespace
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