Chia-hung Duan 2c1d15a4b5 Revert "[mlir] Fix the order of operation attribute verification" ...

This reverts commit e1651717324e8e17052380c55d8755305552ac9b.

This was submitted by accident.

2026-02-10 07:39:53 +00:00

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all-reduce-add.mlir

[mlir] Update all-reduce (& vector tests) to use workgroup barriers (#178285)

2026-01-27 13:09:18 -08:00

all-reduce-maxf.mlir

[mlir] Update all-reduce (& vector tests) to use workgroup barriers (#178285)

2026-01-27 13:09:18 -08:00

async-region.mlir

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barrier-elimination.mlir

[milr][gpu] Make barrier elimination address-space aware (#178101)

2026-02-04 08:39:44 -08:00

broadcast-speculatability.mlir

[mlir][gpu] Revert gpu.subgroup_broadcast with any_lane (#157373)

2025-09-08 00:43:57 +00:00

bufferization-buffer-deallocation.mlir

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canonicalize.mlir

[mlir][gpu] Add address space modifier to gpu.barrier (#177425)

2026-01-26 12:08:47 -08:00

decompose-memrefs.mlir

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dynamic-shared-memory.mlir

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globalId-rewrite.mlir

[mlir][gpu] Use arith dialect to lower gpu.global_id (#171614)

2025-12-13 18:43:12 +08:00

indirect-device-func-call.mlir

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int-range-interface-cluster.mlir

[MLIR] Propagate known cluster sizes from gpu.launch to gpu.func (#174404)

2026-01-06 03:49:02 -08:00

int-range-interface.mlir

[mlir][gpu] Revert gpu.subgroup_broadcast with any_lane (#157373)

2025-09-08 00:43:57 +00:00

invalid.mlir

Revert "[mlir] Fix the order of operation attribute verification"

2026-02-10 07:39:53 +00:00

mapping.mlir

[mlir][gpu] Add innermost-first policy when mapping loops to GPU IDs (#160634)

2025-09-25 17:23:53 +01:00

memref-to-llvm.mlir

Create function declaration in the proper module (#161281)

2025-09-29 15:32:03 -07:00

module-to-binary-invalid.mlir

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module-to-binary-nvvm.mlir

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module-to-binary-rocdl.mlir

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module-to-binary-spirv.mlir

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multiple-all-reduce.mlir

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nvvm-attach-target.mlir

[MLIR][GPU] Update serializeToObject to use SerializedObject wrapper and include ISA compiler logs (#176697)

2026-01-30 12:56:20 +01:00

ops.mlir

[mlir][gpu] Add address space modifier to gpu.barrier (#177425)

2026-01-26 12:08:47 -08:00

outlining.mlir

[MLIR][GPU] Make sure to propagate known cluster sizes in kernel outlining (#176894)

2026-01-21 11:10:40 +01:00

promote-shuffle-amdgpu.mlir

[mlir][amdgpu] Promote gpu.shuffle to amdgpu.permlane_swap (#154933)

2025-08-24 12:41:09 +02:00

promotion.mlir

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shuffle-rewrite.mlir

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sink-ops.mlir

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sparse-roundtrip.mlir

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spirv-attach-targets.mlir

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subgroup-mma-vector-unroll.mlir

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subgroup-reduce-lowering.mlir

[MLIR][GPU] Ensure all lanes in cluster have final reduction value (#165764)

2025-10-31 09:12:43 -07:00

subgroupId-rewrite.mlir

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test-nvvm-pipeline.mlir

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transform-gpu-failing.mlir

[mlir][SCF][GPU] Add DeviceMaskingAttrInterface (#146943)

2025-07-07 18:06:41 +02:00

transform-gpu.mlir

[mlir][SCF][GPU] Add DeviceMaskingAttrInterface (#146943)

2025-07-07 18:06:41 +02:00

value-bounds-op-interface-impl.mlir

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