7219b1e8a9
Some of the test cases are failing as they introduce unstructured control flow. It would be good to catch this in MLIR, but I am not sure it is currently feasible. We could enforce the conditional branch to always be in `spirv.mlir.selection` however from my perspective it will break our downstream project as we rely on unstructured control flow, i.e., the control flow graph is structured but we do not use `spirv.mlir.selection` and `spirv.mlir.loop` as they do not currently support early exists. It seems that the support for early exists is slowly coming into MLIR so we probably can revise what is being enforced regarding control flow ops in the future.
384 lines
12 KiB
MLIR
384 lines
12 KiB
MLIR
// RUN: mlir-translate -no-implicit-module -split-input-file -test-spirv-roundtrip %s | FileCheck %s
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// RUN: %if spirv-tools %{ rm -rf %t %}
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// RUN: %if spirv-tools %{ mkdir %t %}
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// RUN: %if spirv-tools %{ mlir-translate --no-implicit-module --serialize-spirv --split-input-file --spirv-save-validation-files-with-prefix=%t/module %s %}
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// RUN: %if spirv-tools %{ spirv-val %t %}
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// Test branch with one block argument
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spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader], []> {
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spirv.func @foo() -> () "None" {
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// CHECK: %[[CST:.*]] = spirv.Constant 0
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%zero = spirv.Constant 0 : i32
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// CHECK-NEXT: spirv.Branch ^bb1(%[[CST]] : i32)
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spirv.Branch ^bb1(%zero : i32)
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// CHECK-NEXT: ^bb1(%{{.*}}: i32):
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^bb1(%arg0: i32):
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spirv.Return
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}
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spirv.func @main() -> () "None" {
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spirv.Return
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}
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spirv.EntryPoint "GLCompute" @main
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}
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// -----
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// Test branch with multiple block arguments
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spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader], []> {
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spirv.func @foo() -> () "None" {
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// CHECK: %[[ZERO:.*]] = spirv.Constant 0
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%zero = spirv.Constant 0 : i32
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// CHECK-NEXT: %[[ONE:.*]] = spirv.Constant 1
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%one = spirv.Constant 1.0 : f32
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// CHECK-NEXT: spirv.Branch ^bb1(%[[ZERO]], %[[ONE]] : i32, f32)
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spirv.Branch ^bb1(%zero, %one : i32, f32)
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// CHECK-NEXT: ^bb1(%{{.*}}: i32, %{{.*}}: f32): // pred: ^bb0
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^bb1(%arg0: i32, %arg1: f32):
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spirv.Return
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}
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spirv.func @main() -> () "None" {
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spirv.Return
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}
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spirv.EntryPoint "GLCompute" @main
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}
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// -----
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// Test using block arguments within branch
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spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader], []> {
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spirv.func @foo() -> () "None" {
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// CHECK: %[[CST0:.*]] = spirv.Constant 0
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%zero = spirv.Constant 0 : i32
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// CHECK-NEXT: spirv.Branch ^bb1(%[[CST0]] : i32)
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spirv.Branch ^bb1(%zero : i32)
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// CHECK-NEXT: ^bb1(%[[ARG:.*]]: i32):
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^bb1(%arg0: i32):
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// CHECK-NEXT: %[[ADD:.*]] = spirv.IAdd %[[ARG]], %[[ARG]] : i32
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%0 = spirv.IAdd %arg0, %arg0 : i32
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// CHECK-NEXT: %[[CST1:.*]] = spirv.Constant 0
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// CHECK-NEXT: spirv.Branch ^bb2(%[[CST1]], %[[ADD]] : i32, i32)
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spirv.Branch ^bb2(%zero, %0 : i32, i32)
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// CHECK-NEXT: ^bb2(%{{.*}}: i32, %{{.*}}: i32):
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^bb2(%arg1: i32, %arg2: i32):
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spirv.Return
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}
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spirv.func @main() -> () "None" {
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spirv.Return
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}
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spirv.EntryPoint "GLCompute" @main
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}
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// -----
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// Test block not following domination order
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spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader], []> {
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spirv.func @foo() -> () "None" {
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// CHECK: spirv.Branch ^bb1
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spirv.Branch ^bb1
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// CHECK-NEXT: ^bb1:
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// CHECK-NEXT: %[[ZERO:.*]] = spirv.Constant 0
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// CHECK-NEXT: %[[ONE:.*]] = spirv.Constant 1
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// CHECK-NEXT: spirv.Branch ^bb2(%[[ZERO]], %[[ONE]] : i32, f32)
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// CHECK-NEXT: ^bb2(%{{.*}}: i32, %{{.*}}: f32):
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^bb2(%arg0: i32, %arg1: f32):
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// CHECK-NEXT: spirv.Return
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spirv.Return
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// This block is reordered to follow domination order.
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^bb1:
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%zero = spirv.Constant 0 : i32
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%one = spirv.Constant 1.0 : f32
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spirv.Branch ^bb2(%zero, %one : i32, f32)
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}
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spirv.func @main() -> () "None" {
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spirv.Return
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}
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spirv.EntryPoint "GLCompute" @main
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}
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// -----
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// Test multiple predecessors
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spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader], []> {
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spirv.func @foo() -> () "None" {
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%var = spirv.Variable : !spirv.ptr<i32, Function>
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// CHECK: spirv.mlir.selection
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spirv.mlir.selection {
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%true = spirv.Constant true
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// CHECK: spirv.BranchConditional %{{.*}}, ^bb1, ^bb2
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spirv.BranchConditional %true, ^true, ^false
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// CHECK-NEXT: ^bb1:
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^true:
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// CHECK-NEXT: %[[ZERO:.*]] = spirv.Constant 0
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%zero = spirv.Constant 0 : i32
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// CHECK-NEXT: spirv.Branch ^bb3(%[[ZERO]] : i32)
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spirv.Branch ^phi(%zero: i32)
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// CHECK-NEXT: ^bb2:
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^false:
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// CHECK-NEXT: %[[ONE:.*]] = spirv.Constant 1
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%one = spirv.Constant 1 : i32
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// CHECK-NEXT: spirv.Branch ^bb3(%[[ONE]] : i32)
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spirv.Branch ^phi(%one: i32)
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// CHECK-NEXT: ^bb3(%[[ARG:.*]]: i32):
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^phi(%arg: i32):
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// CHECK-NEXT: spirv.Store "Function" %{{.*}}, %[[ARG]] : i32
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spirv.Store "Function" %var, %arg : i32
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// CHECK-NEXT: spirv.Return
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spirv.Return
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// CHECK-NEXT: ^bb4:
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^merge:
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// CHECK-NEXT: spirv.mlir.merge
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spirv.mlir.merge
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}
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spirv.Return
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}
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spirv.func @main() -> () "None" {
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spirv.Return
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}
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spirv.EntryPoint "GLCompute" @main
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}
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// -----
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// Test nested loops with block arguments
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spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader], []> {
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spirv.GlobalVariable @__builtin_var_NumWorkgroups__ built_in("NumWorkgroups") : !spirv.ptr<vector<3xi32>, Input>
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spirv.GlobalVariable @__builtin_var_WorkgroupId__ built_in("WorkgroupId") : !spirv.ptr<vector<3xi32>, Input>
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spirv.func @fmul_kernel() "None" {
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%3 = spirv.Constant 12 : i32
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%4 = spirv.Constant 32 : i32
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%5 = spirv.Constant 4 : i32
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%6 = spirv.mlir.addressof @__builtin_var_WorkgroupId__ : !spirv.ptr<vector<3xi32>, Input>
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%7 = spirv.Load "Input" %6 : vector<3xi32>
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%8 = spirv.CompositeExtract %7[0 : i32] : vector<3xi32>
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%9 = spirv.mlir.addressof @__builtin_var_WorkgroupId__ : !spirv.ptr<vector<3xi32>, Input>
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%10 = spirv.Load "Input" %9 : vector<3xi32>
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%11 = spirv.CompositeExtract %10[1 : i32] : vector<3xi32>
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%18 = spirv.mlir.addressof @__builtin_var_NumWorkgroups__ : !spirv.ptr<vector<3xi32>, Input>
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%19 = spirv.Load "Input" %18 : vector<3xi32>
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%20 = spirv.CompositeExtract %19[0 : i32] : vector<3xi32>
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%21 = spirv.mlir.addressof @__builtin_var_NumWorkgroups__ : !spirv.ptr<vector<3xi32>, Input>
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%22 = spirv.Load "Input" %21 : vector<3xi32>
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%23 = spirv.CompositeExtract %22[1 : i32] : vector<3xi32>
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%30 = spirv.IMul %11, %4 : i32
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%31 = spirv.IMul %23, %4 : i32
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// CHECK: spirv.Branch ^[[FN_BB:.*]](%{{.*}} : i32)
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// CHECK: ^[[FN_BB]](%[[FN_BB_ARG:.*]]: i32):
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// CHECK: spirv.mlir.loop {
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spirv.mlir.loop {
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// CHECK: spirv.Branch ^bb1(%[[FN_BB_ARG]] : i32)
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spirv.Branch ^bb1(%30 : i32)
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// CHECK: ^[[LP1_HDR:.*]](%[[LP1_HDR_ARG:.*]]: i32):
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^bb1(%32: i32):
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// CHECK: spirv.SLessThan
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%33 = spirv.SLessThan %32, %3 : i32
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// CHECK: spirv.BranchConditional %{{.*}}, ^[[LP1_BDY:.*]], ^[[LP1_MG:.*]]
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spirv.BranchConditional %33, ^bb2, ^bb3
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// CHECK: ^[[LP1_BDY]]:
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^bb2:
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// CHECK: %[[MUL:.*]] = spirv.IMul
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%34 = spirv.IMul %8, %5 : i32
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// CHECK: spirv.IMul
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%35 = spirv.IMul %20, %5 : i32
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// CHECK: spirv.Branch ^[[LP1_CNT:.*]](%[[MUL]] : i32)
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// CHECK: ^[[LP1_CNT]](%[[LP1_CNT_ARG:.*]]: i32):
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// CHECK: spirv.mlir.loop {
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spirv.mlir.loop {
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// CHECK: spirv.Branch ^[[LP2_HDR:.*]](%[[LP1_CNT_ARG]] : i32)
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spirv.Branch ^bb1(%34 : i32)
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// CHECK: ^[[LP2_HDR]](%[[LP2_HDR_ARG:.*]]: i32):
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^bb1(%37: i32):
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// CHECK: spirv.SLessThan %[[LP2_HDR_ARG]]
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%38 = spirv.SLessThan %37, %5 : i32
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// CHECK: spirv.BranchConditional %{{.*}}, ^[[LP2_BDY:.*]], ^[[LP2_MG:.*]]
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spirv.BranchConditional %38, ^bb2, ^bb3
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// CHECK: ^[[LP2_BDY]]:
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^bb2:
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// CHECK: %[[ADD1:.*]] = spirv.IAdd
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%48 = spirv.IAdd %37, %35 : i32
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// CHECK: spirv.Branch ^[[LP2_HDR]](%[[ADD1]] : i32)
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spirv.Branch ^bb1(%48 : i32)
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// CHECK: ^[[LP2_MG]]:
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^bb3:
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// CHECK: spirv.mlir.merge
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spirv.mlir.merge
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}
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// CHECK: %[[ADD2:.*]] = spirv.IAdd %[[LP1_HDR_ARG]]
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%36 = spirv.IAdd %32, %31 : i32
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// CHECK: spirv.Branch ^[[LP1_HDR]](%[[ADD2]] : i32)
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spirv.Branch ^bb1(%36 : i32)
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// CHECK: ^[[LP1_MG]]:
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^bb3:
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// CHECK: spirv.mlir.merge
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spirv.mlir.merge
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}
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spirv.Return
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}
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spirv.EntryPoint "GLCompute" @fmul_kernel, @__builtin_var_WorkgroupId__, @__builtin_var_NumWorkgroups__
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spirv.ExecutionMode @fmul_kernel "LocalSize", 32, 1, 1
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}
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// -----
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// Test back-to-back loops with block arguments
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spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader], []> {
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spirv.func @fmul_kernel() "None" {
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%cst4 = spirv.Constant 4 : i32
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%val1 = spirv.Constant 43 : i32
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%val2 = spirv.Constant 44 : i32
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// CHECK: spirv.Constant 43
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// CHECK-NEXT: spirv.Branch ^[[BB1:.+]](%{{.+}} : i32)
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// CHECK-NEXT: ^[[BB1]](%{{.+}}: i32):
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// CHECK-NEXT: spirv.mlir.loop
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spirv.mlir.loop { // loop 1
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spirv.Branch ^bb1(%val1 : i32)
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^bb1(%loop1_bb_arg: i32):
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%loop1_lt = spirv.SLessThan %loop1_bb_arg, %cst4 : i32
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spirv.BranchConditional %loop1_lt, ^bb2, ^bb3
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^bb2:
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%loop1_add = spirv.IAdd %loop1_bb_arg, %cst4 : i32
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spirv.Branch ^bb1(%loop1_add : i32)
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^bb3:
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spirv.mlir.merge
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}
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// CHECK: spirv.Constant 44
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// CHECK-NEXT: spirv.Branch ^[[BB2:.+]](%{{.+}} : i32)
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// CHECK-NEXT: ^[[BB2]](%{{.+}}: i32):
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// CHECK-NEXT: spirv.mlir.loop
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spirv.mlir.loop { // loop 2
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spirv.Branch ^bb1(%val2 : i32)
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^bb1(%loop2_bb_arg: i32):
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%loop2_lt = spirv.SLessThan %loop2_bb_arg, %cst4 : i32
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spirv.BranchConditional %loop2_lt, ^bb2, ^bb3
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^bb2:
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%loop2_add = spirv.IAdd %loop2_bb_arg, %cst4 : i32
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spirv.Branch ^bb1(%loop2_add : i32)
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^bb3:
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spirv.mlir.merge
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}
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spirv.Return
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}
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spirv.EntryPoint "GLCompute" @fmul_kernel
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spirv.ExecutionMode @fmul_kernel "LocalSize", 32, 1, 1
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}
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// -----
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spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader], []> {
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// CHECK-LABEL: @cond_branch_true_argument
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spirv.func @cond_branch_true_argument() -> () "None" {
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%true = spirv.Constant true
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%zero = spirv.Constant 0 : i32
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%one = spirv.Constant 1 : i32
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spirv.mlir.selection {
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// CHECK: spirv.BranchConditional %{{.*}}, ^[[true1:.*]](%{{.*}}, %{{.*}} : i32, i32), ^[[false1:.*]]
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spirv.BranchConditional %true, ^true1(%zero, %zero: i32, i32), ^false1
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// CHECK: [[true1]](%{{.*}}: i32, %{{.*}}: i32)
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^true1(%arg0: i32, %arg1: i32):
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spirv.Return
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// CHECK: [[false1]]:
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^false1:
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spirv.Return
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^merge:
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spirv.mlir.merge
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}
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spirv.Return
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}
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spirv.func @main() -> () "None" {
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spirv.Return
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}
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spirv.EntryPoint "GLCompute" @main
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}
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// -----
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spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader], []> {
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// CHECK-LABEL: @cond_branch_false_argument
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spirv.func @cond_branch_false_argument() -> () "None" {
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%true = spirv.Constant true
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%zero = spirv.Constant 0 : i32
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%one = spirv.Constant 1 : i32
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spirv.mlir.selection {
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// CHECK: spirv.BranchConditional %{{.*}}, ^[[true1:.*]], ^[[false1:.*]](%{{.*}}, %{{.*}} : i32, i32)
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spirv.BranchConditional %true, ^true1, ^false1(%zero, %zero: i32, i32)
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// CHECK: [[true1]]:
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^true1:
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spirv.Return
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// CHECK: [[false1]](%{{.*}}: i32, %{{.*}}: i32):
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^false1(%arg0: i32, %arg1: i32):
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spirv.Return
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^merge:
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spirv.mlir.merge
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}
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spirv.Return
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}
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spirv.func @main() -> () "None" {
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spirv.Return
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}
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spirv.EntryPoint "GLCompute" @main
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}
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// -----
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spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader], []> {
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// CHECK-LABEL: @cond_branch_true_and_false_argument
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spirv.func @cond_branch_true_and_false_argument() -> () "None" {
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%true = spirv.Constant true
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%zero = spirv.Constant 0 : i32
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%one = spirv.Constant 1 : i32
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spirv.mlir.selection {
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// CHECK: spirv.BranchConditional %{{.*}}, ^[[true1:.*]](%{{.*}} : i32), ^[[false1:.*]](%{{.*}}, %{{.*}} : i32, i32)
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spirv.BranchConditional %true, ^true1(%one: i32), ^false1(%zero, %zero: i32, i32)
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// CHECK: [[true1]](%{{.*}}: i32):
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^true1(%arg0: i32):
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spirv.Return
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// CHECK: [[false1]](%{{.*}}: i32, %{{.*}}: i32):
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^false1(%arg1: i32, %arg2: i32):
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spirv.Return
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^merge:
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spirv.mlir.merge
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}
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spirv.Return
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}
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spirv.func @main() -> () "None" {
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spirv.Return
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}
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spirv.EntryPoint "GLCompute" @main
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}
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