60b6c53f25
fixes #166206 - Add swizzle support if row index is constant - Add test cases - Add new AST type - Add new LValue for Matrix Row Type - TODO: Make the new LValue a dynamic index version of ExtVectorElt
61 lines
3.6 KiB
HLSL
61 lines
3.6 KiB
HLSL
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 6
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// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.7-library -disable-llvm-passes -emit-llvm -finclude-default-header -o - %s | FileCheck %s
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// CHECK-LABEL: define hidden void @_Z10setMatrix1Ru11matrix_typeILm4ELm4EfEDv4_f(
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// CHECK-SAME: ptr noalias noundef nonnull align 4 dereferenceable(64) [[M:%.*]], <4 x float> noundef nofpclass(nan inf) [[V:%.*]]) #[[ATTR0:[0-9]+]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[M_ADDR:%.*]] = alloca ptr, align 4
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// CHECK-NEXT: [[V_ADDR:%.*]] = alloca <4 x float>, align 16
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// CHECK-NEXT: store ptr [[M]], ptr [[M_ADDR]], align 4
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// CHECK-NEXT: store <4 x float> [[V]], ptr [[V_ADDR]], align 16
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// CHECK-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[V_ADDR]], align 16
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// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[M_ADDR]], align 4, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]
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// CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x float> [[TMP0]], i32 0
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// CHECK-NEXT: [[TMP3:%.*]] = getelementptr <16 x float>, ptr [[TMP1]], i32 0, i32 15
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// CHECK-NEXT: store float [[TMP2]], ptr [[TMP3]], align 4
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// CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[TMP0]], i32 1
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// CHECK-NEXT: [[TMP5:%.*]] = getelementptr <16 x float>, ptr [[TMP1]], i32 0, i32 14
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// CHECK-NEXT: store float [[TMP4]], ptr [[TMP5]], align 4
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// CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x float> [[TMP0]], i32 2
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// CHECK-NEXT: [[TMP7:%.*]] = getelementptr <16 x float>, ptr [[TMP1]], i32 0, i32 13
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// CHECK-NEXT: store float [[TMP6]], ptr [[TMP7]], align 4
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// CHECK-NEXT: [[TMP8:%.*]] = extractelement <4 x float> [[TMP0]], i32 3
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// CHECK-NEXT: [[TMP9:%.*]] = getelementptr <16 x float>, ptr [[TMP1]], i32 0, i32 12
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// CHECK-NEXT: store float [[TMP8]], ptr [[TMP9]], align 4
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// CHECK-NEXT: ret void
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//
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void setMatrix1(out float4x4 M, float4 V) {
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M[3].abgr = V;
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}
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// CHECK-LABEL: define hidden void @_Z10setMatrix2Ru11matrix_typeILm4ELm4EiEDv4_i(
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// CHECK-SAME: ptr noalias noundef nonnull align 4 dereferenceable(64) [[M:%.*]], <4 x i32> noundef [[V:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[M_ADDR:%.*]] = alloca ptr, align 4
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// CHECK-NEXT: [[V_ADDR:%.*]] = alloca <4 x i32>, align 16
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// CHECK-NEXT: store ptr [[M]], ptr [[M_ADDR]], align 4
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// CHECK-NEXT: store <4 x i32> [[V]], ptr [[V_ADDR]], align 16
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// CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, ptr [[V_ADDR]], align 16
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// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[M_ADDR]], align 4, !nonnull [[META3]], !align [[META4]]
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// CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i32> [[TMP0]], i32 0
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// CHECK-NEXT: [[TMP3:%.*]] = getelementptr <16 x i32>, ptr [[TMP1]], i32 0, i32 8
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// CHECK-NEXT: store i32 [[TMP2]], ptr [[TMP3]], align 4
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// CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x i32> [[TMP0]], i32 1
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// CHECK-NEXT: [[TMP5:%.*]] = getelementptr <16 x i32>, ptr [[TMP1]], i32 0, i32 9
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// CHECK-NEXT: store i32 [[TMP4]], ptr [[TMP5]], align 4
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// CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i32> [[TMP0]], i32 2
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// CHECK-NEXT: [[TMP7:%.*]] = getelementptr <16 x i32>, ptr [[TMP1]], i32 0, i32 10
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// CHECK-NEXT: store i32 [[TMP6]], ptr [[TMP7]], align 4
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// CHECK-NEXT: [[TMP8:%.*]] = extractelement <4 x i32> [[TMP0]], i32 3
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// CHECK-NEXT: [[TMP9:%.*]] = getelementptr <16 x i32>, ptr [[TMP1]], i32 0, i32 11
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// CHECK-NEXT: store i32 [[TMP8]], ptr [[TMP9]], align 4
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// CHECK-NEXT: ret void
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//
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void setMatrix2(out int4x4 M, int4 V) {
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M[2].rgba = V;
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}
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//.
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// CHECK: [[META3]] = !{}
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// CHECK: [[META4]] = !{i64 4}
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//.
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