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llvm-project/llvm/test/CodeGen
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dfukalov aa77232a63 [NFC][AMDGPU] Improve fused fmul+fadd tests. 
Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D84903
2020-07-31 04:00:09 +03:00
..
AArch64
[LegalizeTypes][SVE] Support widen/split legalization for SPLAT_VECTOR
2020-07-30 16:17:45 -07:00
AMDGPU
[NFC][AMDGPU] Improve fused fmul+fadd tests.
2020-07-31 04:00:09 +03:00
ARC
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ARM
[MachineCopyPropagation] BackwardPropagatableCopy: add check for hasOverlappingMultipleDef
2020-07-29 16:21:01 +01:00
AVR
[AVR] Rewrite the function calling convention.
2020-06-23 21:36:18 +12:00
BPF
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
Generic
[llc] (almost) remove --print-machineinstrs
2020-07-20 10:43:28 -07:00
Hexagon
Align store conditional address
2020-07-30 10:42:00 -05:00
Inputs
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Lanai
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Mips
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
MIR
AMDGPU: Serialize MFI spill fields
2020-07-28 20:01:57 -04:00
MSP430
[MSP430] Declare comparison LibCalls as returning i16 instead of i32
2020-06-30 11:04:22 +03:00
NVPTX
[NVPTX] Fix for NVPTX module asm regression
2020-06-24 11:17:09 -07:00
PowerPC
[PowerPC][AIX] Move the testcase to proper dir
2020-07-30 14:25:59 +00:00
RISCV
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
SPARC
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
SystemZ
[SystemZ] Ensure -mno-vx disables any use of vector features
2020-07-23 15:34:59 +02:00
Thumb
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Thumb2
[DAGCombiner] Fold sext_inreg of a masked load into a sign extended masked load
2020-07-30 10:34:02 +01:00
VE
[VE] Support symbol with offset value
2020-07-01 23:55:27 +09:00
WebAssembly
[WebAssembly] Fixed 64-bit indices in br_table
2020-07-30 10:52:16 -07:00
WinCFGuard
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WinEH
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X86
[X86][SSE] combineExtractWithShuffle - extend extract(truncate(x),0) for any source vector size
2020-07-30 12:27:49 +01:00
XCore
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