571b787b83
NVPTX, SPIRV, and WebAssembly pass virtual registers to this function since they don't perform register allocation. We need to use Register to avoid a virtual register being converted to MCRegister by the caller.
81 lines
3.1 KiB
C++
81 lines
3.1 KiB
C++
//===-- MSP430InstrInfo.h - MSP430 Instruction Information ------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the MSP430 implementation of the TargetInstrInfo class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_MSP430_MSP430INSTRINFO_H
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#define LLVM_LIB_TARGET_MSP430_MSP430INSTRINFO_H
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#include "MSP430RegisterInfo.h"
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#include "llvm/CodeGen/TargetInstrInfo.h"
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#define GET_INSTRINFO_HEADER
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#include "MSP430GenInstrInfo.inc"
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namespace llvm {
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class MSP430Subtarget;
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class MSP430InstrInfo : public MSP430GenInstrInfo {
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const MSP430RegisterInfo RI;
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virtual void anchor();
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public:
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explicit MSP430InstrInfo(MSP430Subtarget &STI);
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/// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
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/// such, whenever a client has an instance of instruction info, it should
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/// always be able to get register info as well (through this method).
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///
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const MSP430RegisterInfo &getRegisterInfo() const { return RI; }
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void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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const DebugLoc &DL, Register DestReg, Register SrcReg,
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bool KillSrc, bool RenamableDest = false,
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bool RenamableSrc = false) const override;
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void storeRegToStackSlot(
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MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register SrcReg,
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bool isKill, int FrameIndex, const TargetRegisterClass *RC,
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const TargetRegisterInfo *TRI, Register VReg,
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MachineInstr::MIFlag Flags = MachineInstr::NoFlags) const override;
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void loadRegFromStackSlot(
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MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register DestReg,
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int FrameIdx, const TargetRegisterClass *RC,
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const TargetRegisterInfo *TRI, Register VReg,
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MachineInstr::MIFlag Flags = MachineInstr::NoFlags) const override;
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unsigned getInstSizeInBytes(const MachineInstr &MI) const override;
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// Branch folding goodness
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bool
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reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override;
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bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
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MachineBasicBlock *&FBB,
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SmallVectorImpl<MachineOperand> &Cond,
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bool AllowModify) const override;
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unsigned removeBranch(MachineBasicBlock &MBB,
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int *BytesRemoved = nullptr) const override;
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unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
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MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
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const DebugLoc &DL,
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int *BytesAdded = nullptr) const override;
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int64_t getFramePoppedByCallee(const MachineInstr &I) const {
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assert(isFrameInstr(I) && "Not a frame instruction");
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assert(I.getOperand(1).getImm() >= 0 && "Size must not be negative");
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return I.getOperand(1).getImm();
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}
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};
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}
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#endif
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