llvm-project

History

[DirectX] Handle dx.RawBuffer in DXILResourceAccess (#121725 )

This adds handling for raw and structured buffers when lowering resource
access via `llvm.dx.resource.getpointer`.

Fixes #121714

2025-01-23 21:35:34 -08:00

AArch64

[AArch64] Add pre-index store patterns for bf16.

2025-01-23 21:52:20 +00:00

AMDGPU

[MachineSink] Extend loop sinking capability (#117247 )

2025-01-23 17:08:23 -08:00

ARC

[ARC,test] Change llc -march= to -mtriple=

2024-12-15 12:29:53 -08:00

ARM

[PartiallyInlineLibCalls] Add infrastructure for emitting optimization remarks from PartiallyInlineLibCalls (#122654 )

2025-01-22 13:15:40 +07:00

AVR

[AVR] Force relocations for non-encodable jumps (#121498 )

2025-01-20 09:23:57 +08:00

BPF

[BPF,test] Change llc -march= to -mtriple=

2024-12-15 11:04:24 -08:00

CSKY

…

DirectX

[DirectX] Handle dx.RawBuffer in DXILResourceAccess (#121725 )

2025-01-23 21:35:34 -08:00

Generic

[NFC][SelectionDAG] Replace generic @llvm.expect.with.probability codegen test with X86 test (#117848 )

2024-12-01 17:46:08 -05:00

Hexagon

[llvm][CodeGen] Fix the issue caused by live interval checking in window scheduler (#123184 )

2025-01-23 09:39:03 +08:00

Inputs

…

Lanai

[test] Remove redundant -march= when target triple is specified in IR

2024-12-15 12:42:17 -08:00

LoongArch

[TargetLowering] Improve one signature of forceExpandWideMUL. (#123991 )

2025-01-23 12:49:35 -08:00

M68k

[M68k] Fix llc pass test after 3630d9ef65b30af7e4ca78e668649bbc48b5be66

2025-01-23 08:28:25 -05:00

Mips

[MIPS] [MSA] Widen v2i8, v216 and v2i32 vectors (#123040 )

2025-01-24 11:23:34 +08:00

MIR

[AMDGPU] Occupancy w.r.t. workgroup size range is also a range (#123748 )

2025-01-23 16:07:57 +01:00

MLRegAlloc

[MLGO] Remove extranous check lines from test input

2024-11-18 03:52:13 +00:00

MSP430

[M68k,MSP430,test] Change llc -march= to -mtriple=

2024-12-15 10:09:30 -08:00

NVPTX

[LLVM][NVPTX] Add support for griddepcontrol instruction (#123511 )

2025-01-24 09:33:16 +05:30

PowerPC

[PowerPC] Fix saving of Link Register when using ROP Protect (#123101 )

2025-01-22 13:44:20 -05:00

RISCV

[RISCV] Support cR Inline Asm Constraint (#124174 )

2025-01-23 16:19:19 -08:00

SPARC

[TargetLowering] Improve one signature of forceExpandWideMUL. (#123991 )

2025-01-23 12:49:35 -08:00

SPIRV

Revert "Reland "[HLSL] Implement the reflect HLSL function"" (#124046 )

2025-01-22 18:22:03 -08:00

SystemZ

[MachineSink] Extend loop sinking capability (#117247 )

2025-01-23 17:08:23 -08:00

Thumb

[TargetLowering] Improve one signature of forceExpandWideMUL. (#123991 )

2025-01-23 12:49:35 -08:00

Thumb2

Revert "[MachineLICM] Use RegisterClassInfo::getRegPressureSetLimit (#119826 )"

2025-01-10 09:05:06 +01:00

[VE,test] Change llc -march= to -mtriple=

2024-12-15 10:24:14 -08:00

WebAssembly

[WebAssembly] Add unreachable before catch destinations (#123915 )

2025-01-22 22:39:43 -08:00

WinCFGuard

…

WinEH

[WinEH] Take musttail calls into account when unlinking eh records (#119702 )

2024-12-13 09:16:52 +01:00

X86

[X86][AVX10.2-BF16] Update VCOMISBF16 intrinsics and instructions (#123307 )

2025-01-24 08:37:29 +08:00

XCore

[XCore,test] Change llc -march= to -mtriple=

2024-12-15 10:31:38 -08:00

Xtensa

[CodeGen] Clean up tests that depend on implicit .text in MCAsmStreamer

2024-12-22 21:11:32 -08:00