536 lines
22 KiB
C++
536 lines
22 KiB
C++
//===- AMDKernelCodeTUtils.cpp --------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file - utility functions to parse/print AMDGPUMCKernelCodeT structure
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//
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//===----------------------------------------------------------------------===//
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#include "AMDKernelCodeTUtils.h"
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#include "AMDKernelCodeT.h"
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#include "SIDefines.h"
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#include "Utils/AMDGPUBaseInfo.h"
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#include "Utils/SIDefinesUtils.h"
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#include "llvm/ADT/StringRef.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCParser/AsmLexer.h"
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#include "llvm/MC/MCParser/MCAsmParser.h"
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#include "llvm/MC/MCStreamer.h"
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#include "llvm/Support/MathExtras.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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using namespace llvm::AMDGPU;
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// Generates the following for AMDGPUMCKernelCodeT struct members:
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// - HasMemberXXXXX class
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// A check to see if AMDGPUMCKernelCodeT has a specific member so it can
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// determine which of the original amd_kernel_code_t members are duplicated
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// (if the names don't match, the table driven strategy won't work).
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// - IsMCExprXXXXX class
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// Check whether a AMDGPUMCKernelcodeT struct member is MCExpr-ified or not.
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// - GetMemberXXXXX class
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// A retrieval helper for said member (of type const MCExpr *&). Will return
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// a `Phony` const MCExpr * initialized to nullptr to preserve reference
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// returns.
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#define GEN_HAS_MEMBER(member) \
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class HasMember##member { \
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private: \
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struct KnownWithMember { \
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int member; \
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}; \
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class AmbiguousDerived : public AMDGPUMCKernelCodeT, \
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public KnownWithMember {}; \
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template <typename U> \
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static constexpr std::false_type Test(decltype(U::member) *); \
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template <typename U> static constexpr std::true_type Test(...); \
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\
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public: \
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static constexpr bool RESULT = \
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std::is_same_v<decltype(Test<AmbiguousDerived>(nullptr)), \
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std::true_type>; \
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}; \
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class IsMCExpr##member { \
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template <typename U, \
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typename std::enable_if_t< \
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HasMember##member::RESULT && \
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std::is_same_v<decltype(U::member), const MCExpr *>, \
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U> * = nullptr> \
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static constexpr std::true_type HasMCExprType(decltype(U::member) *); \
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template <typename U> static constexpr std::false_type HasMCExprType(...); \
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\
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public: \
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static constexpr bool RESULT = \
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std::is_same_v<decltype(HasMCExprType<AMDGPUMCKernelCodeT>(nullptr)), \
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std::true_type>; \
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}; \
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class GetMember##member { \
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public: \
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static const MCExpr *Phony; \
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template <typename U> static const MCExpr *&Get(U &C) { \
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if constexpr (IsMCExpr##member::RESULT) \
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return C.member; \
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else \
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return Phony; \
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} \
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}; \
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const MCExpr *GetMember##member::Phony = nullptr;
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// Cannot generate class declarations using the table driver approach (see table
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// in AMDKernelCodeTInfo.h). Luckily, if any are missing here or eventually
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// added to the table, an error should occur when trying to retrieve the table
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// in getMCExprIndexTable.
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GEN_HAS_MEMBER(amd_code_version_major)
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GEN_HAS_MEMBER(amd_code_version_minor)
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GEN_HAS_MEMBER(amd_machine_kind)
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GEN_HAS_MEMBER(amd_machine_version_major)
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GEN_HAS_MEMBER(amd_machine_version_minor)
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GEN_HAS_MEMBER(amd_machine_version_stepping)
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GEN_HAS_MEMBER(kernel_code_entry_byte_offset)
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GEN_HAS_MEMBER(kernel_code_prefetch_byte_size)
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GEN_HAS_MEMBER(granulated_workitem_vgpr_count)
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GEN_HAS_MEMBER(granulated_wavefront_sgpr_count)
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GEN_HAS_MEMBER(priority)
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GEN_HAS_MEMBER(float_mode)
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GEN_HAS_MEMBER(priv)
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GEN_HAS_MEMBER(enable_dx10_clamp)
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GEN_HAS_MEMBER(debug_mode)
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GEN_HAS_MEMBER(enable_ieee_mode)
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GEN_HAS_MEMBER(enable_wgp_mode)
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GEN_HAS_MEMBER(enable_mem_ordered)
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GEN_HAS_MEMBER(enable_fwd_progress)
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GEN_HAS_MEMBER(enable_sgpr_private_segment_wave_byte_offset)
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GEN_HAS_MEMBER(user_sgpr_count)
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GEN_HAS_MEMBER(enable_trap_handler)
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GEN_HAS_MEMBER(enable_sgpr_workgroup_id_x)
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GEN_HAS_MEMBER(enable_sgpr_workgroup_id_y)
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GEN_HAS_MEMBER(enable_sgpr_workgroup_id_z)
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GEN_HAS_MEMBER(enable_sgpr_workgroup_info)
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GEN_HAS_MEMBER(enable_vgpr_workitem_id)
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GEN_HAS_MEMBER(enable_exception_msb)
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GEN_HAS_MEMBER(granulated_lds_size)
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GEN_HAS_MEMBER(enable_exception)
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GEN_HAS_MEMBER(enable_sgpr_private_segment_buffer)
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GEN_HAS_MEMBER(enable_sgpr_dispatch_ptr)
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GEN_HAS_MEMBER(enable_sgpr_queue_ptr)
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GEN_HAS_MEMBER(enable_sgpr_kernarg_segment_ptr)
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GEN_HAS_MEMBER(enable_sgpr_dispatch_id)
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GEN_HAS_MEMBER(enable_sgpr_flat_scratch_init)
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GEN_HAS_MEMBER(enable_sgpr_private_segment_size)
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GEN_HAS_MEMBER(enable_sgpr_grid_workgroup_count_x)
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GEN_HAS_MEMBER(enable_sgpr_grid_workgroup_count_y)
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GEN_HAS_MEMBER(enable_sgpr_grid_workgroup_count_z)
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GEN_HAS_MEMBER(enable_wavefront_size32)
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GEN_HAS_MEMBER(enable_ordered_append_gds)
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GEN_HAS_MEMBER(private_element_size)
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GEN_HAS_MEMBER(is_ptr64)
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GEN_HAS_MEMBER(is_dynamic_callstack)
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GEN_HAS_MEMBER(is_debug_enabled)
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GEN_HAS_MEMBER(is_xnack_enabled)
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GEN_HAS_MEMBER(workitem_private_segment_byte_size)
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GEN_HAS_MEMBER(workgroup_group_segment_byte_size)
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GEN_HAS_MEMBER(gds_segment_byte_size)
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GEN_HAS_MEMBER(kernarg_segment_byte_size)
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GEN_HAS_MEMBER(workgroup_fbarrier_count)
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GEN_HAS_MEMBER(wavefront_sgpr_count)
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GEN_HAS_MEMBER(workitem_vgpr_count)
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GEN_HAS_MEMBER(reserved_vgpr_first)
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GEN_HAS_MEMBER(reserved_vgpr_count)
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GEN_HAS_MEMBER(reserved_sgpr_first)
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GEN_HAS_MEMBER(reserved_sgpr_count)
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GEN_HAS_MEMBER(debug_wavefront_private_segment_offset_sgpr)
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GEN_HAS_MEMBER(debug_private_segment_buffer_sgpr)
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GEN_HAS_MEMBER(kernarg_segment_alignment)
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GEN_HAS_MEMBER(group_segment_alignment)
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GEN_HAS_MEMBER(private_segment_alignment)
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GEN_HAS_MEMBER(wavefront_size)
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GEN_HAS_MEMBER(call_convention)
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GEN_HAS_MEMBER(runtime_loader_kernel_symbol)
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static ArrayRef<StringLiteral> get_amd_kernel_code_t_FldNames() {
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static constexpr StringLiteral const Table[] = {
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"", // not found placeholder
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#define RECORD(name, altName, print, parse) #name
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#include "Utils/AMDKernelCodeTInfo.h"
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#undef RECORD
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};
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return ArrayRef(Table);
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}
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static ArrayRef<StringLiteral> get_amd_kernel_code_t_FldAltNames() {
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static constexpr StringLiteral const Table[] = {
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"", // not found placeholder
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#define RECORD(name, altName, print, parse) #altName
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#include "Utils/AMDKernelCodeTInfo.h"
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#undef RECORD
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};
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return ArrayRef(Table);
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}
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static ArrayRef<bool> hasMCExprVersionTable() {
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static bool const Table[] = {
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#define RECORD(name, altName, print, parse) (IsMCExpr##name::RESULT)
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#include "Utils/AMDKernelCodeTInfo.h"
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#undef RECORD
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};
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return ArrayRef(Table);
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}
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using RetrieveFx = const MCExpr *&(*)(AMDGPUMCKernelCodeT &);
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static ArrayRef<RetrieveFx> getMCExprIndexTable() {
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static const RetrieveFx Table[] = {
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#define RECORD(name, altName, print, parse) GetMember##name::Get
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#include "Utils/AMDKernelCodeTInfo.h"
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#undef RECORD
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};
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return ArrayRef(Table);
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}
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static StringMap<int> createIndexMap(ArrayRef<StringLiteral> names,
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ArrayRef<StringLiteral> altNames) {
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StringMap<int> map;
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assert(names.size() == altNames.size());
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for (unsigned i = 0; i < names.size(); ++i) {
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map.insert(std::pair(names[i], i));
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map.insert(std::pair(altNames[i], i));
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}
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return map;
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}
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static int get_amd_kernel_code_t_FieldIndex(StringRef name) {
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static const auto map = createIndexMap(get_amd_kernel_code_t_FldNames(),
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get_amd_kernel_code_t_FldAltNames());
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return map.lookup(name) - 1; // returns -1 if not found
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}
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class PrintField {
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public:
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template <typename T, T AMDGPUMCKernelCodeT::*ptr>
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static void printField(StringRef Name, const AMDGPUMCKernelCodeT &C,
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raw_ostream &OS, MCContext &Ctx,
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AMDGPUMCKernelCodeT::PrintHelper Helper) {
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if constexpr (!std::is_integral_v<T>) {
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OS << Name << " = ";
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const MCExpr *Value = C.*ptr;
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Helper(Value, OS, Ctx.getAsmInfo());
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} else {
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OS << Name << " = " << (int)(C.*ptr);
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}
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}
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};
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template <typename T, T AMDGPUMCKernelCodeT::*ptr, int shift, int width = 1>
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static void printBitField(StringRef Name, const AMDGPUMCKernelCodeT &C,
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raw_ostream &OS, MCContext &,
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AMDGPUMCKernelCodeT::PrintHelper) {
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const auto Mask = (static_cast<T>(1) << width) - 1;
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OS << Name << " = " << (int)((C.*ptr >> shift) & Mask);
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}
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using PrintFx = void (*)(StringRef, const AMDGPUMCKernelCodeT &, raw_ostream &,
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MCContext &, AMDGPUMCKernelCodeT::PrintHelper Helper);
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static ArrayRef<PrintFx>
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getPrinterTable(AMDGPUMCKernelCodeT::PrintHelper Helper) {
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static const PrintFx Table[] = {
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#define COMPPGM1(name, aname, AccMacro) \
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COMPPGM(name, aname, C_00B848_##AccMacro, S_00B848_##AccMacro, 0)
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#define COMPPGM2(name, aname, AccMacro) \
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COMPPGM(name, aname, C_00B84C_##AccMacro, S_00B84C_##AccMacro, 32)
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#define PRINTFIELD(sname, aname, name) PrintField::printField<FLD_T(name)>
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#define PRINTCOMP(Complement, PGMType) \
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[](StringRef Name, const AMDGPUMCKernelCodeT &C, raw_ostream &OS, \
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MCContext &Ctx, AMDGPUMCKernelCodeT::PrintHelper Helper) { \
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OS << Name << " = "; \
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auto [Shift, Mask] = getShiftMask(Complement); \
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const MCExpr *Value; \
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if (PGMType == 0) { \
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Value = \
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maskShiftGet(C.compute_pgm_resource1_registers, Mask, Shift, Ctx); \
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} else { \
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Value = \
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maskShiftGet(C.compute_pgm_resource2_registers, Mask, Shift, Ctx); \
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} \
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Helper(Value, OS, Ctx.getAsmInfo()); \
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}
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#define RECORD(name, altName, print, parse) print
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#include "Utils/AMDKernelCodeTInfo.h"
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#undef RECORD
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};
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return ArrayRef(Table);
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}
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static bool expectAbsExpression(MCAsmParser &MCParser, int64_t &Value,
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raw_ostream &Err) {
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if (MCParser.getLexer().isNot(AsmToken::Equal)) {
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Err << "expected '='";
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return false;
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}
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MCParser.getLexer().Lex();
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if (MCParser.parseAbsoluteExpression(Value)) {
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Err << "integer absolute expression expected";
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return false;
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}
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return true;
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}
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template <typename T, T AMDGPUMCKernelCodeT::*ptr>
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static bool parseField(AMDGPUMCKernelCodeT &C, MCAsmParser &MCParser,
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raw_ostream &Err) {
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int64_t Value = 0;
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if (!expectAbsExpression(MCParser, Value, Err))
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return false;
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C.*ptr = (T)Value;
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return true;
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}
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template <typename T, T AMDGPUMCKernelCodeT::*ptr, int shift, int width = 1>
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static bool parseBitField(AMDGPUMCKernelCodeT &C, MCAsmParser &MCParser,
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raw_ostream &Err) {
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int64_t Value = 0;
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if (!expectAbsExpression(MCParser, Value, Err))
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return false;
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const uint64_t Mask = ((UINT64_C(1) << width) - 1) << shift;
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C.*ptr &= (T)~Mask;
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C.*ptr |= (T)((Value << shift) & Mask);
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return true;
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}
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static bool parseExpr(MCAsmParser &MCParser, const MCExpr *&Value,
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raw_ostream &Err) {
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if (MCParser.getLexer().isNot(AsmToken::Equal)) {
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Err << "expected '='";
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return false;
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}
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MCParser.getLexer().Lex();
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if (MCParser.parseExpression(Value)) {
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Err << "Could not parse expression";
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return false;
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}
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return true;
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}
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using ParseFx = bool (*)(AMDGPUMCKernelCodeT &, MCAsmParser &, raw_ostream &);
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static ArrayRef<ParseFx> getParserTable() {
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static const ParseFx Table[] = {
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#define COMPPGM1(name, aname, AccMacro) \
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COMPPGM(name, aname, G_00B848_##AccMacro, C_00B848_##AccMacro, 0)
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#define COMPPGM2(name, aname, AccMacro) \
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COMPPGM(name, aname, G_00B84C_##AccMacro, C_00B84C_##AccMacro, 32)
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#define PARSECOMP(Complement, PGMType) \
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[](AMDGPUMCKernelCodeT &C, MCAsmParser &MCParser, \
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raw_ostream &Err) -> bool { \
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MCContext &Ctx = MCParser.getContext(); \
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const MCExpr *Value; \
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if (!parseExpr(MCParser, Value, Err)) \
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return false; \
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auto [Shift, Mask] = getShiftMask(Complement); \
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Value = maskShiftSet(Value, Mask, Shift, Ctx); \
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const MCExpr *Compl = MCConstantExpr::create(Complement, Ctx); \
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if (PGMType == 0) { \
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C.compute_pgm_resource1_registers = MCBinaryExpr::createAnd( \
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C.compute_pgm_resource1_registers, Compl, Ctx); \
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C.compute_pgm_resource1_registers = MCBinaryExpr::createOr( \
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C.compute_pgm_resource1_registers, Value, Ctx); \
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} else { \
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C.compute_pgm_resource2_registers = MCBinaryExpr::createAnd( \
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C.compute_pgm_resource2_registers, Compl, Ctx); \
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C.compute_pgm_resource2_registers = MCBinaryExpr::createOr( \
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C.compute_pgm_resource2_registers, Value, Ctx); \
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} \
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return true; \
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}
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#define RECORD(name, altName, print, parse) parse
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#include "Utils/AMDKernelCodeTInfo.h"
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#undef RECORD
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};
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return ArrayRef(Table);
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}
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static void printAmdKernelCodeField(const AMDGPUMCKernelCodeT &C, int FldIndex,
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raw_ostream &OS, MCContext &Ctx,
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AMDGPUMCKernelCodeT::PrintHelper Helper) {
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auto Printer = getPrinterTable(Helper)[FldIndex];
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if (Printer)
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Printer(get_amd_kernel_code_t_FldNames()[FldIndex + 1], C, OS, Ctx, Helper);
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}
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void AMDGPUMCKernelCodeT::initDefault(const MCSubtargetInfo *STI,
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MCContext &Ctx, bool InitMCExpr) {
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AMDGPUMCKernelCodeT();
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AMDGPU::initDefaultAMDKernelCodeT(*this, STI);
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if (InitMCExpr) {
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const MCExpr *ZeroExpr = MCConstantExpr::create(0, Ctx);
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compute_pgm_resource1_registers =
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MCConstantExpr::create(Lo_32(compute_pgm_resource_registers), Ctx);
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compute_pgm_resource2_registers =
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MCConstantExpr::create(Hi_32(compute_pgm_resource_registers), Ctx);
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is_dynamic_callstack = ZeroExpr;
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wavefront_sgpr_count = ZeroExpr;
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workitem_vgpr_count = ZeroExpr;
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workitem_private_segment_byte_size = ZeroExpr;
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}
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}
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void AMDGPUMCKernelCodeT::validate(const MCSubtargetInfo *STI, MCContext &Ctx) {
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int64_t Value;
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if (!compute_pgm_resource1_registers->evaluateAsAbsolute(Value))
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return;
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if (G_00B848_DX10_CLAMP(Value) && AMDGPU::isGFX12Plus(*STI)) {
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Ctx.reportError({}, "enable_dx10_clamp=1 is not allowed on GFX12+");
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return;
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}
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if (G_00B848_IEEE_MODE(Value) && AMDGPU::isGFX12Plus(*STI)) {
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Ctx.reportError({}, "enable_ieee_mode=1 is not allowed on GFX12+");
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return;
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}
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if (G_00B848_WGP_MODE(Value) && !AMDGPU::isGFX10Plus(*STI)) {
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Ctx.reportError({}, "enable_wgp_mode=1 is only allowed on GFX10+");
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return;
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}
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if (G_00B848_MEM_ORDERED(Value) && !AMDGPU::isGFX10Plus(*STI)) {
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Ctx.reportError({}, "enable_mem_ordered=1 is only allowed on GFX10+");
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return;
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}
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if (G_00B848_FWD_PROGRESS(Value) && !AMDGPU::isGFX10Plus(*STI)) {
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Ctx.reportError({}, "enable_fwd_progress=1 is only allowed on GFX10+");
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return;
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}
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}
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const MCExpr *&AMDGPUMCKernelCodeT::getMCExprForIndex(int Index) {
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static const auto IndexTable = getMCExprIndexTable();
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return IndexTable[Index](*this);
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}
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bool AMDGPUMCKernelCodeT::ParseKernelCodeT(StringRef ID, MCAsmParser &MCParser,
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raw_ostream &Err) {
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const int Idx = get_amd_kernel_code_t_FieldIndex(ID);
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if (Idx < 0) {
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Err << "unexpected amd_kernel_code_t field name " << ID;
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return false;
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}
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if (hasMCExprVersionTable()[Idx]) {
|
|
const MCExpr *Value;
|
|
if (!parseExpr(MCParser, Value, Err))
|
|
return false;
|
|
getMCExprForIndex(Idx) = Value;
|
|
return true;
|
|
}
|
|
auto Parser = getParserTable()[Idx];
|
|
return Parser && Parser(*this, MCParser, Err);
|
|
}
|
|
|
|
void AMDGPUMCKernelCodeT::EmitKernelCodeT(raw_ostream &OS, MCContext &Ctx,
|
|
PrintHelper Helper) {
|
|
const int Size = hasMCExprVersionTable().size();
|
|
for (int i = 0; i < Size; ++i) {
|
|
OS << "\t\t";
|
|
if (hasMCExprVersionTable()[i]) {
|
|
OS << get_amd_kernel_code_t_FldNames()[i + 1] << " = ";
|
|
const MCExpr *Value = getMCExprForIndex(i);
|
|
Helper(Value, OS, Ctx.getAsmInfo());
|
|
} else {
|
|
printAmdKernelCodeField(*this, i, OS, Ctx, Helper);
|
|
}
|
|
OS << '\n';
|
|
}
|
|
}
|
|
|
|
void AMDGPUMCKernelCodeT::EmitKernelCodeT(MCStreamer &OS, MCContext &Ctx) {
|
|
OS.emitIntValue(amd_kernel_code_version_major, /*Size=*/4);
|
|
OS.emitIntValue(amd_kernel_code_version_minor, /*Size=*/4);
|
|
OS.emitIntValue(amd_machine_kind, /*Size=*/2);
|
|
OS.emitIntValue(amd_machine_version_major, /*Size=*/2);
|
|
OS.emitIntValue(amd_machine_version_minor, /*Size=*/2);
|
|
OS.emitIntValue(amd_machine_version_stepping, /*Size=*/2);
|
|
OS.emitIntValue(kernel_code_entry_byte_offset, /*Size=*/8);
|
|
OS.emitIntValue(kernel_code_prefetch_byte_offset, /*Size=*/8);
|
|
OS.emitIntValue(kernel_code_prefetch_byte_size, /*Size=*/8);
|
|
OS.emitIntValue(reserved0, /*Size=*/8);
|
|
|
|
if (compute_pgm_resource1_registers != nullptr)
|
|
OS.emitValue(compute_pgm_resource1_registers, /*Size=*/4);
|
|
else
|
|
OS.emitIntValue(Lo_32(compute_pgm_resource_registers),
|
|
/*Size=*/4);
|
|
|
|
if (compute_pgm_resource2_registers != nullptr)
|
|
OS.emitValue(compute_pgm_resource2_registers, /*Size=*/4);
|
|
else
|
|
OS.emitIntValue(Hi_32(compute_pgm_resource_registers),
|
|
/*Size=*/4);
|
|
|
|
if (is_dynamic_callstack != nullptr) {
|
|
const MCExpr *CodeProps = MCConstantExpr::create(code_properties, Ctx);
|
|
CodeProps = MCBinaryExpr::createOr(
|
|
CodeProps,
|
|
maskShiftSet(is_dynamic_callstack,
|
|
(1 << AMD_CODE_PROPERTY_IS_DYNAMIC_CALLSTACK_WIDTH) - 1,
|
|
AMD_CODE_PROPERTY_IS_DYNAMIC_CALLSTACK_SHIFT, Ctx),
|
|
Ctx);
|
|
OS.emitValue(CodeProps, /*Size=*/4);
|
|
} else
|
|
OS.emitIntValue(code_properties, /*Size=*/4);
|
|
|
|
if (workitem_private_segment_byte_size != nullptr)
|
|
OS.emitValue(workitem_private_segment_byte_size, /*Size=*/4);
|
|
else
|
|
OS.emitIntValue(0, /*Size=*/4);
|
|
|
|
OS.emitIntValue(workgroup_group_segment_byte_size, /*Size=*/4);
|
|
OS.emitIntValue(gds_segment_byte_size, /*Size=*/4);
|
|
OS.emitIntValue(kernarg_segment_byte_size, /*Size=*/8);
|
|
OS.emitIntValue(workgroup_fbarrier_count, /*Size=*/4);
|
|
|
|
if (wavefront_sgpr_count != nullptr)
|
|
OS.emitValue(wavefront_sgpr_count, /*Size=*/2);
|
|
else
|
|
OS.emitIntValue(0, /*Size=*/2);
|
|
|
|
if (workitem_vgpr_count != nullptr)
|
|
OS.emitValue(workitem_vgpr_count, /*Size=*/2);
|
|
else
|
|
OS.emitIntValue(0, /*Size=*/2);
|
|
|
|
OS.emitIntValue(reserved_vgpr_first, /*Size=*/2);
|
|
OS.emitIntValue(reserved_vgpr_count, /*Size=*/2);
|
|
OS.emitIntValue(reserved_sgpr_first, /*Size=*/2);
|
|
OS.emitIntValue(reserved_sgpr_count, /*Size=*/2);
|
|
OS.emitIntValue(debug_wavefront_private_segment_offset_sgpr,
|
|
/*Size=*/2);
|
|
OS.emitIntValue(debug_private_segment_buffer_sgpr, /*Size=*/2);
|
|
OS.emitIntValue(kernarg_segment_alignment, /*Size=*/1);
|
|
OS.emitIntValue(group_segment_alignment, /*Size=*/1);
|
|
OS.emitIntValue(private_segment_alignment, /*Size=*/1);
|
|
OS.emitIntValue(wavefront_size, /*Size=*/1);
|
|
|
|
OS.emitIntValue(call_convention, /*Size=*/4);
|
|
OS.emitBytes(StringRef((const char *)reserved3, /*Size=*/12));
|
|
OS.emitIntValue(runtime_loader_kernel_symbol, /*Size=*/8);
|
|
OS.emitBytes(StringRef((const char *)control_directives, /*Size=*/16 * 8));
|
|
}
|