cc5a1b3dd9
MIR support is totally unusable for AMDGPU without this, since the set of reserved registers is set from fields here. Add a clone method to MachineFunctionInfo. This is a subtle variant of the copy constructor that is required if there are any MIR constructs that use pointers. Specifically, at minimum fields that reference MachineBasicBlocks or the MachineFunction need to be adjusted to the values in the new function.
87 lines
3.2 KiB
C++
87 lines
3.2 KiB
C++
//===-- XCoreMachineFunctionInfo.cpp - XCore machine function info --------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "XCoreMachineFunctionInfo.h"
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#include "XCoreInstrInfo.h"
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#include "llvm/CodeGen/TargetSubtargetInfo.h"
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#include "llvm/IR/Function.h"
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using namespace llvm;
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void XCoreFunctionInfo::anchor() { }
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MachineFunctionInfo *XCoreFunctionInfo::clone(
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BumpPtrAllocator &Allocator, MachineFunction &DestMF,
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const DenseMap<MachineBasicBlock *, MachineBasicBlock *> &Src2DstMBB)
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const {
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return DestMF.cloneInfo<XCoreFunctionInfo>(*this);
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}
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bool XCoreFunctionInfo::isLargeFrame(const MachineFunction &MF) const {
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if (CachedEStackSize == -1) {
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CachedEStackSize = MF.getFrameInfo().estimateStackSize(MF);
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}
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// isLargeFrame() is used when deciding if spill slots should be added to
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// allow eliminateFrameIndex() to scavenge registers.
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// This is only required when there is no FP and offsets are greater than
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// ~256KB (~64Kwords). Thus only for code run on the emulator!
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//
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// The arbitrary value of 0xf000 allows frames of up to ~240KB before spill
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// slots are added for the use of eliminateFrameIndex() register scavenging.
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// For frames less than 240KB, it is assumed that there will be less than
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// 16KB of function arguments.
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return CachedEStackSize > 0xf000;
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}
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int XCoreFunctionInfo::createLRSpillSlot(MachineFunction &MF) {
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if (LRSpillSlotSet) {
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return LRSpillSlot;
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}
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const TargetRegisterClass &RC = XCore::GRRegsRegClass;
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const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
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MachineFrameInfo &MFI = MF.getFrameInfo();
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if (! MF.getFunction().isVarArg()) {
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// A fixed offset of 0 allows us to save / restore LR using entsp / retsp.
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LRSpillSlot = MFI.CreateFixedObject(TRI.getSpillSize(RC), 0, true);
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} else {
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LRSpillSlot = MFI.CreateStackObject(TRI.getSpillSize(RC),
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TRI.getSpillAlign(RC), true);
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}
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LRSpillSlotSet = true;
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return LRSpillSlot;
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}
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int XCoreFunctionInfo::createFPSpillSlot(MachineFunction &MF) {
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if (FPSpillSlotSet) {
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return FPSpillSlot;
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}
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const TargetRegisterClass &RC = XCore::GRRegsRegClass;
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const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
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MachineFrameInfo &MFI = MF.getFrameInfo();
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FPSpillSlot =
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MFI.CreateStackObject(TRI.getSpillSize(RC), TRI.getSpillAlign(RC), true);
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FPSpillSlotSet = true;
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return FPSpillSlot;
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}
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const int* XCoreFunctionInfo::createEHSpillSlot(MachineFunction &MF) {
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if (EHSpillSlotSet) {
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return EHSpillSlot;
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}
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const TargetRegisterClass &RC = XCore::GRRegsRegClass;
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const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
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MachineFrameInfo &MFI = MF.getFrameInfo();
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unsigned Size = TRI.getSpillSize(RC);
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Align Alignment = TRI.getSpillAlign(RC);
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EHSpillSlot[0] = MFI.CreateStackObject(Size, Alignment, true);
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EHSpillSlot[1] = MFI.CreateStackObject(Size, Alignment, true);
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EHSpillSlotSet = true;
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return EHSpillSlot;
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}
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