Andrew Savonichev 292da93d59 [MCA] Disable RCU for InOrderIssueStage ...

This is a follow-up for:
D98604 [MCA] Ensure that writes occur in-order

When instructions are aligned by the order of writes, they retire
in-order naturally. There is no need for an RCU, so it is disabled.

Differential Revision: https://reviews.llvm.org/D98628

2021-03-24 13:54:04 +03:00

..

BottleneckAnalysis.cpp

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BottleneckAnalysis.h

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DispatchStatistics.cpp

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DispatchStatistics.h

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InstructionInfoView.cpp

[NFC][llvm-mca] Fix compiler warning

2021-02-04 09:44:36 -08:00

InstructionInfoView.h

[llvm-mca] Addressing build failures due to missing override specifiers

2021-01-21 17:32:18 -08:00

InstructionView.cpp

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InstructionView.h

[llvm-mca] Forgot a couple of override specifiers.

2021-01-21 15:44:14 -08:00

RegisterFileStatistics.cpp

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RegisterFileStatistics.h

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ResourcePressureView.cpp

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ResourcePressureView.h

[llvm-mca] Addressing build failures due to missing override specifiers

2021-01-21 17:32:18 -08:00

RetireControlUnitStatistics.cpp

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RetireControlUnitStatistics.h

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SchedulerStatistics.cpp

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SchedulerStatistics.h

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SummaryView.cpp

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SummaryView.h

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TimelineView.cpp

[MCA] Disable RCU for InOrderIssueStage

2021-03-24 13:54:04 +03:00

TimelineView.h

[llvm-mca] Addressing build failures due to missing override specifiers

2021-01-21 17:32:18 -08:00

View.cpp

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View.h

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