Extension of https://reviews.llvm.org/D141101 to even further reduce the amount of implicit operands we attach. The main benefit is to improve cability of post-ra scheduler, and reduce unneeded dependency resolution (e.g. inserting snops). Unfortunately, we run into regressions if we completely minimize the amount implicit operands (naively), we run into some regressions (e.g. dual_movs are replaced with multiple calls to v_mov). This is even more reason to switch to LiveRegUnits. Nonetheless, this patch removes the operands which we can for free (more or less). Change-Id: Ib4f409202b36bdbc59eed615bc2d19fa8bd8c057 Differential Revision: https://reviews.llvm.org/D141557 Change-Id: I8b039e3c0d39436b384083f8beb947ee1b1730b2
122 lines
5.4 KiB
YAML
122 lines
5.4 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
|
|
# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=regallocfast -o - %s | FileCheck -check-prefix=SPILLED %s
|
|
# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=regallocfast,si-lower-sgpr-spills -o - %s | FileCheck -check-prefix=EXPANDED %s
|
|
|
|
# Make sure spill/restore of 192 bit registers works. We have to
|
|
# settle for a MIR test for now since inlineasm fails without 192-bit
|
|
# MVT.
|
|
|
|
---
|
|
name: spill_restore_sgpr192
|
|
tracksRegLiveness: true
|
|
machineFunctionInfo:
|
|
scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3
|
|
stackPtrOffsetReg: $sgpr32
|
|
body: |
|
|
; SPILLED-LABEL: name: spill_restore_sgpr192
|
|
; SPILLED: bb.0:
|
|
; SPILLED-NEXT: successors: %bb.1(0x80000000)
|
|
; SPILLED-NEXT: {{ $}}
|
|
; SPILLED-NEXT: S_NOP 0, implicit-def renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9
|
|
; SPILLED-NEXT: SI_SPILL_S192_SAVE killed $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9, %stack.0, implicit $exec, implicit $sgpr32 :: (store (s192) into %stack.0, align 4, addrspace 5)
|
|
; SPILLED-NEXT: S_CBRANCH_SCC1 %bb.1, implicit undef $scc
|
|
; SPILLED-NEXT: {{ $}}
|
|
; SPILLED-NEXT: bb.1:
|
|
; SPILLED-NEXT: successors: %bb.2(0x80000000)
|
|
; SPILLED-NEXT: {{ $}}
|
|
; SPILLED-NEXT: S_NOP 1
|
|
; SPILLED-NEXT: {{ $}}
|
|
; SPILLED-NEXT: bb.2:
|
|
; SPILLED-NEXT: $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9 = SI_SPILL_S192_RESTORE %stack.0, implicit $exec, implicit $sgpr32 :: (load (s192) from %stack.0, align 4, addrspace 5)
|
|
; SPILLED-NEXT: S_NOP 0, implicit killed renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9
|
|
; EXPANDED-LABEL: name: spill_restore_sgpr192
|
|
; EXPANDED: bb.0:
|
|
; EXPANDED-NEXT: successors: %bb.1(0x80000000)
|
|
; EXPANDED-NEXT: liveins: $vgpr0
|
|
; EXPANDED-NEXT: {{ $}}
|
|
; EXPANDED-NEXT: S_NOP 0, implicit-def renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9
|
|
; EXPANDED-NEXT: $vgpr0 = V_WRITELANE_B32 $sgpr4, 0, $vgpr0, implicit-def $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9, implicit $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9
|
|
; EXPANDED-NEXT: $vgpr0 = V_WRITELANE_B32 $sgpr5, 1, $vgpr0
|
|
; EXPANDED-NEXT: $vgpr0 = V_WRITELANE_B32 $sgpr6, 2, $vgpr0
|
|
; EXPANDED-NEXT: $vgpr0 = V_WRITELANE_B32 $sgpr7, 3, $vgpr0
|
|
; EXPANDED-NEXT: $vgpr0 = V_WRITELANE_B32 $sgpr8, 4, $vgpr0
|
|
; EXPANDED-NEXT: $vgpr0 = V_WRITELANE_B32 killed $sgpr9, 5, $vgpr0, implicit killed $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9
|
|
; EXPANDED-NEXT: S_CBRANCH_SCC1 %bb.1, implicit undef $scc
|
|
; EXPANDED-NEXT: {{ $}}
|
|
; EXPANDED-NEXT: bb.1:
|
|
; EXPANDED-NEXT: successors: %bb.2(0x80000000)
|
|
; EXPANDED-NEXT: liveins: $vgpr0
|
|
; EXPANDED-NEXT: {{ $}}
|
|
; EXPANDED-NEXT: S_NOP 1
|
|
; EXPANDED-NEXT: {{ $}}
|
|
; EXPANDED-NEXT: bb.2:
|
|
; EXPANDED-NEXT: liveins: $vgpr0
|
|
; EXPANDED-NEXT: {{ $}}
|
|
; EXPANDED-NEXT: $sgpr4 = V_READLANE_B32 $vgpr0, 0, implicit-def $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9
|
|
; EXPANDED-NEXT: $sgpr5 = V_READLANE_B32 $vgpr0, 1
|
|
; EXPANDED-NEXT: $sgpr6 = V_READLANE_B32 $vgpr0, 2
|
|
; EXPANDED-NEXT: $sgpr7 = V_READLANE_B32 $vgpr0, 3
|
|
; EXPANDED-NEXT: $sgpr8 = V_READLANE_B32 $vgpr0, 4
|
|
; EXPANDED-NEXT: $sgpr9 = V_READLANE_B32 $vgpr0, 5
|
|
; EXPANDED-NEXT: S_NOP 0, implicit killed renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9
|
|
bb.0:
|
|
S_NOP 0, implicit-def %0:sgpr_192
|
|
S_CBRANCH_SCC1 implicit undef $scc, %bb.1
|
|
|
|
bb.1:
|
|
S_NOP 1
|
|
|
|
bb.2:
|
|
S_NOP 0, implicit %0
|
|
...
|
|
|
|
---
|
|
name: spill_restore_vgpr192
|
|
tracksRegLiveness: true
|
|
machineFunctionInfo:
|
|
scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3
|
|
stackPtrOffsetReg: $sgpr32
|
|
body: |
|
|
; SPILLED-LABEL: name: spill_restore_vgpr192
|
|
; SPILLED: bb.0:
|
|
; SPILLED-NEXT: successors: %bb.1(0x80000000)
|
|
; SPILLED-NEXT: {{ $}}
|
|
; SPILLED-NEXT: S_NOP 0, implicit-def renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5
|
|
; SPILLED-NEXT: SI_SPILL_V192_SAVE killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5, %stack.0, $sgpr32, 0, implicit $exec :: (store (s192) into %stack.0, align 4, addrspace 5)
|
|
; SPILLED-NEXT: S_CBRANCH_SCC1 %bb.1, implicit undef $scc
|
|
; SPILLED-NEXT: {{ $}}
|
|
; SPILLED-NEXT: bb.1:
|
|
; SPILLED-NEXT: successors: %bb.2(0x80000000)
|
|
; SPILLED-NEXT: {{ $}}
|
|
; SPILLED-NEXT: S_NOP 1
|
|
; SPILLED-NEXT: {{ $}}
|
|
; SPILLED-NEXT: bb.2:
|
|
; SPILLED-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = SI_SPILL_V192_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s192) from %stack.0, align 4, addrspace 5)
|
|
; SPILLED-NEXT: S_NOP 0, implicit killed renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5
|
|
; EXPANDED-LABEL: name: spill_restore_vgpr192
|
|
; EXPANDED: bb.0:
|
|
; EXPANDED-NEXT: successors: %bb.1(0x80000000)
|
|
; EXPANDED-NEXT: {{ $}}
|
|
; EXPANDED-NEXT: S_NOP 0, implicit-def renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5
|
|
; EXPANDED-NEXT: SI_SPILL_V192_SAVE killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5, %stack.0, $sgpr32, 0, implicit $exec :: (store (s192) into %stack.0, align 4, addrspace 5)
|
|
; EXPANDED-NEXT: S_CBRANCH_SCC1 %bb.1, implicit undef $scc
|
|
; EXPANDED-NEXT: {{ $}}
|
|
; EXPANDED-NEXT: bb.1:
|
|
; EXPANDED-NEXT: successors: %bb.2(0x80000000)
|
|
; EXPANDED-NEXT: {{ $}}
|
|
; EXPANDED-NEXT: S_NOP 1
|
|
; EXPANDED-NEXT: {{ $}}
|
|
; EXPANDED-NEXT: bb.2:
|
|
; EXPANDED-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = SI_SPILL_V192_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s192) from %stack.0, align 4, addrspace 5)
|
|
; EXPANDED-NEXT: S_NOP 0, implicit killed renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5
|
|
bb.0:
|
|
S_NOP 0, implicit-def %0:vreg_192
|
|
S_CBRANCH_SCC1 implicit undef $scc, %bb.1
|
|
|
|
bb.1:
|
|
S_NOP 1
|
|
|
|
bb.2:
|
|
S_NOP 0, implicit %0
|
|
...
|