652 lines
26 KiB
C++
652 lines
26 KiB
C++
//===- GPUTransformOps.cpp - Implementation of GPU transform ops ----------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Dialect/GPU/TransformOps/GPUTransformOps.h"
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#include "mlir/Dialect/Arith/IR/Arith.h"
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#include "mlir/Dialect/GPU/IR/GPUDialect.h"
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#include "mlir/Dialect/GPU/TransformOps/GPUTransformOps.h"
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#include "mlir/Dialect/PDL/IR/PDL.h"
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#include "mlir/Dialect/SCF/IR/DeviceMappingInterface.h"
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#include "mlir/Dialect/SCF/IR/SCF.h"
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#include "mlir/Dialect/Transform/IR/TransformDialect.h"
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#include "mlir/Dialect/Transform/IR/TransformInterfaces.h"
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#include "mlir/IR/IRMapping.h"
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#include "mlir/IR/OpDefinition.h"
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#include "mlir/Support/LLVM.h"
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using namespace mlir;
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using namespace mlir::gpu;
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using namespace mlir::transform;
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namespace {
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/// Helper type forfunctions that generate ids for the mapping of a scf.forall.
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using IdGeneratorFnType = llvm::function_ref<void(RewriterBase &, scf::ForallOp,
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SmallVectorImpl<Value> &)>;
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struct MappingToGpuHelper {
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MappingToGpuHelper(SmallVector<DeviceMappingAttrInterface> mappingAttributes,
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IdGeneratorFnType idGenerator)
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: mappingAttributes(mappingAttributes), idGenerator(idGenerator) {}
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SmallVector<DeviceMappingAttrInterface> mappingAttributes;
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IdGeneratorFnType idGenerator;
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};
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struct MappingToGpuBlocksHelper : public MappingToGpuHelper {
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MappingToGpuBlocksHelper(MLIRContext *ctx)
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: MappingToGpuHelper(
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SmallVector<DeviceMappingAttrInterface>{
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GPUBlockMappingAttr::get(ctx, Blocks::DimX),
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GPUBlockMappingAttr::get(ctx, Blocks::DimY),
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GPUBlockMappingAttr::get(ctx, Blocks::DimZ)},
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IdGeneratorFnType{[](RewriterBase &rewriter, scf::ForallOp forallOp,
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SmallVectorImpl<Value> &ids) {
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OpBuilder::InsertionGuard guard(rewriter);
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rewriter.setInsertionPoint(forallOp);
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IndexType indexType = rewriter.getIndexType();
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auto loc = forallOp->getLoc();
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ids.assign(
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{rewriter.create<BlockIdOp>(loc, indexType, Dimension::x),
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rewriter.create<BlockIdOp>(loc, indexType, Dimension::y),
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rewriter.create<BlockIdOp>(loc, indexType, Dimension::z)});
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}}) {}
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};
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struct MappingToGpuThreadsHelper : public MappingToGpuHelper {
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MappingToGpuThreadsHelper(MLIRContext *ctx)
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: MappingToGpuHelper(
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SmallVector<DeviceMappingAttrInterface>{
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GPUThreadMappingAttr::get(ctx, Threads::DimX),
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GPUThreadMappingAttr::get(ctx, Threads::DimY),
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GPUThreadMappingAttr::get(ctx, Threads::DimZ)},
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IdGeneratorFnType{[](RewriterBase &rewriter, scf::ForallOp forallOp,
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SmallVectorImpl<Value> &ids) {
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OpBuilder::InsertionGuard guard(rewriter);
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rewriter.setInsertionPoint(forallOp);
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IndexType indexType = rewriter.getIndexType();
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auto loc = forallOp->getLoc();
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ids.assign(
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{rewriter.create<ThreadIdOp>(loc, indexType, Dimension::x),
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rewriter.create<ThreadIdOp>(loc, indexType, Dimension::y),
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rewriter.create<ThreadIdOp>(loc, indexType, Dimension::z)});
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}}) {}
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};
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} // namespace
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static DiagnosedSilenceableFailure
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failureHelper(std::optional<TransformOpInterface> transformOp,
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scf::ForallOp forallOp, const Twine &message) {
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if (transformOp.has_value())
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return transformOp->emitSilenceableError() << message;
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return emitDefiniteFailure(forallOp, message);
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}
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/// Check if given mapping attributes are one of the desired attributes
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static DiagnosedSilenceableFailure
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checkMappingAttributeTypes(std::optional<TransformOpInterface> transformOp,
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scf::ForallOp forallOp) {
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if (!forallOp.getMapping().has_value())
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return failureHelper(transformOp, forallOp, "mapping must be present");
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bool hasBlockMapping =
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llvm::any_of(forallOp.getMapping().value(), [](Attribute attr) {
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return attr.isa<GPUBlockMappingAttr>();
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});
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bool hasThreadMapping =
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llvm::any_of(forallOp.getMapping().value(), [](Attribute attr) {
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return attr.isa<GPUThreadMappingAttr>();
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});
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int64_t countMappingTypes = 0;
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countMappingTypes += hasBlockMapping ? 1 : 0;
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countMappingTypes += hasThreadMapping ? 1 : 0;
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if (countMappingTypes > 1) {
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return failureHelper(transformOp, forallOp,
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"cannot mix different mapping types, use nesting");
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}
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DenseSet<Attribute> seen;
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for (Attribute map : forallOp.getMapping()->getValue()) {
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if (llvm::is_contained(seen, map)) {
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return failureHelper(transformOp, forallOp,
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"duplicated attribute, cannot map different loops "
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"to the same processor");
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}
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seen.insert(map);
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}
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return DiagnosedSilenceableFailure::success();
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}
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static DiagnosedSilenceableFailure
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verifyGpuMapping(std::optional<TransformOpInterface> transformOp,
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scf::ForallOp forallOp) {
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// Check the types of the mapping attributes match.
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DiagnosedSilenceableFailure typeRes =
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checkMappingAttributeTypes(transformOp, forallOp);
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if (!typeRes.succeeded())
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return typeRes;
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// Perform other non-types verifications.
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if (!forallOp.isNormalized())
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return failureHelper(transformOp, forallOp,
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"unsupported non-normalized loops");
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if (forallOp.getNumResults() > 0)
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return failureHelper(transformOp, forallOp,
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"only bufferized scf.forall can be mapped");
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if (forallOp.getRank() > 3)
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return failureHelper(transformOp, forallOp,
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"scf.forall with rank > 3 does not lower");
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if (llvm::any_of(forallOp.getMixedUpperBound(), [&](OpFoldResult ofr) {
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return !getConstantIntValue(ofr).has_value();
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})) {
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return failureHelper(transformOp, forallOp,
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"unsupported dynamic sizes in forall op");
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}
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return DiagnosedSilenceableFailure::success();
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}
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/// Determines if the size of the kernel configuration is supported by the GPU
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/// architecture being used. It presently makes use of CUDA limitations, however
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/// that aspect may be enhanced for other GPUs.
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static DiagnosedSilenceableFailure checkGpuLimits(
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TransformOpInterface transformOp, std::optional<int64_t> gridDimX,
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std::optional<int64_t> gridDimY, std::optional<int64_t> gridDimZ,
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std::optional<int64_t> blockDimX, std::optional<int64_t> blockDimY,
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std::optional<int64_t> blockDimZ) {
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static constexpr int maxTotalBlockdim = 1024;
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static constexpr int maxBlockdimx = 1024;
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static constexpr int maxBlockdimy = 1024;
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static constexpr int maxBlockdimz = 64;
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static constexpr int maxTotalGriddim = 2147483647;
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static constexpr int maxGriddimx = 2147483647;
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static constexpr int maxGriddimy = 65535;
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static constexpr int maxGriddimz = 65535;
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if ((blockDimX.value_or(1) * blockDimY.value_or(1) * blockDimZ.value_or(1)) >
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maxTotalBlockdim ||
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(gridDimX.value_or(1) * gridDimY.value_or(1) * gridDimZ.value_or(1)) >
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maxTotalGriddim ||
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blockDimX.value_or(1) > maxBlockdimx ||
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blockDimY.value_or(1) > maxBlockdimy ||
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blockDimZ.value_or(1) > maxBlockdimz ||
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gridDimY.value_or(1) > maxGriddimy ||
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gridDimZ.value_or(1) > maxGriddimz ||
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gridDimX.value_or(1) > maxGriddimx) {
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return transformOp.emitSilenceableError()
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<< "Trying to launch a GPU kernel with gridDim = ("
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<< gridDimX.value_or(1) << ", " << gridDimY.value_or(1) << ", "
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<< gridDimZ.value_or(1) << ") blockDim = (" << blockDimX.value_or(1)
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<< ", " << blockDimY.value_or(1) << ", " << blockDimZ.value_or(1)
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<< "). It is larger than the limits.";
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}
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return DiagnosedSilenceableFailure::success();
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}
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/// Creates an empty-body gpu::LaunchOp using the provided kernel settings and
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/// put a terminator within.
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static DiagnosedSilenceableFailure
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createGpuLaunch(RewriterBase &rewriter, Location loc,
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TransformOpInterface transformOp, LaunchOp &launchOp,
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std::optional<int64_t> gridDimX = std::nullopt,
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std::optional<int64_t> gridDimY = std::nullopt,
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std::optional<int64_t> gridDimZ = std::nullopt,
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std::optional<int64_t> blockDimX = std::nullopt,
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std::optional<int64_t> blockDimY = std::nullopt,
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std::optional<int64_t> blockDimZ = std::nullopt) {
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DiagnosedSilenceableFailure diag =
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checkGpuLimits(transformOp, gridDimX, gridDimY, gridDimZ, blockDimX,
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blockDimY, blockDimZ);
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if (!diag.succeeded())
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return diag;
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auto createConst = [&](int dim) {
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return rewriter.create<arith::ConstantIndexOp>(loc, dim);
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};
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OpBuilder::InsertionGuard guard(rewriter);
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Value one = createConst(1);
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Value gridSizeX = gridDimX.has_value() ? createConst(gridDimX.value()) : one;
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Value gridSizeY = gridDimY.has_value() ? createConst(gridDimY.value()) : one;
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Value gridSizeZ = gridDimZ.has_value() ? createConst(gridDimZ.value()) : one;
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Value blkSizeX = blockDimX.has_value() ? createConst(blockDimX.value()) : one;
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Value blkSizeY = blockDimY.has_value() ? createConst(blockDimY.value()) : one;
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Value blkSizeZ = blockDimZ.has_value() ? createConst(blockDimZ.value()) : one;
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launchOp = rewriter.create<LaunchOp>(loc, gridSizeX, gridSizeY, gridSizeZ,
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blkSizeX, blkSizeY, blkSizeZ);
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rewriter.setInsertionPointToEnd(&launchOp.getBody().front());
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rewriter.create<TerminatorOp>(loc);
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return DiagnosedSilenceableFailure::success();
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}
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/// Alter kernel configuration of the given kernel.
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static DiagnosedSilenceableFailure
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alterGpuLaunch(IRRewriter &rewriter, LaunchOp gpuLaunch,
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TransformOpInterface transformOp,
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std::optional<int64_t> gridDimX = std::nullopt,
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std::optional<int64_t> gridDimY = std::nullopt,
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std::optional<int64_t> gridDimZ = std::nullopt,
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std::optional<int64_t> blockDimX = std::nullopt,
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std::optional<int64_t> blockDimY = std::nullopt,
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std::optional<int64_t> blockDimZ = std::nullopt) {
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DiagnosedSilenceableFailure diag =
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checkGpuLimits(transformOp, gridDimX, gridDimY, gridDimZ, blockDimX,
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blockDimY, blockDimZ);
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if (!diag.succeeded())
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return diag;
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KernelDim3 currentBlockdim = gpuLaunch.getBlockSizeOperandValues();
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OpBuilder::InsertionGuard guard(rewriter);
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rewriter.setInsertionPointAfterValue(currentBlockdim.x);
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auto createConstValue = [&](int dim) {
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return rewriter.create<arith::ConstantIndexOp>(currentBlockdim.x.getLoc(),
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dim);
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};
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if (gridDimX.has_value())
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gpuLaunch.getGridSizeXMutable().assign(createConstValue(gridDimX.value()));
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if (gridDimY.has_value())
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gpuLaunch.getGridSizeYMutable().assign(createConstValue(gridDimY.value()));
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if (gridDimZ.has_value())
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gpuLaunch.getGridSizeZMutable().assign(createConstValue(gridDimZ.value()));
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if (blockDimX.has_value())
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gpuLaunch.getBlockSizeXMutable().assign(
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createConstValue(blockDimX.value()));
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if (blockDimY.has_value())
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gpuLaunch.getBlockSizeYMutable().assign(
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createConstValue(blockDimY.value()));
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if (blockDimZ.has_value())
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gpuLaunch.getBlockSizeZMutable().assign(
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createConstValue(blockDimZ.value()));
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return DiagnosedSilenceableFailure::success();
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}
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//===----------------------------------------------------------------------===//
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// MapForallToBlocks
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//===----------------------------------------------------------------------===//
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DiagnosedSilenceableFailure mlir::transform::gpu::mapForallToBlocksImpl(
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RewriterBase &rewriter, scf::ForallOp forallOp,
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IdGeneratorFnType blockIdGenerator, SmallVectorImpl<int64_t> &gridDims,
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TransformOpInterface transformOp,
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const ArrayRef<DeviceMappingAttrInterface> &mappingAttributes) {
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// Step 0. GPU-specific verifications. There is no better place to anchor
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// those right now: the ForallOp is target-independent and the transform op
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// does not apply to individual ForallOp.
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DiagnosedSilenceableFailure diag = verifyGpuMapping(transformOp, forallOp);
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if (!diag.succeeded())
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return diag;
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SmallVector<Attribute> blockMapping =
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llvm::to_vector(forallOp.getMapping()->getValue());
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// Step 1. Complete the blockMapping to a full mapping (with 1s) if necessary.
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SmallVector<OpFoldResult> numBlocks = forallOp.getMixedUpperBound();
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// Ensure we have 3 block sizes, one for each id.
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for (auto attr : mappingAttributes) {
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if (!llvm::is_contained(blockMapping, attr)) {
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blockMapping.push_back(attr);
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numBlocks.push_back(rewriter.getIndexAttr(1));
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}
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}
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// Step 2. sort the values by the corresponding DeviceMappingAttrInterface.
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auto comparator = [&](DeviceMappingAttrInterface a,
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DeviceMappingAttrInterface b) -> bool {
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return a.getMappingId() < b.getMappingId();
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};
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SmallVector<OpFoldResult> gridDimValues =
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getValuesSortedByKey(blockMapping, numBlocks, comparator);
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gridDims =
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llvm::to_vector(llvm::map_range(gridDimValues, [](OpFoldResult ofr) {
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return getConstantIntValue(ofr).value();
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}));
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// Step 3. Generate the blockids using the provided generator and map the
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// induction variables to the newly created ops.
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SmallVector<Value> blockOps;
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blockIdGenerator(rewriter, forallOp, blockOps);
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IRMapping bvm;
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for (auto [blockIdx, blockDim] :
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llvm::zip(forallOp.getInductionVars(), blockMapping)) {
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bvm.map(blockIdx,
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blockOps[static_cast<int64_t>(
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blockDim.cast<DeviceMappingAttrInterface>().getMappingId())]);
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}
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// Step 4. Move the body of forallOp.
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// Erase the terminator first, it will not be used since we are on buffers.
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rewriter.eraseOp(forallOp.getTerminator());
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Block *targetBlock = forallOp->getBlock();
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Block::iterator insertionPoint = Block::iterator(forallOp);
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Block &sourceBlock = forallOp.getRegion().front();
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targetBlock->getOperations().splice(insertionPoint,
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sourceBlock.getOperations());
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// Step 5. RAUW thread indices to thread ops.
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for (Value loopIndex : forallOp.getInductionVars()) {
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Value blockIdx = bvm.lookup(loopIndex);
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rewriter.replaceAllUsesWith(loopIndex, blockIdx);
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}
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// Step 6. Erase old op.
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rewriter.eraseOp(forallOp);
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return DiagnosedSilenceableFailure::success();
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}
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DiagnosedSilenceableFailure
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mlir::transform::gpu::findTopLevelForallOp(Operation *target,
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scf::ForallOp &topLevelForallOp,
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TransformOpInterface transformOp) {
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auto walkResult = target->walk([&](scf::ForallOp forallOp) {
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if (forallOp->getParentOfType<scf::ForallOp>())
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return WalkResult::advance();
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if (topLevelForallOp)
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// TODO: Handle multiple forall if they are independent.
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return WalkResult::interrupt();
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topLevelForallOp = forallOp;
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return WalkResult::advance();
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});
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if (walkResult.wasInterrupted())
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return transformOp.emitSilenceableError()
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<< "could not find a unique topLevel scf.forall";
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return DiagnosedSilenceableFailure::success();
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}
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DiagnosedSilenceableFailure
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transform::MapForallToBlocks::applyToOne(Operation *target,
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ApplyToEachResultList &results,
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transform::TransformState &state) {
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LaunchOp gpuLaunch = dyn_cast<LaunchOp>(target);
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IRRewriter rewriter(getContext());
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auto transformOp = cast<TransformOpInterface>(getOperation());
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if (!getGenerateGpuLaunch() && !gpuLaunch) {
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DiagnosedSilenceableFailure diag =
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emitSilenceableError()
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<< "Given target is not gpu.launch, set `generate_gpu_launch` "
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"attribute";
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diag.attachNote(target->getLoc()) << "when applied to this payload op";
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return diag;
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}
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scf::ForallOp topLevelForallOp;
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DiagnosedSilenceableFailure diag = mlir::transform::gpu::findTopLevelForallOp(
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target, topLevelForallOp, transformOp);
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if (!diag.succeeded()) {
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diag.attachNote(target->getLoc()) << "when applied to this payload op";
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return diag;
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}
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SmallVector<int64_t> gridDim = extractFromI64ArrayAttr(getGridDim());
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if (!getGenerateGpuLaunch() && gridDim.size() != 3)
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return transformOp.emitDefiniteFailure("transform require size-3 mapping");
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OpBuilder::InsertionGuard guard(rewriter);
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rewriter.setInsertionPoint(topLevelForallOp);
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// Generate gpu launch here and move the forall inside
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if (getGenerateGpuLaunch()) {
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DiagnosedSilenceableFailure diag =
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createGpuLaunch(rewriter, target->getLoc(), transformOp, gpuLaunch);
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if (!diag.succeeded()) {
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return diag;
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}
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rewriter.setInsertionPointToStart(&gpuLaunch.getBody().front());
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Operation *newForallOp = rewriter.clone(*topLevelForallOp);
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rewriter.eraseOp(topLevelForallOp);
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topLevelForallOp = cast<scf::ForallOp>(newForallOp);
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}
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diag = verifyGpuMapping(transformOp, topLevelForallOp);
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if (!diag.succeeded())
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return diag;
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MappingToGpuBlocksHelper helper(getContext());
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diag = mlir::transform::gpu::mapForallToBlocksImpl(
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rewriter, topLevelForallOp, helper.idGenerator, gridDim, transformOp,
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helper.mappingAttributes);
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if (!diag.succeeded())
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return diag;
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diag = alterGpuLaunch(rewriter, gpuLaunch,
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cast<TransformOpInterface>(getOperation()), gridDim[0],
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gridDim[1], gridDim[2]);
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results.push_back(gpuLaunch);
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return diag;
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}
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//===----------------------------------------------------------------------===//
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// MapNestedForallToThreads
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//===----------------------------------------------------------------------===//
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static DiagnosedSilenceableFailure rewriteOneForallToGpuThreads(
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RewriterBase &rewriter, scf::ForallOp forallOp,
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const SmallVectorImpl<int64_t> &kernelBlockDims,
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const SmallVectorImpl<Value> &threadOps, bool syncAfterDistribute,
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std::optional<TransformOpInterface> transformOp,
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const ArrayRef<DeviceMappingAttrInterface> &mappingAttributes) {
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// Step 0. GPU-specific verifications. There is no better place to anchor
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// those right now: the ForallOp is target-independent and the transform op
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// does not apply to individual ForallOp.
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DiagnosedSilenceableFailure diag = verifyGpuMapping(transformOp, forallOp);
|
|
if (!diag.succeeded())
|
|
return diag;
|
|
|
|
Location loc = forallOp->getLoc();
|
|
|
|
SmallVector<Attribute> mapping =
|
|
llvm::to_vector(forallOp.getMapping()->getValue());
|
|
|
|
// Step 1. Complete the mapping to a full mapping (with 1s) if
|
|
// necessary.
|
|
SmallVector<OpFoldResult> numThreads = forallOp.getMixedUpperBound();
|
|
Attribute one = rewriter.getIndexAttr(1);
|
|
for (auto attr : mappingAttributes) {
|
|
if (std::find(mapping.begin(), mapping.end(), attr) == mapping.end()) {
|
|
mapping.push_back(attr);
|
|
numThreads.push_back(one);
|
|
}
|
|
}
|
|
|
|
// Step 2. sort the values by the corresponding DeviceMappingAttrInterface.
|
|
auto comparator = [&](DeviceMappingAttrInterface a,
|
|
DeviceMappingAttrInterface b) -> bool {
|
|
return a.getMappingId() < b.getMappingId();
|
|
};
|
|
SmallVector<OpFoldResult> blockDimValues =
|
|
getValuesSortedByKey(mapping, numThreads, comparator);
|
|
SmallVector<int64_t> blockDims =
|
|
llvm::to_vector(llvm::map_range(blockDimValues, [](OpFoldResult ofr) {
|
|
return getConstantIntValue(ofr).value();
|
|
}));
|
|
|
|
// Step 3. Create the gpu.thread ops and map the induction variables to the
|
|
// newly created ops.
|
|
// Replace ids of dimension size 1 by zero to simplify the IR.
|
|
// TODO
|
|
SmallVector<Value> threadOpsUpdated(threadOps.begin(), threadOps.end());
|
|
assert(threadOps.size() == kernelBlockDims.size());
|
|
Value zero = rewriter.create<arith::ConstantIndexOp>(loc, 0);
|
|
for (size_t i : llvm::seq(size_t(0), kernelBlockDims.size())) {
|
|
if (kernelBlockDims[i] == 1)
|
|
threadOpsUpdated[i] = zero;
|
|
}
|
|
IRMapping bvm;
|
|
for (auto [threadIdx, blockDim] :
|
|
llvm::zip(forallOp.getInductionVars(), mapping)) {
|
|
bvm.map(threadIdx,
|
|
threadOpsUpdated[blockDim.cast<DeviceMappingAttrInterface>()
|
|
.getMappingId()]);
|
|
}
|
|
|
|
// Step 4. Maybe create conditionals to predicate the region.
|
|
Value predicate;
|
|
for (auto [threadId, blockDim, globalBlockDim] :
|
|
llvm::zip(threadOpsUpdated, blockDims, kernelBlockDims)) {
|
|
if (blockDim > globalBlockDim) {
|
|
return failureHelper(
|
|
transformOp, forallOp,
|
|
"Trying to map to fewer GPU threads than loop iterations but "
|
|
"overprovisioning is not yet supported. "
|
|
"Try additional tiling of the before mapping or map to more "
|
|
"threads.");
|
|
}
|
|
if (blockDim == globalBlockDim)
|
|
continue;
|
|
Value threadIdx = rewriter.create<arith::ConstantIndexOp>(loc, blockDim);
|
|
Value tmpPredicate = rewriter.create<arith::CmpIOp>(
|
|
loc, arith::CmpIPredicate::ult, threadId, threadIdx);
|
|
predicate =
|
|
predicate ? rewriter.create<arith::AndIOp>(loc, predicate, tmpPredicate)
|
|
: tmpPredicate;
|
|
}
|
|
|
|
// Step 5. Move the body of forallOp.
|
|
// Erase the terminator first, it will not be used.
|
|
rewriter.eraseOp(forallOp.getTerminator());
|
|
Block *targetBlock;
|
|
Block::iterator insertionPoint;
|
|
if (predicate) {
|
|
// Step 5.a. If predicated, move at the beginning.
|
|
auto ifOp =
|
|
rewriter.create<scf::IfOp>(loc, predicate, /*withElseRegion=*/false);
|
|
targetBlock = ifOp.thenBlock();
|
|
insertionPoint = ifOp.thenBlock()->begin();
|
|
} else {
|
|
// Step 5.b. Otherwise, move inline just before forallOp.
|
|
targetBlock = forallOp->getBlock();
|
|
insertionPoint = Block::iterator(forallOp);
|
|
}
|
|
Block &sourceBlock = forallOp.getRegion().front();
|
|
targetBlock->getOperations().splice(insertionPoint,
|
|
sourceBlock.getOperations());
|
|
|
|
// Step 6. RAUW thread indices to thread ops.
|
|
for (Value loopIndex : forallOp.getInductionVars()) {
|
|
Value threadIdx = bvm.lookup(loopIndex);
|
|
rewriter.replaceAllUsesWith(loopIndex, threadIdx);
|
|
}
|
|
|
|
// Step 7. syncthreads.
|
|
// TODO: Need warpsync
|
|
if (syncAfterDistribute)
|
|
rewriter.create<BarrierOp>(loc);
|
|
|
|
// Step 8. Erase old op.
|
|
rewriter.eraseOp(forallOp);
|
|
|
|
return DiagnosedSilenceableFailure::success();
|
|
}
|
|
|
|
DiagnosedSilenceableFailure mlir::transform::gpu::mapNestedForallToThreadsImpl(
|
|
RewriterBase &rewriter, Operation *target,
|
|
const SmallVectorImpl<int64_t> &blockDim, IdGeneratorFnType idGenerator,
|
|
bool syncAfterDistribute, std::optional<TransformOpInterface> transformOp,
|
|
const ArrayRef<DeviceMappingAttrInterface> &mappingAttributes) {
|
|
DiagnosedSilenceableFailure diag = DiagnosedSilenceableFailure::success();
|
|
target->walk([&](scf::ForallOp forallOp) {
|
|
// Ignore cases with different attributes.
|
|
for (Attribute map : forallOp.getMapping()->getValue()) {
|
|
if (!llvm::is_contained(mappingAttributes, map)) {
|
|
return WalkResult::skip();
|
|
}
|
|
}
|
|
diag = verifyGpuMapping(transformOp, forallOp);
|
|
if (diag.succeeded()) {
|
|
rewriter.setInsertionPoint(forallOp);
|
|
SmallVector<Value> threadOps;
|
|
idGenerator(rewriter, forallOp, threadOps);
|
|
diag = rewriteOneForallToGpuThreads(rewriter, forallOp, blockDim,
|
|
threadOps, syncAfterDistribute,
|
|
transformOp, mappingAttributes);
|
|
}
|
|
return diag.succeeded() ? WalkResult::advance() : WalkResult::interrupt();
|
|
});
|
|
return diag;
|
|
}
|
|
|
|
DiagnosedSilenceableFailure transform::MapNestedForallToThreads::applyToOne(
|
|
Operation *target, ApplyToEachResultList &results, TransformState &state) {
|
|
LaunchOp gpuLaunch = dyn_cast<LaunchOp>(target);
|
|
auto transformOp = cast<TransformOpInterface>(getOperation());
|
|
|
|
// Basic high-level verifications.
|
|
if (!gpuLaunch)
|
|
return emitSilenceableError() << "Given target is not a gpu.launch";
|
|
|
|
SmallVector<int64_t> blockDim = extractFromI64ArrayAttr(getBlockDim());
|
|
if (blockDim.size() != 3)
|
|
return transformOp.emitDefiniteFailure("transform require size-3 mapping");
|
|
|
|
DiagnosedSilenceableFailure diag =
|
|
checkGpuLimits(transformOp, std::nullopt, std::nullopt, std::nullopt,
|
|
blockDim[0], blockDim[1], blockDim[2]);
|
|
if (diag.isSilenceableFailure()) {
|
|
diag.attachNote(getLoc()) << getBlockDimAttrName() << " is too large";
|
|
return diag;
|
|
}
|
|
|
|
MLIRContext *ctx = getContext();
|
|
IRRewriter rewriter(ctx);
|
|
rewriter.setInsertionPoint(target);
|
|
MappingToGpuThreadsHelper helper(ctx);
|
|
diag = mlir::transform::gpu::mapNestedForallToThreadsImpl(
|
|
rewriter, target, blockDim, helper.idGenerator, getSyncAfterDistribute(),
|
|
transformOp, helper.mappingAttributes);
|
|
|
|
if (!diag.succeeded())
|
|
return diag;
|
|
|
|
diag = alterGpuLaunch(rewriter, gpuLaunch, transformOp, std::nullopt,
|
|
std::nullopt, std::nullopt, blockDim[0], blockDim[1],
|
|
blockDim[2]);
|
|
|
|
results.push_back(gpuLaunch.getOperation());
|
|
return diag;
|
|
}
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// Transform op registration
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
namespace {
|
|
/// Registers new ops and declares PDL as dependent dialect since the
|
|
/// additional ops are using PDL types for operands and results.
|
|
class GPUTransformDialectExtension
|
|
: public transform::TransformDialectExtension<
|
|
GPUTransformDialectExtension> {
|
|
public:
|
|
GPUTransformDialectExtension() {
|
|
declareDependentDialect<pdl::PDLDialect>();
|
|
declareGeneratedDialect<scf::SCFDialect>();
|
|
declareGeneratedDialect<arith::ArithDialect>();
|
|
declareGeneratedDialect<GPUDialect>();
|
|
registerTransformOps<
|
|
#define GET_OP_LIST
|
|
#include "mlir/Dialect/GPU/TransformOps/GPUTransformOps.cpp.inc"
|
|
>();
|
|
}
|
|
};
|
|
} // namespace
|
|
|
|
#define GET_OP_CLASSES
|
|
#include "mlir/Dialect/GPU/TransformOps/GPUTransformOps.cpp.inc"
|
|
|
|
void mlir::gpu::registerTransformDialectExtension(DialectRegistry ®istry) {
|
|
registry.addExtensions<GPUTransformDialectExtension>();
|
|
}
|