b30422eac5
This revision updates the memcpy, memove, and memset intrinsics to implement the AliasAnalysis and AccessGroup interfaces. The changes will enable the import and export of alias scope, tbaa, and access group metadata attached to these intrinsics. It also renames the requiresAliasScope flag to requiresAliasAnalysis since the intrinsics also support tbaa and not only access scope metadata. The revision still maintains the string based attribute lookup in the translation from MLIR to LLVMIR. Using the interfaces instead of the string based lookup is left to a followup revision. Depends on D144851 Reviewed By: Dinistro Differential Revision: https://reviews.llvm.org/D144965
326 lines
10 KiB
LLVM
326 lines
10 KiB
LLVM
; RUN: mlir-translate -import-llvm -split-input-file %s | FileCheck %s
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; CHECK: llvm.metadata @__llvm_global_metadata {
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; CHECK: llvm.access_group @[[$GROUP0:.*]]
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; CHECK: llvm.access_group @[[$GROUP1:.*]]
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; CHECK: llvm.access_group @[[$GROUP2:.*]]
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; CHECK: llvm.access_group @[[$GROUP3:.*]]
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; CHECK: }
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; CHECK-LABEL: llvm.func @access_group
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define void @access_group(ptr %arg1) {
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; CHECK: access_groups = [@__llvm_global_metadata::@[[$GROUP0]], @__llvm_global_metadata::@[[$GROUP1]]]
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%1 = load i32, ptr %arg1, !llvm.access.group !0
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; CHECK: access_groups = [@__llvm_global_metadata::@[[$GROUP2]], @__llvm_global_metadata::@[[$GROUP0]]]
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%2 = load i32, ptr %arg1, !llvm.access.group !1
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; CHECK: access_groups = [@__llvm_global_metadata::@[[$GROUP3]]]
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%3 = load i32, ptr %arg1, !llvm.access.group !2
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ret void
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}
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!0 = !{!3, !4}
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!1 = !{!5, !3}
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!2 = distinct !{}
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!3 = distinct !{}
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!4 = distinct !{}
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!5 = distinct !{}
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; // -----
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; CHECK-LABEL: llvm.func @supported_ops
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define void @supported_ops(ptr %arg1, float %arg2, i32 %arg3, i32 %arg4) {
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; CHECK: llvm.load {{.*}}access_groups =
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%1 = load i32, ptr %arg1, !llvm.access.group !0
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; CHECK: llvm.store {{.*}}access_groups =
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store i32 %1, ptr %arg1, !llvm.access.group !0
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; CHECK: llvm.atomicrmw {{.*}}access_groups =
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%2 = atomicrmw fmax ptr %arg1, float %arg2 acquire, !llvm.access.group !0
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; CHECK: llvm.cmpxchg {{.*}}access_groups =
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%3 = cmpxchg ptr %arg1, i32 %arg3, i32 %arg4 monotonic seq_cst, !llvm.access.group !0
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; CHECK: "llvm.intr.memcpy"{{.*}}access_groups =
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call void @llvm.memcpy.p0.p0.i32(ptr %arg1, ptr %arg1, i32 4, i1 false), !llvm.access.group !0
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; CHECK: "llvm.intr.memset"{{.*}}access_groups =
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call void @llvm.memset.p0.i32(ptr %arg1, i8 42, i32 4, i1 false), !llvm.access.group !0
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ret void
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}
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declare void @llvm.memcpy.p0.p0.i32(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i32, i1 immarg)
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declare void @llvm.memset.p0.i32(ptr nocapture writeonly, i8, i32, i1 immarg)
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!0 = !{!1, !2}
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!1 = distinct !{}
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!2 = distinct !{}
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; // -----
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; CHECK: #[[$ANNOT_ATTR:.*]] = #llvm.loop_annotation<disableNonforced = true, mustProgress = true, isVectorized = true>
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; CHECK-LABEL: @simple
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define void @simple(i64 %n, ptr %A) {
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entry:
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; CHECK: llvm.br ^{{.*}} {loop_annotation = #[[$ANNOT_ATTR]]}
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br label %end, !llvm.loop !1
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end:
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ret void
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}
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!1 = distinct !{!1, !2, !3, !4}
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!2 = !{!"llvm.loop.disable_nonforced"}
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!3 = !{!"llvm.loop.mustprogress"}
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!4 = !{!"llvm.loop.isvectorized", i32 1}
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; // -----
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; CHECK-DAG: #[[FOLLOWUP:.*]] = #llvm.loop_annotation<disableNonforced = true>
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; CHECK-DAG: #[[VECTORIZE_ATTR:.*]] = #llvm.loop_vectorize<disable = false, predicateEnable = true, scalableEnable = false, width = 16 : i32, followupVectorized = #[[FOLLOWUP]], followupEpilogue = #[[FOLLOWUP]], followupAll = #[[FOLLOWUP]]>
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; CHECK-DAG: #[[$ANNOT_ATTR:.*]] = #llvm.loop_annotation<vectorize = #[[VECTORIZE_ATTR]]>
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; CHECK-LABEL: @vectorize
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define void @vectorize(i64 %n, ptr %A) {
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entry:
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; CHECK: llvm.br ^{{.*}} {loop_annotation = #[[$ANNOT_ATTR]]}
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br label %end, !llvm.loop !1
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end:
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ret void
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}
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!1 = distinct !{!1, !2, !3, !4, !5, !6, !7, !8}
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!2 = !{!"llvm.loop.vectorize.enable", i1 1}
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!3 = !{!"llvm.loop.vectorize.predicate.enable", i1 1}
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!4 = !{!"llvm.loop.vectorize.scalable.enable", i1 0}
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!5 = !{!"llvm.loop.vectorize.width", i32 16}
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!6 = !{!"llvm.loop.vectorize.followup_vectorized", !9}
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!7 = !{!"llvm.loop.vectorize.followup_epilogue", !9}
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!8 = !{!"llvm.loop.vectorize.followup_all", !9}
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!9 = distinct !{!9, !10}
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!10 = !{!"llvm.loop.disable_nonforced"}
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; // -----
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; CHECK-DAG: #[[INTERLEAVE_ATTR:.*]] = #llvm.loop_interleave<count = 8 : i32>
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; CHECK-DAG: #[[$ANNOT_ATTR:.*]] = #llvm.loop_annotation<interleave = #[[INTERLEAVE_ATTR]]>
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; CHECK-LABEL: @interleave
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define void @interleave(i64 %n, ptr %A) {
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entry:
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; CHECK: llvm.br ^{{.*}} {loop_annotation = #[[$ANNOT_ATTR]]}
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br label %end, !llvm.loop !1
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end:
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ret void
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}
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!1 = distinct !{!1, !2}
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!2 = !{!"llvm.loop.interleave.count", i32 8}
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; // -----
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; CHECK-DAG: #[[FOLLOWUP:.*]] = #llvm.loop_annotation<disableNonforced = true>
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; CHECK-DAG: #[[UNROLL_ATTR:.*]] = #llvm.loop_unroll<disable = false, count = 16 : i32, runtimeDisable = true, full = true, followupUnrolled = #[[FOLLOWUP]], followupRemainder = #[[FOLLOWUP]], followupAll = #[[FOLLOWUP]]>
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; CHECK-DAG: #[[$ANNOT_ATTR:.*]] = #llvm.loop_annotation<unroll = #[[UNROLL_ATTR]]>
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; CHECK-LABEL: @unroll
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define void @unroll(i64 %n, ptr %A) {
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entry:
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; CHECK: llvm.br ^{{.*}} {loop_annotation = #[[$ANNOT_ATTR]]}
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br label %end, !llvm.loop !1
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end:
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ret void
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}
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!1 = distinct !{!1, !2, !3, !4, !5, !6, !7, !8}
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!2 = !{!"llvm.loop.unroll.enable"}
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!3 = !{!"llvm.loop.unroll.count", i32 16}
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!4 = !{!"llvm.loop.unroll.runtime.disable"}
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!5 = !{!"llvm.loop.unroll.full"}
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!6 = !{!"llvm.loop.unroll.followup_unrolled", !9}
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!7 = !{!"llvm.loop.unroll.followup_remainder", !9}
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!8 = !{!"llvm.loop.unroll.followup_all", !9}
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!9 = distinct !{!9, !10}
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!10 = !{!"llvm.loop.disable_nonforced"}
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; // -----
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; CHECK-DAG: #[[UNROLL_ATTR:.*]] = #llvm.loop_unroll<disable = true>
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; CHECK-DAG: #[[$ANNOT_ATTR:.*]] = #llvm.loop_annotation<unroll = #[[UNROLL_ATTR]]>
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; CHECK-LABEL: @unroll_disable
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define void @unroll_disable(i64 %n, ptr %A) {
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entry:
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; CHECK: llvm.br ^{{.*}} {loop_annotation = #[[$ANNOT_ATTR]]}
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br label %end, !llvm.loop !1
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end:
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ret void
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}
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!1 = distinct !{!1, !2}
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!2 = !{!"llvm.loop.unroll.disable"}
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; // -----
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; CHECK-DAG: #[[FOLLOWUP:.*]] = #llvm.loop_annotation<disableNonforced = true>
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; CHECK-DAG: #[[UNROLL_AND_JAM_ATTR:.*]] = #llvm.loop_unroll_and_jam<disable = false, count = 32 : i32, followupOuter = #[[FOLLOWUP]], followupInner = #[[FOLLOWUP]], followupRemainderOuter = #[[FOLLOWUP]], followupRemainderInner = #[[FOLLOWUP]], followupAll = #[[FOLLOWUP]]>
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; CHECK-DAG: #[[$ANNOT_ATTR:.*]] = #llvm.loop_annotation<unrollAndJam = #[[UNROLL_AND_JAM_ATTR]]>
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; CHECK-LABEL: @unroll_and_jam
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define void @unroll_and_jam(i64 %n, ptr %A) {
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entry:
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; CHECK: llvm.br ^{{.*}} {loop_annotation = #[[$ANNOT_ATTR]]}
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br label %end, !llvm.loop !1
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end:
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ret void
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}
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!1 = distinct !{!1, !2, !3, !4, !5, !6, !7, !8}
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!2 = !{!"llvm.loop.unroll_and_jam.enable"}
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!3 = !{!"llvm.loop.unroll_and_jam.count", i32 32}
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!4 = !{!"llvm.loop.unroll_and_jam.followup_outer", !9}
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!5 = !{!"llvm.loop.unroll_and_jam.followup_inner", !9}
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!6 = !{!"llvm.loop.unroll_and_jam.followup_remainder_outer", !9}
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!7 = !{!"llvm.loop.unroll_and_jam.followup_remainder_inner", !9}
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!8 = !{!"llvm.loop.unroll_and_jam.followup_all", !9}
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!9 = distinct !{!9, !10}
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!10 = !{!"llvm.loop.disable_nonforced"}
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; // -----
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; CHECK-DAG: #[[LICM_ATTR:.*]] = #llvm.loop_licm<disable = true, versioningDisable = true>
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; CHECK-DAG: #[[$ANNOT_ATTR:.*]] = #llvm.loop_annotation<licm = #[[LICM_ATTR]]>
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; CHECK-LABEL: @licm
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define void @licm(i64 %n, ptr %A) {
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entry:
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; CHECK: llvm.br ^{{.*}} {loop_annotation = #[[$ANNOT_ATTR]]}
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br label %end, !llvm.loop !1
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end:
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ret void
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}
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!1 = distinct !{!1, !2, !3}
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!2 = !{!"llvm.licm.disable"}
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!3 = !{!"llvm.loop.licm_versioning.disable"}
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; // -----
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; CHECK-DAG: #[[FOLLOWUP:.*]] = #llvm.loop_annotation<disableNonforced = true>
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; CHECK-DAG: #[[DISTRIBUTE_ATTR:.*]] = #llvm.loop_distribute<disable = true, followupCoincident = #[[FOLLOWUP]], followupSequential = #[[FOLLOWUP]], followupFallback = #[[FOLLOWUP]], followupAll = #[[FOLLOWUP]]>
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; CHECK-DAG: #[[$ANNOT_ATTR:.*]] = #llvm.loop_annotation<distribute = #[[DISTRIBUTE_ATTR]]>
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; CHECK-LABEL: @distribute
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define void @distribute(i64 %n, ptr %A) {
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entry:
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; CHECK: llvm.br ^{{.*}} {loop_annotation = #[[$ANNOT_ATTR]]}
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br label %end, !llvm.loop !1
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end:
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ret void
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}
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!1 = distinct !{!1, !2, !3, !4, !5, !6}
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!2 = !{!"llvm.loop.distribute.enable", i1 0}
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!3 = !{!"llvm.loop.distribute.followup_coincident", !9}
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!4 = !{!"llvm.loop.distribute.followup_sequential", !9}
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!5 = !{!"llvm.loop.distribute.followup_fallback", !9}
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!6 = !{!"llvm.loop.distribute.followup_all", !9}
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!9 = distinct !{!9, !10}
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!10 = !{!"llvm.loop.disable_nonforced"}
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; // -----
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; CHECK-DAG: #[[PIPELINE_ATTR:.*]] = #llvm.loop_pipeline<disable = false, initiationinterval = 2 : i32>
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; CHECK-DAG: #[[$ANNOT_ATTR:.*]] = #llvm.loop_annotation<pipeline = #[[PIPELINE_ATTR]]>
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; CHECK-LABEL: @pipeline
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define void @pipeline(i64 %n, ptr %A) {
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entry:
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; CHECK: llvm.br ^{{.*}} {loop_annotation = #[[$ANNOT_ATTR]]}
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br label %end, !llvm.loop !1
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end:
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ret void
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}
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!1 = distinct !{!1, !2, !3}
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!2 = !{!"llvm.loop.pipeline.disable", i1 0}
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!3 = !{!"llvm.loop.pipeline.initiationinterval", i32 2}
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; // -----
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; CHECK-DAG: #[[PEELED_ATTR:.*]] = #llvm.loop_peeled<count = 5 : i32>
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; CHECK-DAG: #[[$ANNOT_ATTR:.*]] = #llvm.loop_annotation<peeled = #[[PEELED_ATTR]]>
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; CHECK-LABEL: @peeled
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define void @peeled(i64 %n, ptr %A) {
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entry:
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; CHECK: llvm.br ^{{.*}} {loop_annotation = #[[$ANNOT_ATTR]]}
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br label %end, !llvm.loop !1
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end:
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ret void
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}
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!1 = distinct !{!1, !2}
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!2 = !{!"llvm.loop.peeled.count", i32 5}
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; // -----
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; CHECK-DAG: #[[UNSWITCH_ATTR:.*]] = #llvm.loop_unswitch<partialDisable = true>
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; CHECK-DAG: #[[$ANNOT_ATTR:.*]] = #llvm.loop_annotation<unswitch = #[[UNSWITCH_ATTR]]>
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; CHECK-LABEL: @unswitched
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define void @unswitched(i64 %n, ptr %A) {
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entry:
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; CHECK: llvm.br ^{{.*}} {loop_annotation = #[[$ANNOT_ATTR]]}
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br label %end, !llvm.loop !1
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end:
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ret void
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}
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!1 = distinct !{!1, !2}
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!2 = !{!"llvm.loop.unswitch.partial.disable"}
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; // -----
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; CHECK: #[[$ANNOT_ATTR:.*]] = #llvm.loop_annotation<parallelAccesses = @__llvm_global_metadata::@[[GROUP0:.*]]>
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; CHECK: llvm.metadata @__llvm_global_metadata {
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; CHECK: llvm.access_group @[[GROUP0]]
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; CHECK-LABEL: @parallel_accesses
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define void @parallel_accesses(ptr %arg) {
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entry:
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%0 = load i32, ptr %arg, !llvm.access.group !0
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; CHECK: llvm.br ^{{.*}} {loop_annotation = #[[$ANNOT_ATTR]]}
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br label %end, !llvm.loop !1
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end:
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ret void
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}
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!0 = distinct !{}
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!1 = distinct !{!1, !2}
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!2 = !{!"llvm.loop.parallel_accesses", !0}
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; // -----
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; CHECK: #[[$ANNOT_ATTR:.*]] = #llvm.loop_annotation<parallelAccesses = @__llvm_global_metadata::@[[GROUP0:.*]], @__llvm_global_metadata::@[[GROUP1:.*]]>
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; CHECK: llvm.metadata @__llvm_global_metadata {
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; CHECK: llvm.access_group @[[GROUP0]]
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; CHECK: llvm.access_group @[[GROUP1]]
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; CHECK-LABEL: @multiple_parallel_accesses
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define void @multiple_parallel_accesses(ptr %arg) {
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entry:
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%0 = load i32, ptr %arg, !llvm.access.group !0
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%1 = load i32, ptr %arg, !llvm.access.group !3
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; CHECK: llvm.br ^{{.*}} {loop_annotation = #[[$ANNOT_ATTR]]}
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br label %end, !llvm.loop !1
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end:
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ret void
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}
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!0 = distinct !{}
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!1 = distinct !{!1, !2}
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!2 = !{!"llvm.loop.parallel_accesses", !0, !3}
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!3 = distinct !{}
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