Justin Bogner aa07f92210

[DirectX][SPIRV] Consistent names for HLSL resource intrinsics (#120466) ...

Rename HLSL resource-related intrinsics to be consistent with the naming
conventions discussed in [wg-hlsl:0014].

This is an entirely mechanical change, consisting of the following
commands and automated formatting.

```sh
git grep -l handle.fromBinding | xargs perl -pi -e \
  's/(dx|spv)(.)handle.fromBinding/$1$2resource$2handlefrombinding/g'
git grep -l typedBufferLoad_checkbit | xargs perl -pi -e \
  's/(dx|spv)(.)typedBufferLoad_checkbit/$1$2resource$2loadchecked$2typedbuffer/g'
git grep -l typedBufferLoad | xargs perl -pi -e \
  's/(dx|spv)(.)typedBufferLoad/$1$2resource$2load$2typedbuffer/g'
git grep -l typedBufferStore | xargs perl -pi -e \
  's/(dx|spv)(.)typedBufferStore/$1$2resource$2store$2typedbuffer/g'
git grep -l bufferUpdateCounter | xargs perl -pi -e \
  's/(dx|spv)(.)bufferUpdateCounter/$1$2resource$2updatecounter/g'
git grep -l cast_handle | xargs perl -pi -e \
  's/(dx|spv)(.)cast.handle/$1$2resource$2casthandle/g'
```

[wg-hlsl:0014]: https://github.com/llvm/wg-hlsl/blob/main/proposals/0014-consistent-naming-for-dx-intrinsics.md

2024-12-19 12:17:21 -07:00

..

abs.hlsl

Switch DirectX Target to use the Itanium ABI (#111632)

2024-10-10 12:58:28 -06:00

acos.hlsl

[HLSL][clang] Add elementwise builtins for trig intrinsics (#95999)

2024-06-22 17:17:34 -07:00

all.hlsl

[clang][HLSL] Update DXIL/SPIRV hybird CodeGen tests to use temp var (#105930)

2024-08-28 13:23:24 -07:00

any.hlsl

[clang][HLSL] Update DXIL/SPIRV hybird CodeGen tests to use temp var (#105930)

2024-08-28 13:23:24 -07:00

AppendStructuredBuffer-elementtype.hlsl

[HLSL] Do not print details in IR for target extension types (#115971)

2024-12-10 10:07:30 -08:00

asdouble.hlsl

[HLSL][DXIL] Implement asdouble intrinsic (#114847)

2024-11-22 10:23:30 -08:00

asfloat.hlsl

Implementing asfloat using bit_cast (#108686)

2024-09-16 14:42:52 -04:00

asin.hlsl

[HLSL][clang] Add elementwise builtins for trig intrinsics (#95999)

2024-06-22 17:17:34 -07:00

asint.hlsl

[HLSL] Implement asint casting using bit_cast (#110027)

2024-09-27 14:16:51 -07:00

asuint.hlsl

[HLSL] Make casting functions constexpr (#108902)

2024-09-20 16:42:53 -05:00

atan2.hlsl

Revert "Renormalize line endings whitespace only after dccebddb3b80"

2024-10-18 21:16:50 +01:00

atan.hlsl

[HLSL][clang] Add elementwise builtins for trig intrinsics (#95999)

2024-06-22 17:17:34 -07:00

ByteAddressBuffers-constructors.hlsl

[DirectX][SPIRV] Consistent names for HLSL resource intrinsics (#120466)

2024-12-19 12:17:21 -07:00

ceil.hlsl

Switch DirectX Target to use the Itanium ABI (#111632)

2024-10-10 12:58:28 -06:00

clamp-builtin.hlsl

[HLSL][SPIRV] Added clamp intrinsic (#113394)

2024-11-07 17:47:53 -08:00

clamp.hlsl

[HLSL][SPIRV] Added clamp intrinsic (#113394)

2024-11-07 17:47:53 -08:00

clip.hlsl

[HLSL] Adding HLSL clip function. (#114588)

2024-11-14 23:34:07 -08:00

ConsumeStructuredBuffer-elementtype.hlsl

[HLSL] Do not print details in IR for target extension types (#115971)

2024-12-10 10:07:30 -08:00

cos.hlsl

Switch DirectX Target to use the Itanium ABI (#111632)

2024-10-10 12:58:28 -06:00

cosh.hlsl

[HLSL][clang] Add elementwise builtins for trig intrinsics (#95999)

2024-06-22 17:17:34 -07:00

countbits.hlsl

[HLSL] Re-implement countbits with the correct return type (#113189)

2024-10-29 07:56:05 -07:00

cross.hlsl

Revert "Renormalize line endings whitespace only after dccebddb3b80"

2024-10-18 21:16:50 +01:00

degrees.hlsl

[HLSL] Implement the degrees intrinsic (#111209)

2024-10-10 16:34:26 -07:00

dot4add_i8packed.hlsl

[HLSL][SPIRV][DXIL] Implement dot4add_i8packed intrinsic (#113623)

2024-11-05 10:29:08 -08:00

dot4add_u8packed.hlsl

[HLSL][SPIRV][DXIL] Implement dot4add_u8packed intrinsic (#115068)

2024-11-07 10:19:41 -08:00

dot-builtin.hlsl

[HLSL][SPIRV]Add SPIRV generation for HLSL dot (#104656)

2024-08-22 11:13:52 -07:00

dot.hlsl

[HLSL] Allow truncation to scalar (#104844)

2024-09-11 17:27:09 -05:00

exp2.hlsl

Switch DirectX Target to use the Itanium ABI (#111632)

2024-10-10 12:58:28 -06:00

exp.hlsl

Switch DirectX Target to use the Itanium ABI (#111632)

2024-10-10 12:58:28 -06:00

firstbithigh.hlsl

[HLSL] implement elementwise firstbithigh hlsl builtin (#111082)

2024-11-06 07:31:39 -08:00

floor.hlsl

Switch DirectX Target to use the Itanium ABI (#111632)

2024-10-10 12:58:28 -06:00

fmod.hlsl

[HLSL] Implementation of the elementwise fmod builtin (#108849)

2024-09-27 17:26:06 -04:00

frac.hlsl

[clang][HLSL] Update DXIL/SPIRV hybird CodeGen tests to use temp var (#105930)

2024-08-28 13:23:24 -07:00

GroupMemoryBarrierWithGroupSync.hlsl

[clang][HLSL] Add GroupMemoryBarrierWithGroupSync intrinsic (#111883)

2024-12-03 01:16:49 -08:00

hlsl_resource_t.hlsl

[HLSL] Do not print details in IR for target extension types (#115971)

2024-12-10 10:07:30 -08:00

isinf.hlsl

[HLSL] implement the isinf intrinsic (#84927)

2024-03-14 18:07:48 -04:00

length.hlsl

Revert "Renormalize line endings whitespace only after dccebddb3b80"

2024-10-18 21:16:50 +01:00

lerp-builtin.hlsl

[clang,test] Convert text files from CRLF to LF

2024-05-03 10:23:53 -07:00

lerp.hlsl

[HLSL] Allow truncation to scalar (#104844)

2024-09-11 17:27:09 -05:00

log2.hlsl

Switch DirectX Target to use the Itanium ABI (#111632)

2024-10-10 12:58:28 -06:00

log10.hlsl

Switch DirectX Target to use the Itanium ABI (#111632)

2024-10-10 12:58:28 -06:00

log.hlsl

Switch DirectX Target to use the Itanium ABI (#111632)

2024-10-10 12:58:28 -06:00

mad.hlsl

[HLSL] Allow truncation to scalar (#104844)

2024-09-11 17:27:09 -05:00

max.hlsl

Switch DirectX Target to use the Itanium ABI (#111632)

2024-10-10 12:58:28 -06:00

min.hlsl

Switch DirectX Target to use the Itanium ABI (#111632)

2024-10-10 12:58:28 -06:00

normalize.hlsl

Revert "Renormalize line endings whitespace only after dccebddb3b80"

2024-10-18 21:16:50 +01:00

pow.hlsl

Switch DirectX Target to use the Itanium ABI (#111632)

2024-10-10 12:58:28 -06:00

radians.hlsl

[clang][HLSL] Add radians intrinsic (#110802)

2024-10-04 18:34:46 -04:00

RasterizerOrderedStructuredBuffer-elementtype.hlsl

[HLSL] Do not print details in IR for target extension types (#115971)

2024-12-10 10:07:30 -08:00

rcp.hlsl

[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)

2024-11-06 11:53:33 +00:00

reversebits.hlsl

[clang,test] Convert text files from CRLF to LF

2024-05-03 10:23:53 -07:00

round.hlsl

Switch DirectX Target to use the Itanium ABI (#111632)

2024-10-10 12:58:28 -06:00

rsqrt.hlsl

[clang][HLSL] Update DXIL/SPIRV hybird CodeGen tests to use temp var (#105930)

2024-08-28 13:23:24 -07:00

RWBuffer-constructor-opt.hlsl

[DirectX][SPIRV] Consistent names for HLSL resource intrinsics (#120466)

2024-12-19 12:17:21 -07:00

RWBuffer-constructor.hlsl

[DirectX][SPIRV] Consistent names for HLSL resource intrinsics (#120466)

2024-12-19 12:17:21 -07:00

RWBuffer-elementtype.hlsl

[HLSL] Implement RWBuffer::operator[] via __builtin_hlsl_resource_getpointer (#117017)

2024-12-02 14:03:31 -08:00

RWBuffer-subscript.hlsl

[HLSL] Add RWBuffer::Load(Index) (#117018)

2024-12-16 09:31:24 -08:00

RWStructuredBuffer-elementtype.hlsl

[HLSL] Implement RWBuffer::operator[] via __builtin_hlsl_resource_getpointer (#117017)

2024-12-02 14:03:31 -08:00

saturate.hlsl

Switch DirectX Target to use the Itanium ABI (#111632)

2024-10-10 12:58:28 -06:00

ScalarSwizzles.hlsl

[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)

2024-11-06 11:53:33 +00:00

select.hlsl

[HLSL] Implement support for HLSL intrinsic - select (#107129)

2024-09-09 11:07:20 -07:00

sign.hlsl

[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)

2024-11-06 11:53:33 +00:00

sin.hlsl

Switch DirectX Target to use the Itanium ABI (#111632)

2024-10-10 12:58:28 -06:00

sinh.hlsl

[HLSL][clang] Add elementwise builtins for trig intrinsics (#95999)

2024-06-22 17:17:34 -07:00

splitdouble.hlsl

Adding splitdouble HLSL function (#109331)

2024-10-28 13:26:59 -07:00

sqrt.hlsl

Switch DirectX Target to use the Itanium ABI (#111632)

2024-10-10 12:58:28 -06:00

step.hlsl

Revert "Renormalize line endings whitespace only after dccebddb3b80"

2024-10-18 21:16:50 +01:00

StructuredBuffer-elementtype.hlsl

[HLSL] Implement RWBuffer::operator[] via __builtin_hlsl_resource_getpointer (#117017)

2024-12-02 14:03:31 -08:00

StructuredBuffers-constructors.hlsl

[DirectX][SPIRV] Consistent names for HLSL resource intrinsics (#120466)

2024-12-19 12:17:21 -07:00

StructuredBuffers-methods-lib.hlsl

[DirectX][SPIRV] Consistent names for HLSL resource intrinsics (#120466)

2024-12-19 12:17:21 -07:00

StructuredBuffers-methods-ps.hlsl

[DirectX][SPIRV] Consistent names for HLSL resource intrinsics (#120466)

2024-12-19 12:17:21 -07:00

StructuredBuffers-subscripts.hlsl

[HLSL] Implement RWBuffer::operator[] via __builtin_hlsl_resource_getpointer (#117017)

2024-12-02 14:03:31 -08:00

tan.hlsl

[clang][hlsl] Add tan intrinsic part 1 (#90276)

2024-05-07 22:54:15 -04:00

tanh.hlsl

[HLSL][clang] Add elementwise builtins for trig intrinsics (#95999)

2024-06-22 17:17:34 -07:00

trunc.hlsl

Switch DirectX Target to use the Itanium ABI (#111632)

2024-10-10 12:58:28 -06:00

wave_get_lane_index_do_while.hlsl

[HLSL][SPIRV] Use Spirv target codegen (#112573)

2024-10-16 12:46:45 -04:00

wave_get_lane_index_simple.hlsl

[HLSL][SPIRV] Use Spirv target codegen (#112573)

2024-10-16 12:46:45 -04:00

wave_get_lane_index_subcall.hlsl

[HLSL][SPIRV] Use Spirv target codegen (#112573)

2024-10-16 12:46:45 -04:00

wave_is_first_lane.hlsl

[HLSL][SPIRV] Use Spirv target codegen (#112573)

2024-10-16 12:46:45 -04:00

WaveActiveAllTrue.hlsl

[HLSL] Implement WaveActiveAllTrue Intrinsic (#117245)

2024-12-16 16:13:35 -08:00

WaveActiveAnyTrue.hlsl

[HLSL] Implement WaveActiveAnyTrue intrinsic (#115902)

2024-11-21 09:44:58 -08:00

WaveActiveCountBits.hlsl

[DXIL][SPIRV] Lower WaveActiveCountBits intrinsic (#113382)

2024-11-07 19:06:37 -08:00

WaveReadLaneAt.hlsl

[HLSL][SPIRV] Use Spirv target codegen (#112573)

2024-10-16 12:46:45 -04:00