Craig Topper bd261ecc5a

[SelectionDAG] Add SDNode::user_begin() and use it in some places (#120509) ...

Most of these are just places that want the first user and aren't
iterating over the whole list.

While there I changed some use_size() == 1 to hasOneUse() which
is more efficient.

This is part of an effort to rename use_iterator to user_iterator
and provide a use_iterator that dereferences to SDUse&. This patch
helps reduce the diff on later patches.

2024-12-18 22:13:04 -08:00

..

AsmParser

[LoongArch] Support parsing register names in CFI instructions

2024-11-22 10:20:52 +08:00

Disassembler

[Target] Remove unused includes (NFC) (#116577)

2024-11-18 07:19:50 -08:00

MCTargetDesc

[LoongArch] Record the special AMO operand constraint with TableGen (#114398)

2024-11-20 10:41:28 +08:00

TargetInfo

…

CMakeLists.txt

[LoongArch] Add machine function pass to merge base + offset (#101139)

2024-08-08 23:05:38 +08:00

LoongArch.h

[LoongArch] Add machine function pass to merge base + offset (#101139)

2024-08-08 23:05:38 +08:00

LoongArch.td

[LoongArch] Support amcas[_db].{b/h/w/d} instructions. (#114189)

2024-11-27 17:36:13 +08:00

LoongArchAsmPrinter.cpp

[Target] Remove unused includes (NFC) (#116577)

2024-11-18 07:19:50 -08:00

LoongArchAsmPrinter.h

[LoongArch] Add options for annotate tablejump

2024-10-16 11:58:00 +08:00

LoongArchCallingConv.td

…

LoongArchDeadRegisterDefinitions.cpp

[CodeGen][NewPM] Port LiveStacks analysis to NPM (#118778)

2024-12-06 15:16:07 +05:30

LoongArchExpandAtomicPseudoInsts.cpp

[LoongArch] Support LA V1.1 feature ld-seq-sa that don't generate dbar 0x700. (#116762)

2024-11-22 17:34:15 +08:00

LoongArchExpandPseudoInsts.cpp

[LoongArch] Fix GOT usage for non-dso_local function calls in large code model

2024-11-21 16:52:38 +08:00

LoongArchFloat32InstrInfo.td

[LoongArch] [CodeGen] Add options for Clang to generate LoongArch-specific frecipe & frsqrte instructions (#109917)

2024-10-18 09:06:29 +08:00

LoongArchFloat64InstrInfo.td

[LoongArch] [CodeGen] Add options for Clang to generate LoongArch-specific frecipe & frsqrte instructions (#109917)

2024-10-18 09:06:29 +08:00

LoongArchFloatInstrFormats.td

[LoongArch] Implement COPY instruction between CFRs (#69300)

2023-10-19 09:20:27 +08:00

LoongArchFrameLowering.cpp

[llvm] Consistently respect naked fn attribute in TargetFrameLowering::hasFP() (#106014)

2024-10-18 09:35:42 +04:00

LoongArchFrameLowering.h

[llvm] Consistently respect naked fn attribute in TargetFrameLowering::hasFP() (#106014)

2024-10-18 09:35:42 +04:00

LoongArchInstrFormats.td

[LoongArch] Record the special AMO operand constraint with TableGen (#114398)

2024-11-20 10:41:28 +08:00

LoongArchInstrInfo.cpp

[LoongArch] Ensure pcaddu18i and jirl adjacency in tail calls for correct relocation (#113932)

2024-11-01 00:08:15 +08:00

LoongArchInstrInfo.h

[TII][RISCV] Add renamable bit to copyPhysReg (#91179)

2024-08-27 10:08:43 +08:00

LoongArchInstrInfo.td

[LoongArch] Optimize vector bitreverse using scalar bitrev and vshuf4i (#118054)

2024-12-10 09:11:28 +08:00

LoongArchISelDAGToDAG.cpp

[LoongArch] Use getSignedConstant() where necessary (#117172)

2024-11-22 11:23:11 +01:00

LoongArchISelDAGToDAG.h

Reland "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94149)

2024-06-04 08:10:58 +08:00

LoongArchISelLowering.cpp

[SelectionDAG] Add SDNode::user_begin() and use it in some places (#120509)

2024-12-18 22:13:04 -08:00

LoongArchISelLowering.h

[LoongArch] Optimize vector bitreverse using scalar bitrev and vshuf4i (#118054)

2024-12-10 09:11:28 +08:00

LoongArchLASXInstrFormats.td

[LoongArch][NFC] Consistently derive instruction mnemonics from TableGen record names

2023-07-18 15:50:20 +08:00

LoongArchLASXInstrInfo.td

[LoongArch] Optimize vreplgr2vr + vinsgr2vr intrinsic sequence (#115803)

2024-11-12 19:07:53 +08:00

LoongArchLBTInstrFormats.td

[LoongArch] Add definition for LVZ/LBT instructions

2023-07-24 13:11:02 +08:00

LoongArchLBTInstrInfo.td

[LoongArch] Add definition for LVZ/LBT instructions

2023-07-24 13:11:02 +08:00

LoongArchLSXInstrFormats.td

[LoongArch][NFC] Consistently derive instruction mnemonics from TableGen record names

2023-07-18 15:50:20 +08:00

LoongArchLSXInstrInfo.td

[LoongArch] Use getSignedConstant() where necessary (#117172)

2024-11-22 11:23:11 +01:00

LoongArchLVZInstrInfo.td

[LoongArch] Add definition for LVZ/LBT instructions

2023-07-24 13:11:02 +08:00

LoongArchMachineFunctionInfo.h

[LoongArch] Add options for annotate tablejump

2024-10-16 11:58:00 +08:00

LoongArchMCInstLower.cpp

[Target] Remove unused includes (NFC) (#116577)

2024-11-18 07:19:50 -08:00

LoongArchMergeBaseOffset.cpp

[LoongArch] Merge base and offset for large offsets (#113277)

2024-10-23 19:43:23 +08:00

LoongArchOptWInstrs.cpp

[LoongArch] Adds support for vectors in OptWInstrs (#118935)

2024-12-16 13:39:01 +08:00

LoongArchRegisterInfo.cpp

[LoongArch] Implement LoongArchRegisterInfo::canRealignStack() (#76913)

2024-01-09 20:35:49 +08:00

LoongArchRegisterInfo.h

[LoongArch] Implement LoongArchRegisterInfo::canRealignStack() (#76913)

2024-01-09 20:35:49 +08:00

LoongArchRegisterInfo.td

[LoongArch] Avoid indirect branch jumps using the ra register

2024-11-11 14:15:22 +08:00

LoongArchSubtarget.cpp

[LoongArch] Enable alias analysis by default (#114980)

2024-11-06 19:30:57 +08:00

LoongArchSubtarget.h

[LoongArch] Enable alias analysis by default (#114980)

2024-11-06 19:30:57 +08:00

LoongArchTargetMachine.cpp

Overhaul the TargetMachine and LLVMTargetMachine Classes (#111234)

2024-11-14 13:30:05 -08:00

LoongArchTargetMachine.h

Overhaul the TargetMachine and LLVMTargetMachine Classes (#111234)

2024-11-14 13:30:05 -08:00

LoongArchTargetTransformInfo.cpp

[LoongArch] Add TTI support for cpop with LSX

2024-09-06 15:48:14 +08:00

LoongArchTargetTransformInfo.h

[LoongArch] Add TTI support for cpop with LSX

2024-09-06 15:48:14 +08:00