Nick Sarnie 1c16807d0d

[LLVM] Add Intel vendor in Triple (#120250) ...

We plan to make use of this in SPIR-V-based OpenMP offloading, for which
there is already an initial patch in review.

Signed-off-by: Sarnie, Nick <nick.sarnie@intel.com>

2024-12-17 12:30:21 -06:00

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Unix

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Windows

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AArch64TargetParser.cpp

[AArch64][FMV] Add missing feature dependencies and detect at runtime. (#119231)

2024-12-11 22:11:32 +00:00

ARMTargetParser.cpp

[LLVM] [Clang] Support for Gentoo *t64 triples (64-bit time_t ABIs) (#111302)

2024-10-14 11:18:04 +00:00

ARMTargetParserCommon.cpp

[ARM][AArch64] Introduce the Armv9.6-A architecture version (#110825)

2024-10-04 10:12:41 +01:00

CMakeLists.txt

[PowerPC] add TargetParser for PPC target (#97541)

2024-07-25 13:46:59 +08:00

CSKYTargetParser.cpp

[llvm] Use StringRef::{starts,ends}_with (NFC) (#74956)

2023-12-11 21:01:36 -08:00

Host.cpp

TargetParser: AArch64: Add part numbers for Apple CPUs.

2024-12-12 16:52:58 -08:00

LoongArchTargetParser.cpp

[LoongArch] Support amcas[_db].{b/h/w/d} instructions. (#114189)

2024-11-27 17:36:13 +08:00

PPCTargetParser.cpp

[PowerPC] fix default cpu setting

2024-07-25 09:55:00 -04:00

RISCVISAInfo.cpp

[RISCV] Add Qualcomm uC Xqcilsm (Load Store Multiple) extension (#119823)

2024-12-14 00:06:58 +05:30

RISCVTargetParser.cpp

[RISCV] Support __builtin_cpu_is

2024-11-22 22:58:54 +08:00

SubtargetFeature.cpp

[TargetParser] Remove unused includes (NFC) (#116929)

2024-11-20 06:52:45 -08:00

TargetParser.cpp

AMDGPU: Builtin & CodeGen support for v_cvt_sr_{bf16|f16}_f32 instructions (#117824)

2024-11-26 23:37:05 -05:00

Triple.cpp

[LLVM] Add Intel vendor in Triple (#120250)

2024-12-17 12:30:21 -06:00

X86TargetParser.cpp

[X86] Add missing feature USERMSR to DiamondRapids (#120061)

2024-12-16 20:29:26 +08:00