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Revert "[LoopVectorizer] Add support for partial reductions (#92418 )"

This reverts commit 060d62b48aeb5080ffcae1dc56e41a06c6f56701.

It looks like this is triggering an assertion when build llvm-test-suite
on ARM64 macOS.

Reproducer from MultiSource/Benchmarks/Ptrdist/bc/number.c

    target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-n32:64-S128-Fn32"
    target triple = "arm64-apple-macosx15.0.0"

    define void @test(i64 %idx.neg, i8 %0) #0 {
    entry:
      br label %while.body

    while.body:                                       ; preds = %while.body, %entry
      %n1ptr.0.idx131 = phi i64 [ %n1ptr.0.add, %while.body ], [ %idx.neg, %entry ]
      %n2ptr.0.idx130 = phi i64 [ %n2ptr.0.add, %while.body ], [ 0, %entry ]
      %sum.1129 = phi i64 [ %add99, %while.body ], [ 0, %entry ]
      %n1ptr.0.add = add i64 %n1ptr.0.idx131, 1
      %conv = sext i8 %0 to i64
      %n2ptr.0.add = add i64 %n2ptr.0.idx130, 1
      %1 = load i8, ptr null, align 1
      %conv97 = sext i8 %1 to i64
      %mul = mul i64 %conv97, %conv
      %add99 = add i64 %mul, %sum.1129
      %cmp94 = icmp ugt i64 %n1ptr.0.idx131, 0
      %cmp95 = icmp ne i64 %n2ptr.0.idx130, -1
      %2 = and i1 %cmp94, %cmp95
      br i1 %2, label %while.body, label %while.end.loopexit

    while.end.loopexit:                               ; preds = %while.body
      %add99.lcssa = phi i64 [ %add99, %while.body ]
      ret void
    }

    attributes #0 = { "target-cpu"="apple-m1" }

> opt -p loop-vectorize
Assertion failed: ((VF.isScalar() || V->getType()->isVectorTy()) && "scalar values must be stored as (0, 0)"), function set, file VPlan.h, line 284.

2024-12-19 21:46:51 +00:00

aarch64-predication.ll

[LoopVectorize][NFC] Rewrite tests to check output of vplan cost model (#113697 )

2024-11-19 08:55:39 +00:00

aarch64-unroll.ll

…

arbitrary-induction-step.ll

[VPlan] Implement unrolling as VPlan-to-VPlan transform. (#95842 )

2024-09-21 19:47:37 +01:00

arith-fp-frem-costs.ll

[CostModel][LoopVectorize] Move some loop vectoriser tests (#113702 )

2024-10-30 13:50:02 +00:00

arm64-unroll.ll

…

backedge-overflow.ll

…

blend-costs.ll

[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548 )

2024-11-06 11:53:33 +00:00

call-costs.ll

[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548 )

2024-11-06 11:53:33 +00:00

clamped-trip-count.ll

[VPlan] Omit zero add in VPWidenIntOrFpInductionRecipe (#119668 )

2024-12-16 11:55:48 +08:00

conditional-branches-cost.ll

[VPlan] Remove reverse() of predecessors from VPInstruction::generate.

2024-12-17 20:44:32 +00:00

cost-no-valid-vplans-built.ll

[VPlan] Return std::nullopt early if plans are empty.

2024-06-27 12:25:59 +01:00

deterministic-type-shrinkage.ll

[VPlan] Remove reverse() of predecessors from VPInstruction::generate.

2024-12-17 20:44:32 +00:00

divs-with-scalable-vfs.ll

[VPlan] Remove reverse() of predecessors from VPInstruction::generate.

2024-12-17 20:44:32 +00:00

eliminate-tail-predication.ll

[LLVM][IR] Use splat syntax when printing ConstantExpr based splats. (#116856 )

2024-11-21 11:21:12 +00:00

epilog-vectorization-factors.ll

[VPlan] Remove reverse() of predecessors from VPInstruction::generate.

2024-12-17 20:44:32 +00:00

epilog-vectorization-widen-inductions.ll

[VPlan] Remove reverse() of predecessors from VPInstruction::generate.

2024-12-17 20:44:32 +00:00

extend-vectorization-factor-for-unprofitable-memops.ll

…

extractvalue-no-scalarization-required.ll

[LV] Update checks to actually check VPlan for correct function.

2024-12-07 12:05:17 +00:00

first-order-recurrence-fold-tail.ll

[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548 )

2024-11-06 11:53:33 +00:00

first-order-recurrence.ll

[LLVM][IR] Use splat syntax when printing ConstantExpr based splats. (#116856 )

2024-11-21 11:21:12 +00:00

fixed-order-recurrence.ll

[VPlan] Run DCE after unrolling.

2024-09-22 22:08:46 +01:00

force-target-instruction-cost.ll

[VPlan] Remove reverse() of predecessors from VPInstruction::generate.

2024-12-17 20:44:32 +00:00

fully-unrolled-cost.ll

Revert "[LoopVectorizer] Add support for partial reductions (#92418 )"

2024-12-19 21:46:51 +00:00

gather-cost.ll

…

gather-do-not-vectorize-addressing.ll

[LLVM][IR] Use splat syntax when printing ConstantExpr based splats. (#116856 )

2024-11-21 11:21:12 +00:00

i1-reg-usage.ll

…

induction-costs-sve.ll

[VPlan] Remove reverse() of predecessors from VPInstruction::generate.

2024-12-17 20:44:32 +00:00

induction-costs.ll

[VPlan] Remove reverse() of predecessors from VPInstruction::generate.

2024-12-17 20:44:32 +00:00

induction-trunc.ll

…

interleave_count_for_estimated_tc.ll

…

interleave_count_for_known_tc.ll

…

interleave-allocsize-not-equal-typesize.ll

[VPlan] Remove reverse() of predecessors from VPInstruction::generate.

2024-12-17 20:44:32 +00:00

interleaved_cost.ll

[LV] Assign cost to all interleave members when not interleaving.

2024-09-11 21:04:34 +01:00

interleaved-store-of-first-order-recurrence.ll

[VPlan] Don't created GEP x, 0 for interleave group pointers.

2024-10-08 12:08:13 +01:00

interleaved-vs-scalar.ll

[LV] Assign cost to all interleave members when not interleaving.

2024-09-11 21:04:34 +01:00

interleaving-load-store.ll

[VPlan] Remove reverse() of predecessors from VPInstruction::generate.

2024-12-17 20:44:32 +00:00

interleaving-reduction.ll

[VPlan] Remove reverse() of predecessors from VPInstruction::generate.

2024-12-17 20:44:32 +00:00

intrinsiccost.ll

[VPlan] Remove reverse() of predecessors from VPInstruction::generate.

2024-12-17 20:44:32 +00:00

invalid-costs.ll

[VPlan] Return cost of PHI for scalar VFs in computeCost for FORs.

2024-11-21 21:11:21 +00:00

invariant-replicate-region.ll

[LV] Move test requiring AArch64 to target subdir.

2024-09-21 12:54:59 +01:00

lit.local.cfg

…

loop-vectorization-factors.ll

[VPlan] Remove reverse() of predecessors from VPInstruction::generate.

2024-12-17 20:44:32 +00:00

loopvectorize_pr33804_double.ll

…

low_trip_count_predicates.ll

[VPlan] Remove reverse() of predecessors from VPInstruction::generate.

2024-12-17 20:44:32 +00:00

low_trip_memcheck_cost.ll

…

masked-call.ll

[LLVM][IR] Use splat syntax when printing ConstantExpr based splats. (#116856 )

2024-11-21 11:21:12 +00:00

masked-op-cost.ll

[LoopVectorize][NFC] Rewrite tests to check output of vplan cost model (#113697 )

2024-11-19 08:55:39 +00:00

max-vf-for-interleaved.ll

…

maximize-bandwidth-invalidate.ll

[LoopVectorize][NFC] Rewrite tests to check output of vplan cost model (#113697 )

2024-11-19 08:55:39 +00:00

mul-simplification.ll

[VPlan] Simplify MUL operands at recipe construction.

2024-09-02 21:25:31 +01:00

neon-gather-cost.ll

…

neoverse-epilogue-vect.ll

[AArch64][LV] Set MaxInterleaving to 4 for Neoverse V2 and V3 (#100385 )

2024-11-20 09:33:39 +00:00

no_vector_instructions.ll

[LoopVectorize][NFC] Rewrite tests to check output of vplan cost model (#113697 )

2024-11-19 08:55:39 +00:00

nontemporal-load-store.ll

…

outer_loop_prefer_scalable.ll

[VPlan] Omit zero add in VPWidenIntOrFpInductionRecipe (#119668 )

2024-12-16 11:55:48 +08:00

outer_loop_test1_no_explicit_vect_width.ll

[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548 )

2024-11-06 11:53:33 +00:00

Oz-and-forced-vectorize.ll

…

pr31900.ll

…

pr33053.ll

…

pr36032.ll

…

pr46950-load-cast-context-crash.ll

…

pr56627.ll

…

pr60831-sve-inv-store-crash.ll

[VPlan] Remove reverse() of predecessors from VPInstruction::generate.

2024-12-17 20:44:32 +00:00

pr73894.ll

[VPlan] Remove VPPredInstPHIRecipes without users after region merging.

2024-07-20 13:21:32 +01:00

predication_costs.ll

…

prefer-fixed-if-equal-to-scalable.ll

[LV][AArch64] Prefer Fixed over Scalable if cost-model is equal (Neoverse V2) (#95819 )

2024-07-17 10:46:28 +01:00

reduction-recurrence-costs-sve.ll

[AArch64] Change the default vscale-for-tuning to 1. (#117174 )

2024-11-29 17:41:05 +00:00

reduction-small-size.ll

…

reg-usage.ll

…

runtime-check-size-based-threshold.ll

…

runtime-check-trip-count-decisions.ll

…

scalable-alloca.ll

[VPlan] Port invalid cost remarks to VPlan. (#99322 )

2024-07-27 12:52:12 +01:00

scalable-avoid-scalarization.ll

[VPlan] Omit zero add in VPWidenIntOrFpInductionRecipe (#119668 )

2024-12-16 11:55:48 +08:00

scalable-call.ll

[LLVM][IR] Use splat syntax when printing ConstantExpr based splats. (#116856 )

2024-11-21 11:21:12 +00:00

scalable-fp-ext-trunc-illegal-type.ll

[VPlan] Propagate all GEP flags (#119899 )

2024-12-17 13:48:50 +01:00

scalable-predicate-instruction.ll

…

scalable-reduction-inloop-cond.ll

[LLVM][IR] Use splat syntax when printing ConstantExpr based splats. (#116856 )

2024-11-21 11:21:12 +00:00

scalable-reductions-tf.ll

…

scalable-reductions.ll

[VPlan] Run DCE after unrolling.

2024-09-22 22:08:46 +01:00

scalable-strict-fadd.ll

[LLVM][IR] Use splat syntax when printing ConstantExpr based splats. (#116856 )

2024-11-21 11:21:12 +00:00

scalable-vectorization-cost-tuning.ll

[AArch64] Change the default vscale-for-tuning to 1. (#117174 )

2024-11-29 17:41:05 +00:00

scalable-vectorization.ll

Revert "[AArch64][SVE] Enable max vector bandwidth for SVE" (#112873 )

2024-10-18 11:05:55 +01:00

scalable-vf-hint.ll

[AArch64] Change the default vscale-for-tuning to 1. (#117174 )

2024-11-29 17:41:05 +00:00

scalar_interleave.ll

…

scalarize-store-with-predication.ll

…

sdiv-pow2.ll

…

select-costs.ll

Recommit "[LV][VPlan] Remove any-of reduction from precomputeCost. NFC (#117109 )" (#117289 )

2024-11-28 15:07:36 +08:00

simple_early_exit.ll

[LV] Fixup check lines after 13107cb09441.

2024-12-18 09:37:30 +00:00

smallest-and-widest-types.ll

…

sme-vectorize.ll

[AArch64] Consider streaming mode in TTI interfaces for vectorization. (#96305 )

2024-06-24 11:06:16 +01:00

store-costs-sve.ll

[VPlan] Remove reverse() of predecessors from VPInstruction::generate.

2024-12-17 20:44:32 +00:00

streaming-compatible-sve-no-maximize-bandwidth.ll

[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548 )

2024-11-06 11:53:33 +00:00

streaming-vectorization.ll

[LLVM][TTI][SME] Allow optional auto-vectorisation for streaming functions. (#101679 )

2024-08-05 11:25:44 +01:00

strict-fadd-cost.ll

…

strict-fadd-vf1.ll

…

strict-fadd.ll

[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548 )

2024-11-06 11:53:33 +00:00

sve2-histcnt-epilogue.ll

[VPlan] Remove reverse() of predecessors from VPInstruction::generate.

2024-12-17 20:44:32 +00:00

sve2-histcnt-no-scalar-interleave.ll

[InstCombine] Infer nusw + nneg -> nuw for getelementptr (#111144 )

2024-12-05 14:36:40 +01:00

sve2-histcnt-outerloop-scevaddrec.ll

[LV] Vectorize histogram operations (#99851 )

2024-09-27 13:08:55 +01:00

sve2-histcnt-too-many-deps.ll

[VPlan] Remove reverse() of predecessors from VPInstruction::generate.

2024-12-17 20:44:32 +00:00

sve2-histcnt-vplan.ll

[VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (#114292 )

2024-12-12 15:58:16 +00:00

sve2-histcnt.ll

Revert "[InstCombine] Infer nuw for gep inbounds from base of object" (#120460 )

2024-12-18 19:06:34 +01:00

sve-basic-vec.ll

[LLVM][IR] Use splat syntax when printing ConstantExpr based splats. (#116856 )

2024-11-21 11:21:12 +00:00

sve-cond-inv-loads.ll

[InstCombine] Infer nusw + nneg -> nuw for getelementptr (#111144 )

2024-12-05 14:36:40 +01:00

sve-epilog-vect-inloop-reductions.ll

[VPlan] Remove reverse() of predecessors from VPInstruction::generate.

2024-12-17 20:44:32 +00:00

sve-epilog-vect-reductions.ll

[VPlan] Remove reverse() of predecessors from VPInstruction::generate.

2024-12-17 20:44:32 +00:00

sve-epilog-vect-strict-reductions.ll

[VPlan] Remove reverse() of predecessors from VPInstruction::generate.

2024-12-17 20:44:32 +00:00

sve-epilog-vect-vscale-tune.ll

[AArch64][LV] Set MaxInterleaving to 4 for Neoverse V2 and V3 (#100385 )

2024-11-20 09:33:39 +00:00

sve-epilog-vect.ll

[VPlan] Remove reverse() of predecessors from VPInstruction::generate.

2024-12-17 20:44:32 +00:00

sve-extract-last-veclane.ll

…

sve-fneg.ll

[VPlan] Remove reverse() of predecessors from VPInstruction::generate.

2024-12-17 20:44:32 +00:00

sve-gather-scatter-cost.ll

[LAA] Don't require Stride == 1/-1 for inbounds pointer AddRecs nowrap. (#113126 )

2024-11-05 22:45:56 +01:00

sve-gather-scatter.ll

[InstCombine] Infer nusw + nneg -> nuw for getelementptr (#111144 )

2024-12-05 14:36:40 +01:00

sve-illegal-type.ll

[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548 )

2024-11-06 11:53:33 +00:00

sve-inductions-unusual-types.ll

[VPlan] Omit zero add in VPWidenIntOrFpInductionRecipe (#119668 )

2024-12-16 11:55:48 +08:00

sve-inductions.ll

[VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (#95305 )

2024-09-10 10:41:35 +01:00

sve-interleaved-accesses.ll

Revert "[InstCombine] Infer nuw for gep inbounds from base of object" (#120460 )

2024-12-18 19:06:34 +01:00

sve-interleaved-masked-accesses.ll

[InstCombine] Infer nusw + nneg -> nuw for getelementptr (#111144 )

2024-12-05 14:36:40 +01:00

sve-inv-loads.ll

[VPlan] Add initial loop-invariant code motion transform. (#107894 )

2024-09-20 11:22:03 +01:00

sve-inv-store.ll

…

sve-invalid-costs.ll

[LoopVectorize] Fix build issue caused by #95920 (#96647 )

2024-06-25 15:51:32 +01:00

sve-large-strides.ll

[LLVM][IR] Use splat syntax when printing ConstantExpr based splats. (#116856 )

2024-11-21 11:21:12 +00:00

sve-live-out-pointer-induction.ll

[LV] Compute value of escaped induction based on the computed end value. (#110576 )

2024-10-10 20:04:46 +01:00

sve-low-trip-count.ll

[LLVM][IR] Use splat syntax when printing ConstantExpr based splats. (#116856 )

2024-11-21 11:21:12 +00:00

sve-masked-loadstore.ll

…

sve-multiexit.ll

[VPlan] Remove reverse() of predecessors from VPInstruction::generate.

2024-12-17 20:44:32 +00:00

sve-runtime-check-size-based-threshold.ll

[VPlan] Remove reverse() of predecessors from VPInstruction::generate.

2024-12-17 20:44:32 +00:00

sve-scalable-load-in-loop.ll

…

sve-select-cmp.ll

[LLVM][IR] Use splat syntax when printing ConstantExpr based splats. (#116856 )

2024-11-21 11:21:12 +00:00

sve-strict-fadd-cost.ll

[AArch64] Change the default vscale-for-tuning to 1. (#117174 )

2024-11-29 17:41:05 +00:00

sve-tail-folding-cost.ll

…

sve-tail-folding-forced.ll

[VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (#114292 )

2024-12-12 15:58:16 +00:00

sve-tail-folding-option.ll

Prefer use of 0.0 over -0.0 for fadd reductions w/nsz (in IR) (#106770 )

2024-09-03 09:16:37 -07:00

sve-tail-folding-optsize.ll

[LLVM][IR] Use splat syntax when printing ConstantExpr based splats. (#116856 )

2024-11-21 11:21:12 +00:00

sve-tail-folding-overflow-checks.ll

[LLVM][IR] Use splat syntax when printing ConstantExpr based splats. (#116856 )

2024-11-21 11:21:12 +00:00

sve-tail-folding-reductions.ll

[LLVM][IR] Use splat syntax when printing ConstantExpr based splats. (#116856 )

2024-11-21 11:21:12 +00:00

sve-tail-folding-unroll.ll

[LLVM][IR] Use splat syntax when printing ConstantExpr based splats. (#116856 )

2024-11-21 11:21:12 +00:00

sve-tail-folding.ll

[VPlan] Omit zero add in VPWidenIntOrFpInductionRecipe (#119668 )

2024-12-16 11:55:48 +08:00

sve-type-conv.ll

…

sve-vector-reverse-mask4.ll

Move several vector intrinsics out of experimental namespace (#88748 )

2024-04-29 10:16:45 +01:00

sve-vector-reverse.ll

[VPlan] Remove reverse() of predecessors from VPInstruction::generate.

2024-12-17 20:44:32 +00:00

sve-vfabi.ll

…

sve-widen-extractvalue.ll

[VPlan] Generalize VPValue::isDefinedOutsideLoopRegions.

2024-09-20 15:34:00 +01:00

sve-widen-gep.ll

[VPlan] Get types and step from VPWidenPointerInductionRecipe (NFC).

2024-12-15 18:52:10 +00:00

sve-widen-phi.ll

[InstCombine] Move gep of phi fold into separate function

2024-12-05 15:20:56 +01:00

synthesize-mask-for-call.ll

[VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (#114292 )

2024-12-12 15:58:16 +00:00

tail-fold-uniform-memops.ll

[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548 )

2024-11-06 11:53:33 +00:00

tail-folding-styles.ll

[LLVM][IR] Use splat syntax when printing ConstantExpr based splats. (#116856 )

2024-11-21 11:21:12 +00:00

type-shrinkage-insertelt.ll

[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548 )

2024-11-06 11:53:33 +00:00

type-shrinkage-zext-costs.ll

[AArch64] Change the default vscale-for-tuning to 1. (#117174 )

2024-11-29 17:41:05 +00:00

uniform-args-call-variants.ll

[InstCombine] Infer nusw + nneg -> nuw for getelementptr (#111144 )

2024-12-05 14:36:40 +01:00

unsafe-vf-hint-remark.ll

…

veclib-calls-libsystem-darwin.ll

[aarch64] atan2 intrinsic lowering (p5) (#112611 )

2024-10-24 17:53:12 -07:00

veclib-function-calls.ll

[AArch64] Change the default vscale-for-tuning to 1. (#117174 )

2024-11-29 17:41:05 +00:00

veclib-intrinsic-calls.ll

[aarch64] atan2 intrinsic lowering (p5) (#112611 )

2024-10-24 17:53:12 -07:00

vector-call-linear-args.ll

[LAA] Don't assume libcalls with output/input pointers can be vectorized (#108980 )

2024-09-23 16:05:55 +01:00

vector-reverse-mask4.ll

[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548 )

2024-11-06 11:53:33 +00:00

vector-reverse.ll

…

widen-call-with-intrinsic-or-libfunc.ll

[VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (#114292 )

2024-12-12 15:58:16 +00:00

wider-VF-for-callinst.ll

[LLVM][IR] Use splat syntax when printing ConstantExpr based splats. (#116856 )

2024-11-21 11:21:12 +00:00