c22dc71b12
I had manually removed unused prefixes from CodeGen/X86 directory for more than 100 tests. I checked the change history for each of them at the beginning, and then I mainly focused on the format since I found all of the unused prefixes were result from either insensible copy or residuum after functional update. I think it's OK to remove the remaining X86 tests by script now. I wrote a rough script which works for me in most tests. I put it in llvm/utils temporarily for review and hope it may help other components owners. The tests in this patch are all generated by the tool and checked by update tool for the autogenerated tests. I skimmed them and checked about 30 tests and didn't find any unexpected changes. Reviewed By: mtrofin, MaskRay Differential Revision: https://reviews.llvm.org/D91496
77 lines
2.3 KiB
LLVM
77 lines
2.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 | FileCheck %s
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; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 -mattr=+avx512f | FileCheck %s
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; Test conditional move for the supported types (i16, i32, and i32) and
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; conditon input (argument or cmp). Currently i8 is not supported.
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define zeroext i16 @select_cmov_i16(i1 zeroext %cond, i16 zeroext %a, i16 zeroext %b) {
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; CHECK-LABEL: select_cmov_i16:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: testb $1, %dil
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; CHECK-NEXT: cmovew %dx, %si
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; CHECK-NEXT: movzwl %si, %eax
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; CHECK-NEXT: retq
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%1 = select i1 %cond, i16 %a, i16 %b
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ret i16 %1
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}
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define zeroext i16 @select_cmp_cmov_i16(i16 zeroext %a, i16 zeroext %b) {
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; CHECK-LABEL: select_cmp_cmov_i16:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: cmpw %si, %di
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; CHECK-NEXT: cmovbw %di, %si
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; CHECK-NEXT: movzwl %si, %eax
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; CHECK-NEXT: retq
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%1 = icmp ult i16 %a, %b
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%2 = select i1 %1, i16 %a, i16 %b
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ret i16 %2
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}
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define i32 @select_cmov_i32(i1 zeroext %cond, i32 %a, i32 %b) {
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; CHECK-LABEL: select_cmov_i32:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: movl %esi, %eax
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; CHECK-NEXT: testb $1, %dil
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; CHECK-NEXT: cmovel %edx, %eax
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; CHECK-NEXT: retq
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%1 = select i1 %cond, i32 %a, i32 %b
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ret i32 %1
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}
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define i32 @select_cmp_cmov_i32(i32 %a, i32 %b) {
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; CHECK-LABEL: select_cmp_cmov_i32:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: movl %esi, %eax
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; CHECK-NEXT: cmpl %esi, %edi
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; CHECK-NEXT: cmovbl %edi, %eax
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; CHECK-NEXT: retq
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%1 = icmp ult i32 %a, %b
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%2 = select i1 %1, i32 %a, i32 %b
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ret i32 %2
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}
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define i64 @select_cmov_i64(i1 zeroext %cond, i64 %a, i64 %b) {
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; CHECK-LABEL: select_cmov_i64:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: movq %rsi, %rax
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; CHECK-NEXT: testb $1, %dil
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; CHECK-NEXT: cmoveq %rdx, %rax
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; CHECK-NEXT: retq
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%1 = select i1 %cond, i64 %a, i64 %b
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ret i64 %1
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}
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define i64 @select_cmp_cmov_i64(i64 %a, i64 %b) {
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; CHECK-LABEL: select_cmp_cmov_i64:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: movq %rsi, %rax
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; CHECK-NEXT: cmpq %rsi, %rdi
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; CHECK-NEXT: cmovbq %rdi, %rax
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; CHECK-NEXT: retq
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%1 = icmp ult i64 %a, %b
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%2 = select i1 %1, i64 %a, i64 %b
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ret i64 %2
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}
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