0aef747b84
The motivation is that the update script has at least two deviations (`<...>@GOT`/`<...>@PLT`/ and not hiding pointer arithmetics) from what pretty much all the checklines were generated with, and most of the tests are still not updated, so each time one of the non-up-to-date tests is updated to see the effect of the code change, there is a lot of noise. Instead of having to deal with that each time, let's just deal with everything at once. This has been done via: ``` cd llvm-project/llvm/test/CodeGen/X86 grep -rl "; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py" | xargs -L1 <...>/llvm-project/llvm/utils/update_llc_test_checks.py --llc-binary <...>/llvm-project/build/bin/llc ``` Not all tests were regenerated, however.
50 lines
1.5 KiB
LLVM
50 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -tailcallopt < %s -mtriple=x86_64-unknown-unknown | FileCheck %s -check-prefix=X64
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; RUN: llc -tailcallopt < %s -mtriple=i686-unknown-unknown | FileCheck %s -check-prefix=X32
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; llc -tailcallopt should not enable tail calls from fastcc to tailcc or vice versa
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declare tailcc i32 @tailcallee1(i32 %a1, i32 %a2, i32 %a3, i32 %a4)
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define fastcc i32 @tailcaller1(i32 %in1, i32 %in2) nounwind {
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; X64-LABEL: tailcaller1:
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; X64: # %bb.0: # %entry
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; X64-NEXT: pushq %rax
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; X64-NEXT: movl %edi, %edx
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; X64-NEXT: movl %esi, %ecx
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; X64-NEXT: callq tailcallee1@PLT
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; X64-NEXT: retq $8
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;
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; X32-LABEL: tailcaller1:
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; X32: # %bb.0: # %entry
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; X32-NEXT: pushl %edx
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; X32-NEXT: pushl %ecx
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; X32-NEXT: calll tailcallee1@PLT
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; X32-NEXT: retl
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entry:
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%tmp11 = tail call tailcc i32 @tailcallee1(i32 %in1, i32 %in2, i32 %in1, i32 %in2)
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ret i32 %tmp11
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}
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declare fastcc i32 @tailcallee2(i32 %a1, i32 %a2, i32 %a3, i32 %a4)
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define tailcc i32 @tailcaller2(i32 %in1, i32 %in2) nounwind {
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; X64-LABEL: tailcaller2:
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; X64: # %bb.0: # %entry
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; X64-NEXT: pushq %rax
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; X64-NEXT: movl %edi, %edx
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; X64-NEXT: movl %esi, %ecx
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; X64-NEXT: callq tailcallee2@PLT
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; X64-NEXT: retq $8
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;
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; X32-LABEL: tailcaller2:
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; X32: # %bb.0: # %entry
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; X32-NEXT: pushl %edx
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; X32-NEXT: pushl %ecx
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; X32-NEXT: calll tailcallee2@PLT
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; X32-NEXT: retl
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entry:
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%tmp11 = tail call fastcc i32 @tailcallee2(i32 %in1, i32 %in2, i32 %in1, i32 %in2)
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ret i32 %tmp11
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}
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