6b5c440a67
This PR adds support for lowering of `vector.reduction` and `vector.multi_reduction` ops in subgroup to work-item distribution. Following cases are considered currently (more support will be added later): * `vector.reduction` : This assumes the source vector is distributed to all lanes and lanes must shuffle data to do a collaborative reduction. result is shared among all lanes. This is done by emitting `gpu::ShuffleOp` s and doing a butterfly reduction. Refer `VectorDistribution` for more details. * `vector.multi_reduction`: 2 cases are considered, 1. **Reduction is lane-local**: simply lower to a lane local multi reduction op. each lane does its own reduction. result is distributed. 2. **Reduction is not lane-local:** This one is handled indirectly. In this case, we rewrite the reduction in terms of `vector.reduction` ops (plus exrtact. insert) before the WI distribution even begin. Then whole things is distributed using `gpu::ShuffleOp` s later (not fullly supported yet).
504 lines
18 KiB
C++
504 lines
18 KiB
C++
//===- TestXeGPUTransforms.cpp -- Test Vector transforms and lowerings ----===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Dialect/Arith/IR/Arith.h"
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#include "mlir/Dialect/GPU/IR/GPUDialect.h"
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#include "mlir/Dialect/Index/IR/IndexDialect.h"
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#include "mlir/Dialect/Math/IR/Math.h"
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#include "mlir/Dialect/SCF/Transforms/Patterns.h"
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#include "mlir/Dialect/Vector/Transforms/VectorTransforms.h"
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#include "mlir/Dialect/XeGPU/IR/XeGPU.h"
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#include "mlir/Dialect/XeGPU/Transforms/Transforms.h"
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#include "mlir/Dialect/XeGPU/Transforms/XeGPULayoutImpl.h"
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#include "mlir/Dialect/XeGPU/Utils/XeGPUUtils.h"
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#include "mlir/IR/BuiltinTypes.h"
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#include "mlir/IR/Value.h"
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#include "mlir/Pass/Pass.h"
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#include "mlir/Pass/PassManager.h"
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#include "mlir/Transforms/DialectConversion.h"
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#include "mlir/Transforms/GreedyPatternRewriteDriver.h"
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#include "llvm/Support/raw_ostream.h"
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#include <optional>
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using namespace mlir;
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using namespace mlir::xegpu;
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namespace {
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#define DEBUG_TYPE "test-xegpu-unroll"
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struct TestXeGPUUnrollingPatterns
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: public PassWrapper<TestXeGPUUnrollingPatterns,
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OperationPass<gpu::GPUModuleOp>> {
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MLIR_DEFINE_EXPLICIT_INTERNAL_INLINE_TYPE_ID(TestXeGPUUnrollingPatterns)
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StringRef getArgument() const final {
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return "test-xegpu-unrolling-patterns";
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}
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StringRef getDescription() const final {
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return "Test lowering patterns to unroll ops in the xegpu dialect";
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}
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void getDependentDialects(::mlir::DialectRegistry ®istry) const override {
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registry.insert<memref::MemRefDialect>();
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registry.insert<xegpu::XeGPUDialect>();
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registry.insert<vector::VectorDialect>();
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}
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TestXeGPUUnrollingPatterns() = default;
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TestXeGPUUnrollingPatterns(const TestXeGPUUnrollingPatterns &pass) = default;
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void runOnOperation() override {
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MLIRContext *ctx = &getContext();
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xegpu::UnrollOptions options;
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options.setNativeShapeFn([&](Operation *op)
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-> std::optional<SmallVector<int64_t>> {
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if (isa<xegpu::CreateNdDescOp, xegpu::UpdateNdOffsetOp,
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xegpu::PrefetchNdOp, xegpu::LoadNdOp, xegpu::StoreNdOp,
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xegpu::CreateDescOp, xegpu::UpdateOffsetOp, xegpu::PrefetchOp,
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xegpu::LoadGatherOp, xegpu::StoreScatterOp>(op)) {
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xegpu::TensorDescType tdescTy;
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if (auto createNdOp = dyn_cast<xegpu::CreateNdDescOp>(op)) {
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tdescTy = createNdOp.getType();
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} else if (auto updateNdOp = dyn_cast<xegpu::UpdateNdOffsetOp>(op)) {
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tdescTy = updateNdOp.getTensorDescType();
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} else if (auto prefetchNdOp = dyn_cast<xegpu::PrefetchNdOp>(op)) {
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tdescTy = prefetchNdOp.getTensorDescType();
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} else if (auto loadNdOp = dyn_cast<xegpu::LoadNdOp>(op)) {
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tdescTy = loadNdOp.getTensorDescType();
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} else if (auto storeNdOp = dyn_cast<xegpu::StoreNdOp>(op)) {
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tdescTy = storeNdOp.getTensorDescType();
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} else if (auto createOp = dyn_cast<xegpu::CreateDescOp>(op)) {
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tdescTy = createOp.getType();
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} else if (auto updateOp = dyn_cast<xegpu::UpdateOffsetOp>(op)) {
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tdescTy = updateOp.getTensorDescType();
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} else if (auto prefetchOp = dyn_cast<xegpu::PrefetchOp>(op)) {
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tdescTy = prefetchOp.getTensorDescType();
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} else if (auto loadOp = dyn_cast<xegpu::LoadGatherOp>(op)) {
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if (loadOp.getOffsets()) {
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auto layout = xegpu::getDistributeLayoutAttr(loadOp.getResult());
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if (layout && layout.isForSubgroup()) {
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auto inst_data = layout.getEffectiveInstDataAsInt();
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if (!inst_data.empty())
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return SmallVector<int64_t>(inst_data.begin(), inst_data.end());
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}
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return std::nullopt;
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}
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tdescTy = loadOp.getTensorDescType();
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} else if (auto storeOp = dyn_cast<xegpu::StoreScatterOp>(op)) {
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if (storeOp.getOffsets()) {
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auto layout = llvm::dyn_cast_or_null<xegpu::LayoutAttr>(
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op->getAttr("layout"));
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if (layout && layout.isForSubgroup()) {
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auto inst_data = layout.getEffectiveInstDataAsInt();
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if (!inst_data.empty())
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return SmallVector<int64_t>(inst_data.begin(), inst_data.end());
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}
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return std::nullopt;
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}
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tdescTy = storeOp.getTensorDescType();
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}
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if (auto layout = tdescTy.getLayoutAttr()) {
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auto inst_data = layout.getInstData();
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if (inst_data && layout.isForSubgroup())
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return SmallVector<int64_t>(inst_data.asArrayRef().begin(),
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inst_data.asArrayRef().end());
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}
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}
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if (isa<xegpu::DpasOp>(op))
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return SmallVector<int64_t>{8, 16, 16};
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return std::nullopt;
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});
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options.setUnrolledTypesFn(
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[&](ShapedType type, ArrayRef<int64_t> tileShape,
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bool returnSingleType = false) -> SmallVector<Type> {
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Type elemTy = type.getElementType();
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Type newTy;
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// TensorDescType needs to drop the inst_data field in the layout
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// attribute
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if (auto tdescTy = dyn_cast<xegpu::TensorDescType>(type)) {
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Attribute encoding = tdescTy.getEncoding();
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auto layout = tdescTy.getLayoutAttr();
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// If the encoding is a ScatterTensorDescAttr, we need to
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// potentially adjust the chunk size based on the inst_data.
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if (tdescTy.isScattered()) {
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int64_t chunkSize = tdescTy.getChunkSizeAsInt();
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if (chunkSize > 1) {
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int64_t blockedChunkSize = chunkSize;
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auto instData = layout.getInstData();
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if (!instData.empty())
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blockedChunkSize = instData.asArrayRef().back();
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// To create a new attribute with a different chunk_size:
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auto newEncoding = xegpu::ScatterTensorDescAttr::get(
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ctx, tdescTy.getMemorySpace(), blockedChunkSize);
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encoding = newEncoding;
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}
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}
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if (layout) {
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if (layout.getLaneLayout() == nullptr)
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layout = xegpu::LayoutAttr();
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else
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layout = layout.dropInstData();
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}
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newTy = xegpu::TensorDescType::get(ctx, tileShape, elemTy, encoding,
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layout);
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} else {
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newTy = type.clone(tileShape, elemTy);
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}
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if (returnSingleType)
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return SmallVector<Type>{newTy};
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std::optional<SmallVector<int64_t>> ratio =
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computeShapeRatio(type.getShape(), tileShape);
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assert(ratio && "Expecting the ratio to be valid.");
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return SmallVector<Type>(computeProduct(*ratio), newTy);
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});
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RewritePatternSet patterns(ctx);
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populateXeGPUUnrollPatterns(patterns, options);
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(void)applyPatternsGreedily(getOperation(), std::move(patterns));
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}
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};
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#undef DEBUG_TYPE
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#define DEBUG_TYPE "test-xegpu-layout-interface"
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// Test pattern for distributing vector::StepOp from workgroup to subgroup.
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// Validates DistributeLayoutAttr interfaces for offset computation
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// abstraction between LayoutAttr and SliceAttr.
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class TestStepOpPattern : public OpConversionPattern<vector::StepOp> {
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using OpConversionPattern<vector::StepOp>::OpConversionPattern;
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LogicalResult
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matchAndRewrite(vector::StepOp op, OneToNOpAdaptor adaptor,
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ConversionPatternRewriter &rewriter) const override {
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auto layoutName = xegpu::getTemporaryLayoutName(op->getResult(0));
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auto sliceAttr = op->getAttrOfType<xegpu::SliceAttr>(layoutName);
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if (!sliceAttr || sliceAttr.getRank() != 1)
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return failure();
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std::optional<SmallVector<int64_t>> sgShape =
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sliceAttr.getEffectiveSgDataAsInt();
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if (!sgShape)
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return failure();
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Location loc = op.getLoc();
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VectorType type = op.getResult().getType();
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auto wgShape = type.getShape();
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Value sgId =
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gpu::SubgroupIdOp::create(rewriter, loc, /*upper_bound=*/nullptr);
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auto maybeOffsets =
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sliceAttr.computeDistributedCoords(rewriter, loc, sgId, wgShape);
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if (failed(maybeOffsets))
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return failure();
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VectorType newTy = type.cloneWith(*sgShape, type.getElementType());
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Value base = vector::StepOp::create(rewriter, loc, newTy);
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SmallVector<Value> newOps;
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for (auto offsets : *maybeOffsets) {
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Value bcast =
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vector::BroadcastOp::create(rewriter, loc, newTy, offsets[0]);
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Value add = arith::AddIOp::create(rewriter, loc, base, bcast);
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newOps.push_back(add);
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}
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rewriter.replaceOpWithMultiple(op, {newOps});
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return success();
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}
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};
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struct TestXeGPUSGDistribute
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: public PassWrapper<TestXeGPUSGDistribute,
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OperationPass<gpu::GPUModuleOp>> {
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MLIR_DEFINE_EXPLICIT_INTERNAL_INLINE_TYPE_ID(TestXeGPUSGDistribute)
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StringRef getArgument() const final { return "test-xegpu-sg-distribute"; }
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StringRef getDescription() const final {
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return "Test the implementation of XeGPU Subgroup Distribution";
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}
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void getDependentDialects(::mlir::DialectRegistry ®istry) const override {
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registry.insert<arith::ArithDialect>();
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registry.insert<memref::MemRefDialect>();
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registry.insert<xegpu::XeGPUDialect>();
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registry.insert<vector::VectorDialect>();
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registry.insert<index::IndexDialect>();
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}
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TestXeGPUSGDistribute() = default;
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TestXeGPUSGDistribute(const TestXeGPUSGDistribute &pass) = default;
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void runOnOperation() override {
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RewritePatternSet patterns(&getContext());
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xegpu::populateXeGPUSubgroupDistributePatterns(patterns);
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(void)applyPatternsGreedily(getOperation(), std::move(patterns));
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}
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};
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/// This test pass is intended to test the subgroup to workitem distribution of
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/// xegpu/vector/arith operations in isolation, it does not handle any
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/// structural ops like scf.for etc.
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struct TestXeGPUSgToWiDistributeExperimental
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: public PassWrapper<TestXeGPUSgToWiDistributeExperimental,
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OperationPass<gpu::GPUModuleOp>> {
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MLIR_DEFINE_EXPLICIT_INTERNAL_INLINE_TYPE_ID(
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TestXeGPUSgToWiDistributeExperimental)
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StringRef getArgument() const final {
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return "test-xegpu-sg-to-wi-distribute-experimental";
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}
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StringRef getDescription() const final {
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return "Test the experimental implementation of XeGPU Subgroup to "
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"Work-item Distribution";
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}
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Option<bool> enableRewriteMultiReductionToReductions{
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*this, "enable-rewrite-multi-reduction-to-reductions",
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llvm::cl::desc("Partially lower multi-reduction ops to reduction ops if "
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"the reduction dimension is distributed."),
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llvm::cl::init(false)};
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void getDependentDialects(::mlir::DialectRegistry ®istry) const override {
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registry.insert<arith::ArithDialect>();
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registry.insert<memref::MemRefDialect>();
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registry.insert<xegpu::XeGPUDialect>();
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registry.insert<vector::VectorDialect>();
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registry.insert<index::IndexDialect>();
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registry.insert<gpu::GPUDialect>();
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}
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TestXeGPUSgToWiDistributeExperimental() = default;
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TestXeGPUSgToWiDistributeExperimental(
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const TestXeGPUSgToWiDistributeExperimental &pass)
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: PassWrapper(pass) {}
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void runOnOperation() override {
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MLIRContext *ctx = &getContext();
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TypeConverter typeConverter;
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// Define type materializations using UnrealizedConversionCastOp.
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auto materializeCast = [&](mlir::OpBuilder &builder, mlir::Type type,
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mlir::ValueRange inputs,
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mlir::Location loc) -> mlir::Value {
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return UnrealizedConversionCastOp::create(builder, loc, type, inputs)
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.getResult(0);
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};
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typeConverter.addSourceMaterialization(materializeCast);
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typeConverter.addTargetMaterialization(materializeCast);
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// If `enableRewriteMultiReductionToReductions` is set, only focus on
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// testing the partial lowering of vector::MultiReductionOp.
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if (enableRewriteMultiReductionToReductions) {
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xegpu::populateXeGPUSgToWiDistributeTypeConversions(typeConverter);
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ConversionTarget target(*ctx);
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RewritePatternSet patterns(ctx);
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xegpu::populateXeGPUSgToWiLowerVectorMultiReductionAndLegality(patterns,
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target);
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(void)applyPartialConversion(getOperation(), target, std::move(patterns));
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return;
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}
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ConversionTarget target(*ctx);
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RewritePatternSet patterns(ctx);
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xegpu::populateXeGPUSgToWiDistributeTypeConversionAndLegality(
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typeConverter, patterns, target);
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(void)applyPartialConversion(getOperation(), target, std::move(patterns));
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}
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};
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struct TestXeGPUMoveFuncBodyToWarpOp
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: public PassWrapper<TestXeGPUMoveFuncBodyToWarpOp,
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OperationPass<gpu::GPUModuleOp>> {
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MLIR_DEFINE_EXPLICIT_INTERNAL_INLINE_TYPE_ID(TestXeGPUMoveFuncBodyToWarpOp)
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StringRef getArgument() const final {
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return "test-xegpu-move-func-to-warp-op";
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}
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StringRef getDescription() const final {
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return "Test the implementation of XeGPU move gpu function body to "
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"WarpExecuteOnLane0 op.";
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}
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void getDependentDialects(::mlir::DialectRegistry ®istry) const override {
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registry.insert<xegpu::XeGPUDialect>();
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registry.insert<gpu::GPUDialect>();
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}
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TestXeGPUMoveFuncBodyToWarpOp() = default;
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TestXeGPUMoveFuncBodyToWarpOp(const TestXeGPUMoveFuncBodyToWarpOp &pass) =
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default;
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void runOnOperation() override {
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RewritePatternSet patterns(&getContext());
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xegpu::populateXeGPUMoveFuncBodyToWarpOpPatterns(patterns);
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(void)applyPatternsGreedily(getOperation(), std::move(patterns));
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}
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};
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struct TestXeGPUPropagateLayouts
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: public PassWrapper<TestXeGPUPropagateLayouts,
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OperationPass<gpu::GPUModuleOp>> {
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MLIR_DEFINE_EXPLICIT_INTERNAL_INLINE_TYPE_ID(TestXeGPUPropagateLayouts)
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StringRef getArgument() const final { return "test-xegpu-propagate-layouts"; }
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StringRef getDescription() const final {
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return "Test the implementation of XeGPU propagate layouts.";
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}
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void getDependentDialects(::mlir::DialectRegistry ®istry) const override {
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registry.insert<xegpu::XeGPUDialect>();
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registry.insert<gpu::GPUDialect>();
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}
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TestXeGPUPropagateLayouts() = default;
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TestXeGPUPropagateLayouts(const TestXeGPUPropagateLayouts &pass)
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: PassWrapper(pass) {}
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Option<std::string> layoutKind{
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*this, "layout-kind",
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llvm::cl::desc("Propagate `subgroup` / `inst` / `lane` level of xegpu "
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"layouts."),
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llvm::cl::init("lane")};
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void runOnOperation() override {
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OpBuilder builder(getOperation());
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LayoutKind kind;
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if (layoutKind == "subgroup")
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kind = LayoutKind::Subgroup;
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else if (layoutKind == "inst")
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kind = LayoutKind::InstData;
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else if (layoutKind == "lane")
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kind = LayoutKind::Lane;
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else {
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signalPassFailure();
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return;
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}
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if (failed(xegpu::propagateLayouts(builder, getOperation(), kind))) {
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signalPassFailure();
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}
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}
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};
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struct TestXeGPUResolveLayoutConflicts
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: public PassWrapper<TestXeGPUResolveLayoutConflicts,
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OperationPass<gpu::GPUModuleOp>> {
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MLIR_DEFINE_EXPLICIT_INTERNAL_INLINE_TYPE_ID(TestXeGPUResolveLayoutConflicts)
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StringRef getArgument() const final {
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return "test-xegpu-resolve-layout-conflicts";
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}
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StringRef getDescription() const final {
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return "Test the implementation of XeGPU layout conflict resolution.";
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}
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void getDependentDialects(::mlir::DialectRegistry ®istry) const override {
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registry.insert<xegpu::XeGPUDialect>();
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registry.insert<gpu::GPUDialect>();
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}
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TestXeGPUResolveLayoutConflicts() = default;
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TestXeGPUResolveLayoutConflicts(const TestXeGPUResolveLayoutConflicts &pass) =
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default;
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void runOnOperation() override {
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if (failed(xegpu::resolveLayoutConflicts(getOperation()))) {
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signalPassFailure();
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}
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}
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};
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struct TestXeGPULayoutInterface
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: public PassWrapper<TestXeGPULayoutInterface,
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OperationPass<gpu::GPUModuleOp>> {
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MLIR_DEFINE_EXPLICIT_INTERNAL_INLINE_TYPE_ID(TestXeGPULayoutInterface)
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StringRef getArgument() const final { return "test-xegpu-layout-interface"; }
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StringRef getDescription() const final {
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return "Test the implementation of XeGPU Layout interfaces";
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}
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void getDependentDialects(::mlir::DialectRegistry ®istry) const override {
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registry.insert<arith::ArithDialect>();
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registry.insert<memref::MemRefDialect>();
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registry.insert<xegpu::XeGPUDialect>();
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registry.insert<vector::VectorDialect>();
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registry.insert<index::IndexDialect>();
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}
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TestXeGPULayoutInterface() = default;
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TestXeGPULayoutInterface(const TestXeGPULayoutInterface &pass) = default;
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void runOnOperation() override {
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MLIRContext *ctx = &getContext();
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TypeConverter typeConverter;
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auto materializeCast = [&](mlir::OpBuilder &builder, mlir::Type type,
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mlir::ValueRange inputs,
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mlir::Location loc) -> mlir::Value {
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return UnrealizedConversionCastOp::create(builder, loc, type, inputs)
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.getResult(0);
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};
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typeConverter.addSourceMaterialization(materializeCast);
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typeConverter.addTargetMaterialization(materializeCast);
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RewritePatternSet patterns(ctx);
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patterns.add<TestStepOpPattern>(typeConverter, ctx);
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ConversionTarget target(*ctx);
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auto isLegal = [&](xegpu::SliceAttr layout) -> bool {
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return !layout || !layout.isForWorkgroup();
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};
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target.addDynamicallyLegalOp<vector::StepOp>(
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|
[&](vector::StepOp op) -> bool {
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auto layoutName = xegpu::getTemporaryLayoutName(op->getResult(0));
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auto sliceAttr = op->getAttrOfType<xegpu::SliceAttr>(layoutName);
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return isLegal(sliceAttr);
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});
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target.markUnknownOpDynamicallyLegal([](Operation *op) { return true; });
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|
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(void)applyPartialConversion(getOperation(), target, std::move(patterns));
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|
}
|
|
};
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} // namespace
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namespace mlir {
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namespace test {
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void registerTestXeGPULowerings() {
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PassRegistration<TestXeGPUUnrollingPatterns>();
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PassRegistration<TestXeGPULayoutInterface>();
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PassRegistration<TestXeGPUSGDistribute>();
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PassRegistration<TestXeGPUSgToWiDistributeExperimental>();
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PassRegistration<TestXeGPUMoveFuncBodyToWarpOp>();
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PassRegistration<TestXeGPUPropagateLayouts>();
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PassRegistration<TestXeGPUResolveLayoutConflicts>();
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}
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} // namespace test
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} // namespace mlir
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