6ba25c1a56
This patch removes all uses of %T from within LLVM tests. %T has been deprecated for about seven years and use is not advised given it is not unique per test and can thus lead to races. The goal of this is to eventually remove support for %T from lit.
73 lines
4.7 KiB
TableGen
73 lines
4.7 KiB
TableGen
// RUN: llvm-tblgen -gen-global-isel -I %p/../../../include -I %p/../Common -optimize-match-table=false %s -o %t.context-non-optimized.cpp
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// RUN: FileCheck %s --check-prefixes=CHECK_NOPT -input-file=%t.context-non-optimized.cpp
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// RUN: llvm-tblgen -gen-global-isel -I %p/../../../include -I %p/../Common -optimize-match-table=true %s -o %t.context-optimized.cpp
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// RUN: FileCheck %s --check-prefixes=CHECK_OPT -input-file=%t.context-optimized.cpp
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include "llvm/Target/Target.td"
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include "GlobalISelEmitterCommon.td"
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def test_atomic_op_frag : PatFrag<(ops node:$ptr, node:$val),
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(atomic_swap node:$ptr, node:$val)> {
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let GISelPredicateCode = [{ return !MRI.use_nodbg_empty(MI.getOperand(0).getReg()); }];
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let IsAtomic = 1;
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let MemoryVT = i32;
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}
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def INSN : I<(outs GPR32:$dst), (ins GPR32Op:$src1, GPR32Op:$src2), []>;
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def : Pat<(test_atomic_op_frag GPR32:$ptr, GPR32:$val) ,
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(INSN GPR32:$ptr, GPR32:$val)>;
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// CHECK_NOPT-LABEL: const uint8_t *MyTargetInstructionSelector::getMatchTable() const {
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// CHECK_NOPT-NEXT: constexpr static uint8_t MatchTable0[] = {
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// CHECK_NOPT-NEXT: GIM_Try, /*On fail goto*//*Label 0*/ GIMT_Encode4(52), // Rule ID 0 //
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// CHECK_NOPT-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
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// CHECK_NOPT-NEXT: GIM_CheckOpcode, /*MI*/0, GIMT_Encode2(TargetOpcode::G_ATOMICRMW_XCHG),
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// CHECK_NOPT-NEXT: GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(4),
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// CHECK_NOPT-NEXT: // MIs[0] DstI[dst]
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// CHECK_NOPT-NEXT: GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
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// CHECK_NOPT-NEXT: GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(MyTarget::GPR32RegClassID),
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// CHECK_NOPT-NEXT: // MIs[0] ptr
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// CHECK_NOPT-NEXT: GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
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// CHECK_NOPT-NEXT: GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(MyTarget::GPR32RegClassID),
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// CHECK_NOPT-NEXT: // MIs[0] val
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// CHECK_NOPT-NEXT: GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
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// CHECK_NOPT-NEXT: GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(MyTarget::GPR32RegClassID),
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// CHECK_NOPT-NEXT: GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_test_atomic_op_frag),
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// CHECK_NOPT-NEXT: // (atomic_swap:{ *:[i32] } GPR32:{ *:[i32] }:$ptr, GPR32:{ *:[i32] }:$val)<<P:Predicate_test_atomic_op_frag>> => (INSN:{ *:[i32] } GPR32:{ *:[i32] }:$ptr, GPR32:{ *:[i32] }:$val)
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// CHECK_NOPT-NEXT: GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(MyTarget::INSN),
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// CHECK_NOPT-NEXT: GIR_RootConstrainSelectedInstOperands,
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// CHECK_NOPT-NEXT: // GIR_Coverage, 0,
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// CHECK_NOPT-NEXT: GIR_Done,
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// CHECK_NOPT-NEXT: // Label 0: @52
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// CHECK_NOPT-NEXT: GIM_Reject,
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// CHECK_NOPT-NEXT: };
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// CHECK_NOPT-NEXT: return MatchTable0;
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// CHECK_NOPT-NEXT: }
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// CHECK_OPT-LABEL: const uint8_t *MyTargetInstructionSelector::getMatchTable() const {
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// CHECK_OPT-NEXT: constexpr static uint8_t MatchTable0[] = {
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// CHECK_OPT-NEXT: GIM_Try, /*On fail goto*//*Label 0*/ GIMT_Encode4(49), // Rule ID 0 //
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// CHECK_OPT-NEXT: GIM_CheckOpcode, /*MI*/0, GIMT_Encode2(TargetOpcode::G_ATOMICRMW_XCHG),
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// CHECK_OPT-NEXT: GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
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// CHECK_OPT-NEXT: GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
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// CHECK_OPT-NEXT: GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(4),
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// CHECK_OPT-NEXT: GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(MyTarget::GPR32RegClassID),
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// CHECK_OPT-NEXT: // MIs[0] ptr
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// CHECK_OPT-NEXT: GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
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// CHECK_OPT-NEXT: GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(MyTarget::GPR32RegClassID),
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// CHECK_OPT-NEXT: GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(MyTarget::GPR32RegClassID),
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// CHECK_OPT-NEXT: GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_test_atomic_op_frag),
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// CHECK_OPT-NEXT: // (atomic_swap:{ *:[i32] } GPR32:{ *:[i32] }:$ptr, GPR32:{ *:[i32] }:$val)<<P:Predicate_test_atomic_op_frag>> => (INSN:{ *:[i32] } GPR32:{ *:[i32] }:$ptr, GPR32:{ *:[i32] }:$val)
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// CHECK_OPT-NEXT: GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(MyTarget::INSN),
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// CHECK_OPT-NEXT: GIR_RootConstrainSelectedInstOperands,
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// CHECK_OPT-NEXT: // GIR_Coverage, 0,
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// CHECK_OPT-NEXT: GIR_Done,
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// CHECK_OPT-NEXT: // Label 0: @49
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// CHECK_OPT-NEXT: GIM_Reject,
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// CHECK_OPT-NEXT: };
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// CHECK_OPT-NEXT: return MatchTable0;
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// CHECK_OPT-NEXT: }
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