Simon Pilgrim 6c5941b09f [X86] subvectorwise-store-of-vector-splat.ll - regenerate VPTERNLOG comments

2025-01-13 11:36:58 +00:00

..

AArch64

[MachineCP] Correctly handle register masks and sub-registers (#122472)

2025-01-13 09:55:08 +00:00

AMDGPU

[AMDGPU][NewPM] Port AMDGPURemoveIncompatibleFunctions to NPM (#122261)

2025-01-13 10:11:40 +05:30

ARC

[ARC,test] Change llc -march= to -mtriple=

2024-12-15 12:29:53 -08:00

ARM

[DAG] Allow AssertZExt to scalarize. (#122463)

2025-01-11 16:29:06 +00:00

AVR

[AVR] Wrap out-of-bounds relative jumps (#118015)

2024-12-27 11:44:55 +08:00

BPF

[BPF,test] Change llc -march= to -mtriple=

2024-12-15 11:04:24 -08:00

CSKY

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DirectX

[DirectX] Implement the resource.store.rawbuffer intrinsic (#121282)

2025-01-12 18:52:20 -07:00

Generic

[NFC][SelectionDAG] Replace generic @llvm.expect.with.probability codegen test with X86 test (#117848)

2024-12-01 17:46:08 -05:00

Hexagon

[Hexagon] Fix test after 9d7df23f4d6537752854d54b0c4c583512b930d0

2025-01-10 13:03:28 -08:00

Inputs

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Lanai

[test] Remove redundant -march= when target triple is specified in IR

2024-12-15 12:42:17 -08:00

LoongArch

Revert "[MachineLICM] Use RegisterClassInfo::getRegPressureSetLimit (#119826)"

2025-01-10 09:05:06 +01:00

M68k

[M68k,MSP430,test] Change llc -march= to -mtriple=

2024-12-15 10:09:30 -08:00

Mips

[MC][Mips] Add MipsWinCOFFObjectWriter/MipsWinCOFFStreamer (#114611)

2024-12-20 17:31:38 +08:00

MIR

[aarch64][win] Add support for import call optimization (equivalent to MSVC /d2ImportCallOptimization) (#121516)

2025-01-11 21:30:17 -08:00

MLRegAlloc

[MLGO] Remove extranous check lines from test input

2024-11-18 03:52:13 +00:00

MSP430

[M68k,MSP430,test] Change llc -march= to -mtriple=

2024-12-15 10:09:30 -08:00

NVPTX

[NVPTX] Add float to tf32 conversion intrinsics (#121507)

2025-01-13 16:17:42 +05:30

PowerPC

[AIX][AsmPrinter] Fix unsigned subtraction wrap-around (#122214)

2025-01-09 00:07:57 -04:00

RISCV

[RISCV] Add Qualcomm uC Xqciint (Interrupts) extension (#122256)

2025-01-13 16:36:05 +05:30

SPARC

[Sparc,test] Change llc -march= to -mtriple=

2024-12-15 10:29:34 -08:00

SPIRV

[SPIR-V] Prefer SPV_INTEL_optnone over SPV_EXT_optnone when both extensions are available (#122082)

2025-01-09 13:17:43 +01:00

SystemZ

[CodeGen] @llvm.experimental.stackmap make operands immediate (#117932)

2024-12-11 17:41:19 +08:00

Thumb

Reland "[ARM] Stop gluing ALU nodes to branches / selects" (#118887)

2024-12-07 10:14:36 +03:00

Thumb2

Revert "[MachineLICM] Use RegisterClassInfo::getRegPressureSetLimit (#119826)"

2025-01-10 09:05:06 +01:00

VE

[VE,test] Change llc -march= to -mtriple=

2024-12-15 10:24:14 -08:00

WebAssembly

[WebAssembly] Add -wasm-use-legacy-eh option (#122158)

2025-01-09 22:36:10 -08:00

WinCFGuard

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WinEH

[WinEH] Take musttail calls into account when unlinking eh records (#119702)

2024-12-13 09:16:52 +01:00

X86

[X86] subvectorwise-store-of-vector-splat.ll - regenerate VPTERNLOG comments

2025-01-13 11:36:58 +00:00

XCore

[XCore,test] Change llc -march= to -mtriple=

2024-12-15 10:31:38 -08:00

Xtensa

[CodeGen] Clean up tests that depend on implicit .text in MCAsmStreamer

2024-12-22 21:11:32 -08:00